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authorEli Cohen <eli@dev.mellanox.co.il>2008-04-17 00:01:10 -0400
committerRoland Dreier <rolandd@cisco.com>2008-04-17 00:01:10 -0400
commit8ff095ec4bce7be943beff3b330562e2f0e42167 (patch)
treed0643b575033a033a072c2c0687be7e57d183d99 /drivers/net/mlx4/fw.c
parent6046136c742e32d5e6431cdcd8957638d1816821 (diff)
IB/mlx4: Add IPoIB checksum offload support
ConnectX devices support checksum generation and verification of TCP and UDP packets for UD IPoIB messages. This patch checks if the HCA supports this and sets the IB_DEVICE_UD_IP_CSUM capability flag if it does. It implements support for handling the IB_SEND_IP_CSUM send flag and setting the csum_ok field in receive work completions. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Ali Ayub <ali@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/fw.c')
-rw-r--r--drivers/net/mlx4/fw.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index 61dc4951d6b0..f494c3e8bce3 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -696,6 +696,10 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
696 /* Check port for UD address vector: */ 696 /* Check port for UD address vector: */
697 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1); 697 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1);
698 698
699 /* Enable IPoIB checksumming if we can: */
700 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
701 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 3);
702
699 /* QPC/EEC/CQC/EQC/RDMARC attributes */ 703 /* QPC/EEC/CQC/EQC/RDMARC attributes */
700 704
701 MLX4_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET); 705 MLX4_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET);