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authorYevgeny Petrilin <yevgenyp@mellanox.co.il>2008-10-22 13:25:29 -0400
committerRoland Dreier <rolandd@cisco.com>2008-10-22 13:25:29 -0400
commit93fc9e1bb6507dde945c2eab68c93e1066ac3691 (patch)
treeaa495ec31b7372580f9ec50acead1d170fd70aab /drivers/net/mlx4/fw.c
parenta3cdcbfa8fb1fccfe48d359da86e99546610c562 (diff)
mlx4_core: Support multiple pre-reserved QP regions
For ethernet support, we need to reserve QPs for the ethernet and fibre channel driver. The QPs are reserved at the end of the QP table. (This way we assure that they are aligned to their size) We need to consider these reserved ranges in bitmap creation, so we extend the mlx4 bitmap utility functions to allow reserved ranges at both the bottom and the top of the range. Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/fw.c')
-rw-r--r--drivers/net/mlx4/fw.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index 7e32955da982..40d8142c23b2 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -357,6 +357,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
357#define QUERY_PORT_MTU_OFFSET 0x01 357#define QUERY_PORT_MTU_OFFSET 0x01
358#define QUERY_PORT_WIDTH_OFFSET 0x06 358#define QUERY_PORT_WIDTH_OFFSET 0x06
359#define QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07 359#define QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07
360#define QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a
360#define QUERY_PORT_MAX_VL_OFFSET 0x0b 361#define QUERY_PORT_MAX_VL_OFFSET 0x0b
361 362
362 for (i = 1; i <= dev_cap->num_ports; ++i) { 363 for (i = 1; i <= dev_cap->num_ports; ++i) {
@@ -374,6 +375,10 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
374 dev_cap->max_pkeys[i] = 1 << (field & 0xf); 375 dev_cap->max_pkeys[i] = 1 << (field & 0xf);
375 MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET); 376 MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET);
376 dev_cap->max_vl[i] = field & 0xf; 377 dev_cap->max_vl[i] = field & 0xf;
378 MLX4_GET(field, outbox, QUERY_PORT_MAX_MACVLAN_OFFSET);
379 dev_cap->log_max_macs[i] = field & 0xf;
380 dev_cap->log_max_vlans[i] = field >> 4;
381
377 } 382 }
378 } 383 }
379 384