diff options
author | Eli Cohen <eli@dev.mellanox.co.il> | 2008-04-17 00:09:27 -0400 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2008-04-17 00:09:27 -0400 |
commit | b832be1e4007f4a54954ec68bd865ff05d6babca (patch) | |
tree | f8780fb17293a5b02cd21fed468e1270daac91d8 /drivers/net/mlx4/fw.c | |
parent | 40ca1988e03c001747d0b4cc1b25cf38297c9f9e (diff) |
IB/mlx4: Add IPoIB LSO support
Add TSO support to the mlx4_ib driver.
Signed-off-by: Eli Cohen <eli@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/fw.c')
-rw-r--r-- | drivers/net/mlx4/fw.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c index f494c3e8bce3..d82f2751d2c7 100644 --- a/drivers/net/mlx4/fw.c +++ b/drivers/net/mlx4/fw.c | |||
@@ -133,6 +133,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
133 | #define QUERY_DEV_CAP_MAX_AV_OFFSET 0x27 | 133 | #define QUERY_DEV_CAP_MAX_AV_OFFSET 0x27 |
134 | #define QUERY_DEV_CAP_MAX_REQ_QP_OFFSET 0x29 | 134 | #define QUERY_DEV_CAP_MAX_REQ_QP_OFFSET 0x29 |
135 | #define QUERY_DEV_CAP_MAX_RES_QP_OFFSET 0x2b | 135 | #define QUERY_DEV_CAP_MAX_RES_QP_OFFSET 0x2b |
136 | #define QUERY_DEV_CAP_MAX_GSO_OFFSET 0x2d | ||
136 | #define QUERY_DEV_CAP_MAX_RDMA_OFFSET 0x2f | 137 | #define QUERY_DEV_CAP_MAX_RDMA_OFFSET 0x2f |
137 | #define QUERY_DEV_CAP_RSZ_SRQ_OFFSET 0x33 | 138 | #define QUERY_DEV_CAP_RSZ_SRQ_OFFSET 0x33 |
138 | #define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35 | 139 | #define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35 |
@@ -215,6 +216,13 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
215 | dev_cap->max_requester_per_qp = 1 << (field & 0x3f); | 216 | dev_cap->max_requester_per_qp = 1 << (field & 0x3f); |
216 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RES_QP_OFFSET); | 217 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RES_QP_OFFSET); |
217 | dev_cap->max_responder_per_qp = 1 << (field & 0x3f); | 218 | dev_cap->max_responder_per_qp = 1 << (field & 0x3f); |
219 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GSO_OFFSET); | ||
220 | field &= 0x1f; | ||
221 | if (!field) | ||
222 | dev_cap->max_gso_sz = 0; | ||
223 | else | ||
224 | dev_cap->max_gso_sz = 1 << field; | ||
225 | |||
218 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET); | 226 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET); |
219 | dev_cap->max_rdma_global = 1 << (field & 0x3f); | 227 | dev_cap->max_rdma_global = 1 << (field & 0x3f); |
220 | MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET); | 228 | MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET); |
@@ -377,6 +385,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
377 | dev_cap->max_sq_desc_sz, dev_cap->max_sq_sg); | 385 | dev_cap->max_sq_desc_sz, dev_cap->max_sq_sg); |
378 | mlx4_dbg(dev, "Max RQ desc size: %d, max RQ S/G: %d\n", | 386 | mlx4_dbg(dev, "Max RQ desc size: %d, max RQ S/G: %d\n", |
379 | dev_cap->max_rq_desc_sz, dev_cap->max_rq_sg); | 387 | dev_cap->max_rq_desc_sz, dev_cap->max_rq_sg); |
388 | mlx4_dbg(dev, "Max GSO size: %d\n", dev_cap->max_gso_sz); | ||
380 | 389 | ||
381 | dump_dev_cap_flags(dev, dev_cap->flags); | 390 | dump_dev_cap_flags(dev, dev_cap->flags); |
382 | 391 | ||