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authorYevgeny Petrilin <yevgenyp@mellanox.co.il>2008-12-25 21:20:13 -0500
committerDavid S. Miller <davem@davemloft.net>2008-12-25 21:20:13 -0500
commit26c743bed9b0dc83dc736c68d2a3e7494a9790ad (patch)
tree3ffb2aa0e2fe73d9487dcbcf2473e6e5e310cde8 /drivers/net/mlx4/en_params.c
parent60b9f9e5588a9e37c35abc2051d57ef12171f916 (diff)
mlx4_en: Remove pauses module parameters.
They are controlled through Ethtool interface. Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/mlx4/en_params.c')
-rw-r--r--drivers/net/mlx4/en_params.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/net/mlx4/en_params.c b/drivers/net/mlx4/en_params.c
index 86f403163450..047b37f5a747 100644
--- a/drivers/net/mlx4/en_params.c
+++ b/drivers/net/mlx4/en_params.c
@@ -60,12 +60,6 @@ MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS,
60 "Number of LRO sessions per ring or disabled (0)"); 60 "Number of LRO sessions per ring or disabled (0)");
61 61
62/* Priority pausing */ 62/* Priority pausing */
63MLX4_EN_PARM_INT(pptx, MLX4_EN_DEF_TX_PAUSE,
64 "Pause policy on TX: 0 never generate pause frames "
65 "1 generate pause frames according to RX buffer threshold");
66MLX4_EN_PARM_INT(pprx, MLX4_EN_DEF_RX_PAUSE,
67 "Pause policy on RX: 0 ignore received pause frames "
68 "1 respect received pause frames");
69MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." 63MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
70 " Per priority bit mask"); 64 " Per priority bit mask");
71MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." 65MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
@@ -89,9 +83,9 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
89 params->rss_mask = rss_mask & 0x1f; 83 params->rss_mask = rss_mask & 0x1f;
90 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS); 84 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
91 for (i = 1; i <= MLX4_MAX_PORTS; i++) { 85 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
92 params->prof[i].rx_pause = pprx; 86 params->prof[i].rx_pause = 1;
93 params->prof[i].rx_ppp = pfcrx; 87 params->prof[i].rx_ppp = pfcrx;
94 params->prof[i].tx_pause = pptx; 88 params->prof[i].tx_pause = 1;
95 params->prof[i].tx_ppp = pfctx; 89 params->prof[i].tx_ppp = pfctx;
96 } 90 }
97 if (pfcrx || pfctx) { 91 if (pfcrx || pfctx) {