mlx4_core: Fix CQ context layout

The reserved6 field should be 64 bits, not just 16 bits.  Without
this, the structure does not match the hardware layout on 32-bit
architectures: the db_rec_addr field ends up at offset 52 instead of
offset 56.  The bug slipped by because the alignment of __be64 members
ends up putting it in the right place on x86-64.

Signed-off-by: Eli Cohen <eli@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/net/mlx4/cq.c b/drivers/net/mlx4/cq.c
index 437d78ad0912..39253d0c1590 100644
--- a/drivers/net/mlx4/cq.c
+++ b/drivers/net/mlx4/cq.c
@@ -61,7 +61,7 @@ struct mlx4_cq_context {
         __be32                  solicit_producer_index;
         __be32                  consumer_index;
         __be32                  producer_index;
-        u8                      reserved6[2];
+        u32                     reserved6[2];
         __be64                  db_rec_addr;
 };