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authorYevgeny Petrilin <yevgenyp@mellanox.co.il>2008-12-22 10:15:03 -0500
committerRoland Dreier <rolandd@cisco.com>2008-12-22 10:15:03 -0500
commitb8dd786f9417e5885929bfe33a235c76a9c1c569 (patch)
tree16b38c672980d142ffa0ac0ccdeb4af19c20cc31 /drivers/net/mlx4/cq.c
parent061e41fdb5047b1fb161e89664057835935ca1d2 (diff)
mlx4_core: Add support for multiple completion event vectors
When using MSI-X mode, create a completion event queue for each CPU. Report the number of completion EQs in a new struct mlx4_caps member, num_comp_vectors, and extend the mlx4_cq_alloc() interface with a vector parameter so that consumers can specify which completion EQ should be used to report events for the CQ being created. Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/cq.c')
-rw-r--r--drivers/net/mlx4/cq.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/net/mlx4/cq.c b/drivers/net/mlx4/cq.c
index b7ad2829d67e..ac57b6a42c6e 100644
--- a/drivers/net/mlx4/cq.c
+++ b/drivers/net/mlx4/cq.c
@@ -189,7 +189,7 @@ EXPORT_SYMBOL_GPL(mlx4_cq_resize);
189 189
190int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, 190int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
191 struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, 191 struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq,
192 int collapsed) 192 unsigned vector, int collapsed)
193{ 193{
194 struct mlx4_priv *priv = mlx4_priv(dev); 194 struct mlx4_priv *priv = mlx4_priv(dev);
195 struct mlx4_cq_table *cq_table = &priv->cq_table; 195 struct mlx4_cq_table *cq_table = &priv->cq_table;
@@ -198,6 +198,11 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
198 u64 mtt_addr; 198 u64 mtt_addr;
199 int err; 199 int err;
200 200
201 if (vector >= dev->caps.num_comp_vectors)
202 return -EINVAL;
203
204 cq->vector = vector;
205
201 cq->cqn = mlx4_bitmap_alloc(&cq_table->bitmap); 206 cq->cqn = mlx4_bitmap_alloc(&cq_table->bitmap);
202 if (cq->cqn == -1) 207 if (cq->cqn == -1)
203 return -ENOMEM; 208 return -ENOMEM;
@@ -227,7 +232,7 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
227 232
228 cq_context->flags = cpu_to_be32(!!collapsed << 18); 233 cq_context->flags = cpu_to_be32(!!collapsed << 18);
229 cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index); 234 cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index);
230 cq_context->comp_eqn = priv->eq_table.eq[MLX4_EQ_COMP].eqn; 235 cq_context->comp_eqn = priv->eq_table.eq[vector].eqn;
231 cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; 236 cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
232 237
233 mtt_addr = mlx4_mtt_addr(dev, mtt); 238 mtt_addr = mlx4_mtt_addr(dev, mtt);
@@ -276,7 +281,7 @@ void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq)
276 if (err) 281 if (err)
277 mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn); 282 mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn);
278 283
279 synchronize_irq(priv->eq_table.eq[MLX4_EQ_COMP].irq); 284 synchronize_irq(priv->eq_table.eq[cq->vector].irq);
280 285
281 spin_lock_irq(&cq_table->lock); 286 spin_lock_irq(&cq_table->lock);
282 radix_tree_delete(&cq_table->tree, cq->cqn); 287 radix_tree_delete(&cq_table->tree, cq->cqn);