diff options
author | Greg Rose <gregory.v.rose@intel.com> | 2010-01-08 21:23:31 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-01-10 16:34:21 -0500 |
commit | 3047f90bd515b38e62094eff90b299f379ab7243 (patch) | |
tree | 8b4675ebc6000fa7137fcb20e939d626e67e1543 /drivers/net/ixgbevf | |
parent | 50d9c84ee522ce6f61cd6a7dfce1b82a260edd3c (diff) |
ixgbevf: 82599 Virtual Function core functions and header
This module and header file contain the core functions for the 82599
virtual function device.
Signed-off-by: Greg Rose <gregory.v.rose@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbevf')
-rw-r--r-- | drivers/net/ixgbevf/vf.c | 387 | ||||
-rw-r--r-- | drivers/net/ixgbevf/vf.h | 168 |
2 files changed, 555 insertions, 0 deletions
diff --git a/drivers/net/ixgbevf/vf.c b/drivers/net/ixgbevf/vf.c new file mode 100644 index 000000000000..4b5dec0ec140 --- /dev/null +++ b/drivers/net/ixgbevf/vf.c | |||
@@ -0,0 +1,387 @@ | |||
1 | /******************************************************************************* | ||
2 | |||
3 | Intel 82599 Virtual Function driver | ||
4 | Copyright(c) 1999 - 2009 Intel Corporation. | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify it | ||
7 | under the terms and conditions of the GNU General Public License, | ||
8 | version 2, as published by the Free Software Foundation. | ||
9 | |||
10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License along with | ||
16 | this program; if not, write to the Free Software Foundation, Inc., | ||
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | |||
19 | The full GNU General Public License is included in this distribution in | ||
20 | the file called "COPYING". | ||
21 | |||
22 | Contact Information: | ||
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
25 | |||
26 | *******************************************************************************/ | ||
27 | |||
28 | #include "vf.h" | ||
29 | |||
30 | /** | ||
31 | * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx | ||
32 | * @hw: pointer to hardware structure | ||
33 | * | ||
34 | * Starts the hardware by filling the bus info structure and media type, clears | ||
35 | * all on chip counters, initializes receive address registers, multicast | ||
36 | * table, VLAN filter table, calls routine to set up link and flow control | ||
37 | * settings, and leaves transmit and receive units disabled and uninitialized | ||
38 | **/ | ||
39 | static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw) | ||
40 | { | ||
41 | /* Clear adapter stopped flag */ | ||
42 | hw->adapter_stopped = false; | ||
43 | |||
44 | return 0; | ||
45 | } | ||
46 | |||
47 | /** | ||
48 | * ixgbevf_init_hw_vf - virtual function hardware initialization | ||
49 | * @hw: pointer to hardware structure | ||
50 | * | ||
51 | * Initialize the hardware by resetting the hardware and then starting | ||
52 | * the hardware | ||
53 | **/ | ||
54 | static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw) | ||
55 | { | ||
56 | s32 status = hw->mac.ops.start_hw(hw); | ||
57 | |||
58 | hw->mac.ops.get_mac_addr(hw, hw->mac.addr); | ||
59 | |||
60 | return status; | ||
61 | } | ||
62 | |||
63 | /** | ||
64 | * ixgbevf_reset_hw_vf - Performs hardware reset | ||
65 | * @hw: pointer to hardware structure | ||
66 | * | ||
67 | * Resets the hardware by reseting the transmit and receive units, masks and | ||
68 | * clears all interrupts. | ||
69 | **/ | ||
70 | static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw) | ||
71 | { | ||
72 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
73 | u32 timeout = IXGBE_VF_INIT_TIMEOUT; | ||
74 | s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; | ||
75 | u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; | ||
76 | u8 *addr = (u8 *)(&msgbuf[1]); | ||
77 | |||
78 | /* Call adapter stop to disable tx/rx and clear interrupts */ | ||
79 | hw->mac.ops.stop_adapter(hw); | ||
80 | |||
81 | IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); | ||
82 | IXGBE_WRITE_FLUSH(hw); | ||
83 | |||
84 | /* we cannot reset while the RSTI / RSTD bits are asserted */ | ||
85 | while (!mbx->ops.check_for_rst(hw) && timeout) { | ||
86 | timeout--; | ||
87 | udelay(5); | ||
88 | } | ||
89 | |||
90 | if (!timeout) | ||
91 | return IXGBE_ERR_RESET_FAILED; | ||
92 | |||
93 | /* mailbox timeout can now become active */ | ||
94 | mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; | ||
95 | |||
96 | msgbuf[0] = IXGBE_VF_RESET; | ||
97 | mbx->ops.write_posted(hw, msgbuf, 1); | ||
98 | |||
99 | msleep(10); | ||
100 | |||
101 | /* set our "perm_addr" based on info provided by PF */ | ||
102 | /* also set up the mc_filter_type which is piggy backed | ||
103 | * on the mac address in word 3 */ | ||
104 | ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN); | ||
105 | if (ret_val) | ||
106 | return ret_val; | ||
107 | |||
108 | if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) | ||
109 | return IXGBE_ERR_INVALID_MAC_ADDR; | ||
110 | |||
111 | memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); | ||
112 | hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
117 | /** | ||
118 | * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units | ||
119 | * @hw: pointer to hardware structure | ||
120 | * | ||
121 | * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, | ||
122 | * disables transmit and receive units. The adapter_stopped flag is used by | ||
123 | * the shared code and drivers to determine if the adapter is in a stopped | ||
124 | * state and should not touch the hardware. | ||
125 | **/ | ||
126 | static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw) | ||
127 | { | ||
128 | u32 number_of_queues; | ||
129 | u32 reg_val; | ||
130 | u16 i; | ||
131 | |||
132 | /* | ||
133 | * Set the adapter_stopped flag so other driver functions stop touching | ||
134 | * the hardware | ||
135 | */ | ||
136 | hw->adapter_stopped = true; | ||
137 | |||
138 | /* Disable the receive unit by stopped each queue */ | ||
139 | number_of_queues = hw->mac.max_rx_queues; | ||
140 | for (i = 0; i < number_of_queues; i++) { | ||
141 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); | ||
142 | if (reg_val & IXGBE_RXDCTL_ENABLE) { | ||
143 | reg_val &= ~IXGBE_RXDCTL_ENABLE; | ||
144 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); | ||
145 | } | ||
146 | } | ||
147 | |||
148 | IXGBE_WRITE_FLUSH(hw); | ||
149 | |||
150 | /* Clear interrupt mask to stop from interrupts being generated */ | ||
151 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); | ||
152 | |||
153 | /* Clear any pending interrupts */ | ||
154 | IXGBE_READ_REG(hw, IXGBE_VTEICR); | ||
155 | |||
156 | /* Disable the transmit unit. Each queue must be disabled. */ | ||
157 | number_of_queues = hw->mac.max_tx_queues; | ||
158 | for (i = 0; i < number_of_queues; i++) { | ||
159 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); | ||
160 | if (reg_val & IXGBE_TXDCTL_ENABLE) { | ||
161 | reg_val &= ~IXGBE_TXDCTL_ENABLE; | ||
162 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); | ||
163 | } | ||
164 | } | ||
165 | |||
166 | return 0; | ||
167 | } | ||
168 | |||
169 | /** | ||
170 | * ixgbevf_mta_vector - Determines bit-vector in multicast table to set | ||
171 | * @hw: pointer to hardware structure | ||
172 | * @mc_addr: the multicast address | ||
173 | * | ||
174 | * Extracts the 12 bits, from a multicast address, to determine which | ||
175 | * bit-vector to set in the multicast table. The hardware uses 12 bits, from | ||
176 | * incoming rx multicast addresses, to determine the bit-vector to check in | ||
177 | * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set | ||
178 | * by the MO field of the MCSTCTRL. The MO field is set during initialization | ||
179 | * to mc_filter_type. | ||
180 | **/ | ||
181 | static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) | ||
182 | { | ||
183 | u32 vector = 0; | ||
184 | |||
185 | switch (hw->mac.mc_filter_type) { | ||
186 | case 0: /* use bits [47:36] of the address */ | ||
187 | vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); | ||
188 | break; | ||
189 | case 1: /* use bits [46:35] of the address */ | ||
190 | vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); | ||
191 | break; | ||
192 | case 2: /* use bits [45:34] of the address */ | ||
193 | vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); | ||
194 | break; | ||
195 | case 3: /* use bits [43:32] of the address */ | ||
196 | vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); | ||
197 | break; | ||
198 | default: /* Invalid mc_filter_type */ | ||
199 | break; | ||
200 | } | ||
201 | |||
202 | /* vector can only be 12-bits or boundary will be exceeded */ | ||
203 | vector &= 0xFFF; | ||
204 | return vector; | ||
205 | } | ||
206 | |||
207 | /** | ||
208 | * ixgbevf_get_mac_addr_vf - Read device MAC address | ||
209 | * @hw: pointer to the HW structure | ||
210 | * @mac_addr: pointer to storage for retrieved MAC address | ||
211 | **/ | ||
212 | static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) | ||
213 | { | ||
214 | memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS); | ||
215 | |||
216 | return 0; | ||
217 | } | ||
218 | |||
219 | /** | ||
220 | * ixgbevf_set_rar_vf - set device MAC address | ||
221 | * @hw: pointer to hardware structure | ||
222 | * @index: Receive address register to write | ||
223 | * @addr: Address to put into receive address register | ||
224 | * @vmdq: Unused in this implementation | ||
225 | **/ | ||
226 | static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | ||
227 | u32 vmdq) | ||
228 | { | ||
229 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
230 | u32 msgbuf[3]; | ||
231 | u8 *msg_addr = (u8 *)(&msgbuf[1]); | ||
232 | s32 ret_val; | ||
233 | |||
234 | memset(msgbuf, 0, sizeof(msgbuf)); | ||
235 | msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; | ||
236 | memcpy(msg_addr, addr, 6); | ||
237 | ret_val = mbx->ops.write_posted(hw, msgbuf, 3); | ||
238 | |||
239 | if (!ret_val) | ||
240 | ret_val = mbx->ops.read_posted(hw, msgbuf, 3); | ||
241 | |||
242 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | ||
243 | |||
244 | /* if nacked the address was rejected, use "perm_addr" */ | ||
245 | if (!ret_val && | ||
246 | (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) | ||
247 | ixgbevf_get_mac_addr_vf(hw, hw->mac.addr); | ||
248 | |||
249 | return ret_val; | ||
250 | } | ||
251 | |||
252 | /** | ||
253 | * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses | ||
254 | * @hw: pointer to the HW structure | ||
255 | * @mc_addr_list: array of multicast addresses to program | ||
256 | * @mc_addr_count: number of multicast addresses to program | ||
257 | * @next: caller supplied function to return next address in list | ||
258 | * | ||
259 | * Updates the Multicast Table Array. | ||
260 | **/ | ||
261 | static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, | ||
262 | u32 mc_addr_count, | ||
263 | ixgbe_mc_addr_itr next) | ||
264 | { | ||
265 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
266 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; | ||
267 | u16 *vector_list = (u16 *)&msgbuf[1]; | ||
268 | u32 vector; | ||
269 | u32 cnt, i; | ||
270 | u32 vmdq; | ||
271 | |||
272 | /* Each entry in the list uses 1 16 bit word. We have 30 | ||
273 | * 16 bit words available in our HW msg buffer (minus 1 for the | ||
274 | * msg type). That's 30 hash values if we pack 'em right. If | ||
275 | * there are more than 30 MC addresses to add then punt the | ||
276 | * extras for now and then add code to handle more than 30 later. | ||
277 | * It would be unusual for a server to request that many multi-cast | ||
278 | * addresses except for in large enterprise network environments. | ||
279 | */ | ||
280 | |||
281 | cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; | ||
282 | msgbuf[0] = IXGBE_VF_SET_MULTICAST; | ||
283 | msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; | ||
284 | |||
285 | for (i = 0; i < cnt; i++) { | ||
286 | vector = ixgbevf_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); | ||
287 | vector_list[i] = vector; | ||
288 | } | ||
289 | |||
290 | mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE); | ||
291 | |||
292 | return 0; | ||
293 | } | ||
294 | |||
295 | /** | ||
296 | * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address | ||
297 | * @hw: pointer to the HW structure | ||
298 | * @vlan: 12 bit VLAN ID | ||
299 | * @vind: unused by VF drivers | ||
300 | * @vlan_on: if true then set bit, else clear bit | ||
301 | **/ | ||
302 | static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | ||
303 | bool vlan_on) | ||
304 | { | ||
305 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
306 | u32 msgbuf[2]; | ||
307 | |||
308 | msgbuf[0] = IXGBE_VF_SET_VLAN; | ||
309 | msgbuf[1] = vlan; | ||
310 | /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ | ||
311 | msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; | ||
312 | |||
313 | return mbx->ops.write_posted(hw, msgbuf, 2); | ||
314 | } | ||
315 | |||
316 | /** | ||
317 | * ixgbevf_setup_mac_link_vf - Setup MAC link settings | ||
318 | * @hw: pointer to hardware structure | ||
319 | * @speed: Unused in this implementation | ||
320 | * @autoneg: Unused in this implementation | ||
321 | * @autoneg_wait_to_complete: Unused in this implementation | ||
322 | * | ||
323 | * Do nothing and return success. VF drivers are not allowed to change | ||
324 | * global settings. Maintained for driver compatibility. | ||
325 | **/ | ||
326 | static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw, | ||
327 | ixgbe_link_speed speed, bool autoneg, | ||
328 | bool autoneg_wait_to_complete) | ||
329 | { | ||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | /** | ||
334 | * ixgbevf_check_mac_link_vf - Get link/speed status | ||
335 | * @hw: pointer to hardware structure | ||
336 | * @speed: pointer to link speed | ||
337 | * @link_up: true is link is up, false otherwise | ||
338 | * @autoneg_wait_to_complete: true when waiting for completion is needed | ||
339 | * | ||
340 | * Reads the links register to determine if link is up and the current speed | ||
341 | **/ | ||
342 | static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw, | ||
343 | ixgbe_link_speed *speed, | ||
344 | bool *link_up, | ||
345 | bool autoneg_wait_to_complete) | ||
346 | { | ||
347 | u32 links_reg; | ||
348 | |||
349 | if (!(hw->mbx.ops.check_for_rst(hw))) { | ||
350 | *link_up = false; | ||
351 | *speed = 0; | ||
352 | return -1; | ||
353 | } | ||
354 | |||
355 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | ||
356 | |||
357 | if (links_reg & IXGBE_LINKS_UP) | ||
358 | *link_up = true; | ||
359 | else | ||
360 | *link_up = false; | ||
361 | |||
362 | if (links_reg & IXGBE_LINKS_SPEED) | ||
363 | *speed = IXGBE_LINK_SPEED_10GB_FULL; | ||
364 | else | ||
365 | *speed = IXGBE_LINK_SPEED_1GB_FULL; | ||
366 | |||
367 | return 0; | ||
368 | } | ||
369 | |||
370 | struct ixgbe_mac_operations ixgbevf_mac_ops = { | ||
371 | .init_hw = ixgbevf_init_hw_vf, | ||
372 | .reset_hw = ixgbevf_reset_hw_vf, | ||
373 | .start_hw = ixgbevf_start_hw_vf, | ||
374 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | ||
375 | .stop_adapter = ixgbevf_stop_hw_vf, | ||
376 | .setup_link = ixgbevf_setup_mac_link_vf, | ||
377 | .check_link = ixgbevf_check_mac_link_vf, | ||
378 | .set_rar = ixgbevf_set_rar_vf, | ||
379 | .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf, | ||
380 | .set_vfta = ixgbevf_set_vfta_vf, | ||
381 | }; | ||
382 | |||
383 | struct ixgbevf_info ixgbevf_vf_info = { | ||
384 | .mac = ixgbe_mac_82599_vf, | ||
385 | .mac_ops = &ixgbevf_mac_ops, | ||
386 | }; | ||
387 | |||
diff --git a/drivers/net/ixgbevf/vf.h b/drivers/net/ixgbevf/vf.h new file mode 100644 index 000000000000..799600e92700 --- /dev/null +++ b/drivers/net/ixgbevf/vf.h | |||
@@ -0,0 +1,168 @@ | |||
1 | /******************************************************************************* | ||
2 | |||
3 | Intel 82599 Virtual Function driver | ||
4 | Copyright(c) 1999 - 2009 Intel Corporation. | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify it | ||
7 | under the terms and conditions of the GNU General Public License, | ||
8 | version 2, as published by the Free Software Foundation. | ||
9 | |||
10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License along with | ||
16 | this program; if not, write to the Free Software Foundation, Inc., | ||
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | |||
19 | The full GNU General Public License is included in this distribution in | ||
20 | the file called "COPYING". | ||
21 | |||
22 | Contact Information: | ||
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
25 | |||
26 | *******************************************************************************/ | ||
27 | |||
28 | #ifndef __IXGBE_VF_H__ | ||
29 | #define __IXGBE_VF_H__ | ||
30 | |||
31 | #include <linux/pci.h> | ||
32 | #include <linux/delay.h> | ||
33 | #include <linux/interrupt.h> | ||
34 | #include <linux/if_ether.h> | ||
35 | |||
36 | #include "defines.h" | ||
37 | #include "regs.h" | ||
38 | #include "mbx.h" | ||
39 | |||
40 | struct ixgbe_hw; | ||
41 | |||
42 | /* iterator type for walking multicast address lists */ | ||
43 | typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, | ||
44 | u32 *vmdq); | ||
45 | struct ixgbe_mac_operations { | ||
46 | s32 (*init_hw)(struct ixgbe_hw *); | ||
47 | s32 (*reset_hw)(struct ixgbe_hw *); | ||
48 | s32 (*start_hw)(struct ixgbe_hw *); | ||
49 | s32 (*clear_hw_cntrs)(struct ixgbe_hw *); | ||
50 | enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); | ||
51 | u32 (*get_supported_physical_layer)(struct ixgbe_hw *); | ||
52 | s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); | ||
53 | s32 (*stop_adapter)(struct ixgbe_hw *); | ||
54 | s32 (*get_bus_info)(struct ixgbe_hw *); | ||
55 | |||
56 | /* Link */ | ||
57 | s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool); | ||
58 | s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); | ||
59 | s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, | ||
60 | bool *); | ||
61 | |||
62 | /* RAR, Multicast, VLAN */ | ||
63 | s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32); | ||
64 | s32 (*init_rx_addrs)(struct ixgbe_hw *); | ||
65 | s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32, | ||
66 | ixgbe_mc_addr_itr); | ||
67 | s32 (*enable_mc)(struct ixgbe_hw *); | ||
68 | s32 (*disable_mc)(struct ixgbe_hw *); | ||
69 | s32 (*clear_vfta)(struct ixgbe_hw *); | ||
70 | s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool); | ||
71 | }; | ||
72 | |||
73 | enum ixgbe_mac_type { | ||
74 | ixgbe_mac_unknown = 0, | ||
75 | ixgbe_mac_82599_vf, | ||
76 | ixgbe_num_macs | ||
77 | }; | ||
78 | |||
79 | struct ixgbe_mac_info { | ||
80 | struct ixgbe_mac_operations ops; | ||
81 | u8 addr[6]; | ||
82 | u8 perm_addr[6]; | ||
83 | |||
84 | enum ixgbe_mac_type type; | ||
85 | |||
86 | s32 mc_filter_type; | ||
87 | |||
88 | bool get_link_status; | ||
89 | u32 max_tx_queues; | ||
90 | u32 max_rx_queues; | ||
91 | u32 max_msix_vectors; | ||
92 | }; | ||
93 | |||
94 | struct ixgbe_mbx_operations { | ||
95 | s32 (*init_params)(struct ixgbe_hw *hw); | ||
96 | s32 (*read)(struct ixgbe_hw *, u32 *, u16); | ||
97 | s32 (*write)(struct ixgbe_hw *, u32 *, u16); | ||
98 | s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16); | ||
99 | s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16); | ||
100 | s32 (*check_for_msg)(struct ixgbe_hw *); | ||
101 | s32 (*check_for_ack)(struct ixgbe_hw *); | ||
102 | s32 (*check_for_rst)(struct ixgbe_hw *); | ||
103 | }; | ||
104 | |||
105 | struct ixgbe_mbx_stats { | ||
106 | u32 msgs_tx; | ||
107 | u32 msgs_rx; | ||
108 | |||
109 | u32 acks; | ||
110 | u32 reqs; | ||
111 | u32 rsts; | ||
112 | }; | ||
113 | |||
114 | struct ixgbe_mbx_info { | ||
115 | struct ixgbe_mbx_operations ops; | ||
116 | struct ixgbe_mbx_stats stats; | ||
117 | u32 timeout; | ||
118 | u32 udelay; | ||
119 | u32 v2p_mailbox; | ||
120 | u16 size; | ||
121 | }; | ||
122 | |||
123 | struct ixgbe_hw { | ||
124 | void *back; | ||
125 | |||
126 | u8 __iomem *hw_addr; | ||
127 | u8 *flash_address; | ||
128 | unsigned long io_base; | ||
129 | |||
130 | struct ixgbe_mac_info mac; | ||
131 | struct ixgbe_mbx_info mbx; | ||
132 | |||
133 | u16 device_id; | ||
134 | u16 subsystem_vendor_id; | ||
135 | u16 subsystem_device_id; | ||
136 | u16 vendor_id; | ||
137 | |||
138 | u8 revision_id; | ||
139 | bool adapter_stopped; | ||
140 | }; | ||
141 | |||
142 | struct ixgbevf_hw_stats { | ||
143 | u64 base_vfgprc; | ||
144 | u64 base_vfgptc; | ||
145 | u64 base_vfgorc; | ||
146 | u64 base_vfgotc; | ||
147 | u64 base_vfmprc; | ||
148 | |||
149 | u64 last_vfgprc; | ||
150 | u64 last_vfgptc; | ||
151 | u64 last_vfgorc; | ||
152 | u64 last_vfgotc; | ||
153 | u64 last_vfmprc; | ||
154 | |||
155 | u64 vfgprc; | ||
156 | u64 vfgptc; | ||
157 | u64 vfgorc; | ||
158 | u64 vfgotc; | ||
159 | u64 vfmprc; | ||
160 | }; | ||
161 | |||
162 | struct ixgbevf_info { | ||
163 | enum ixgbe_mac_type mac; | ||
164 | struct ixgbe_mac_operations *mac_ops; | ||
165 | }; | ||
166 | |||
167 | #endif /* __IXGBE_VF_H__ */ | ||
168 | |||