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authorGreg Rose <gregory.v.rose@intel.com>2010-01-08 21:24:10 -0500
committerDavid S. Miller <davem@davemloft.net>2010-01-10 16:34:22 -0500
commit92915f71201b43762fbe05dbfb1a1a0de9c8adb9 (patch)
treec2666d5d2ee58af777ae905072d1fe3a9b56fa70 /drivers/net/ixgbevf
parentcbf698dbba25741ee1b2e734a6dd4f3070a1706f (diff)
ixgbevf: Driver main and ethool interface module and main header
These modules and header contain the Linux OS network interface code and core interrupt and network send/receive handlers. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbevf')
-rw-r--r--drivers/net/ixgbevf/ethtool.c716
-rw-r--r--drivers/net/ixgbevf/ixgbevf.h318
-rw-r--r--drivers/net/ixgbevf/ixgbevf_main.c3571
3 files changed, 4605 insertions, 0 deletions
diff --git a/drivers/net/ixgbevf/ethtool.c b/drivers/net/ixgbevf/ethtool.c
new file mode 100644
index 000000000000..399be0c34c36
--- /dev/null
+++ b/drivers/net/ixgbevf/ethtool.c
@@ -0,0 +1,716 @@
1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28/* ethtool support for ixgbevf */
29
30#include <linux/types.h>
31#include <linux/module.h>
32#include <linux/pci.h>
33#include <linux/netdevice.h>
34#include <linux/ethtool.h>
35#include <linux/vmalloc.h>
36#include <linux/if_vlan.h>
37#include <linux/uaccess.h>
38
39#include "ixgbevf.h"
40
41#define IXGBE_ALL_RAR_ENTRIES 16
42
43#ifdef ETHTOOL_GSTATS
44struct ixgbe_stats {
45 char stat_string[ETH_GSTRING_LEN];
46 int sizeof_stat;
47 int stat_offset;
48 int base_stat_offset;
49};
50
51#define IXGBEVF_STAT(m, b) sizeof(((struct ixgbevf_adapter *)0)->m), \
52 offsetof(struct ixgbevf_adapter, m), \
53 offsetof(struct ixgbevf_adapter, b)
54static struct ixgbe_stats ixgbe_gstrings_stats[] = {
55 {"rx_packets", IXGBEVF_STAT(stats.vfgprc, stats.base_vfgprc)},
56 {"tx_packets", IXGBEVF_STAT(stats.vfgptc, stats.base_vfgptc)},
57 {"rx_bytes", IXGBEVF_STAT(stats.vfgorc, stats.base_vfgorc)},
58 {"tx_bytes", IXGBEVF_STAT(stats.vfgotc, stats.base_vfgotc)},
59 {"tx_busy", IXGBEVF_STAT(tx_busy, zero_base)},
60 {"multicast", IXGBEVF_STAT(stats.vfmprc, stats.base_vfmprc)},
61 {"rx_csum_offload_good", IXGBEVF_STAT(hw_csum_rx_good, zero_base)},
62 {"rx_csum_offload_errors", IXGBEVF_STAT(hw_csum_rx_error, zero_base)},
63 {"tx_csum_offload_ctxt", IXGBEVF_STAT(hw_csum_tx_good, zero_base)},
64 {"rx_header_split", IXGBEVF_STAT(rx_hdr_split, zero_base)},
65};
66
67#define IXGBE_QUEUE_STATS_LEN 0
68#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
69
70#define IXGBEVF_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
71#endif /* ETHTOOL_GSTATS */
72#ifdef ETHTOOL_TEST
73static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
74 "Register test (offline)",
75 "Link test (on/offline)"
76};
77#define IXGBE_TEST_LEN (sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN)
78#endif /* ETHTOOL_TEST */
79
80static int ixgbevf_get_settings(struct net_device *netdev,
81 struct ethtool_cmd *ecmd)
82{
83 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
84 struct ixgbe_hw *hw = &adapter->hw;
85 u32 link_speed = 0;
86 bool link_up;
87
88 ecmd->supported = SUPPORTED_10000baseT_Full;
89 ecmd->autoneg = AUTONEG_DISABLE;
90 ecmd->transceiver = XCVR_DUMMY1;
91 ecmd->port = -1;
92
93 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
94
95 if (link_up) {
96 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
97 SPEED_10000 : SPEED_1000;
98 ecmd->duplex = DUPLEX_FULL;
99 } else {
100 ecmd->speed = -1;
101 ecmd->duplex = -1;
102 }
103
104 return 0;
105}
106
107static u32 ixgbevf_get_rx_csum(struct net_device *netdev)
108{
109 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
110 return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
111}
112
113static int ixgbevf_set_rx_csum(struct net_device *netdev, u32 data)
114{
115 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
116 if (data)
117 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
118 else
119 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
120
121 if (netif_running(netdev)) {
122 if (!adapter->dev_closed)
123 ixgbevf_reinit_locked(adapter);
124 } else {
125 ixgbevf_reset(adapter);
126 }
127
128 return 0;
129}
130
131static int ixgbevf_set_tso(struct net_device *netdev, u32 data)
132{
133 if (data) {
134 netdev->features |= NETIF_F_TSO;
135 netdev->features |= NETIF_F_TSO6;
136 } else {
137 netif_tx_stop_all_queues(netdev);
138 netdev->features &= ~NETIF_F_TSO;
139 netdev->features &= ~NETIF_F_TSO6;
140 netif_tx_start_all_queues(netdev);
141 }
142 return 0;
143}
144
145static u32 ixgbevf_get_msglevel(struct net_device *netdev)
146{
147 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
148 return adapter->msg_enable;
149}
150
151static void ixgbevf_set_msglevel(struct net_device *netdev, u32 data)
152{
153 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
154 adapter->msg_enable = data;
155}
156
157#define IXGBE_GET_STAT(_A_, _R_) (_A_->stats._R_)
158
159static char *ixgbevf_reg_names[] = {
160 "IXGBE_VFCTRL",
161 "IXGBE_VFSTATUS",
162 "IXGBE_VFLINKS",
163 "IXGBE_VFRXMEMWRAP",
164 "IXGBE_VFRTIMER",
165 "IXGBE_VTEICR",
166 "IXGBE_VTEICS",
167 "IXGBE_VTEIMS",
168 "IXGBE_VTEIMC",
169 "IXGBE_VTEIAC",
170 "IXGBE_VTEIAM",
171 "IXGBE_VTEITR",
172 "IXGBE_VTIVAR",
173 "IXGBE_VTIVAR_MISC",
174 "IXGBE_VFRDBAL0",
175 "IXGBE_VFRDBAL1",
176 "IXGBE_VFRDBAH0",
177 "IXGBE_VFRDBAH1",
178 "IXGBE_VFRDLEN0",
179 "IXGBE_VFRDLEN1",
180 "IXGBE_VFRDH0",
181 "IXGBE_VFRDH1",
182 "IXGBE_VFRDT0",
183 "IXGBE_VFRDT1",
184 "IXGBE_VFRXDCTL0",
185 "IXGBE_VFRXDCTL1",
186 "IXGBE_VFSRRCTL0",
187 "IXGBE_VFSRRCTL1",
188 "IXGBE_VFPSRTYPE",
189 "IXGBE_VFTDBAL0",
190 "IXGBE_VFTDBAL1",
191 "IXGBE_VFTDBAH0",
192 "IXGBE_VFTDBAH1",
193 "IXGBE_VFTDLEN0",
194 "IXGBE_VFTDLEN1",
195 "IXGBE_VFTDH0",
196 "IXGBE_VFTDH1",
197 "IXGBE_VFTDT0",
198 "IXGBE_VFTDT1",
199 "IXGBE_VFTXDCTL0",
200 "IXGBE_VFTXDCTL1",
201 "IXGBE_VFTDWBAL0",
202 "IXGBE_VFTDWBAL1",
203 "IXGBE_VFTDWBAH0",
204 "IXGBE_VFTDWBAH1"
205};
206
207
208static int ixgbevf_get_regs_len(struct net_device *netdev)
209{
210 return (ARRAY_SIZE(ixgbevf_reg_names)) * sizeof(u32);
211}
212
213static void ixgbevf_get_regs(struct net_device *netdev,
214 struct ethtool_regs *regs,
215 void *p)
216{
217 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
218 struct ixgbe_hw *hw = &adapter->hw;
219 u32 *regs_buff = p;
220 u32 regs_len = ixgbevf_get_regs_len(netdev);
221 u8 i;
222
223 memset(p, 0, regs_len);
224
225 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
226
227 /* General Registers */
228 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_VFCTRL);
229 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_VFSTATUS);
230 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
231 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_VFRXMEMWRAP);
232 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_VFRTIMER);
233
234 /* Interrupt */
235 /* don't read EICR because it can clear interrupt causes, instead
236 * read EICS which is a shadow but doesn't clear EICR */
237 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
238 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
239 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_VTEIMS);
240 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_VTEIMC);
241 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_VTEIAC);
242 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_VTEIAM);
243 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_VTEITR(0));
244 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_VTIVAR(0));
245 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
246
247 /* Receive DMA */
248 for (i = 0; i < 2; i++)
249 regs_buff[14 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAL(i));
250 for (i = 0; i < 2; i++)
251 regs_buff[16 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAH(i));
252 for (i = 0; i < 2; i++)
253 regs_buff[18 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDLEN(i));
254 for (i = 0; i < 2; i++)
255 regs_buff[20 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDH(i));
256 for (i = 0; i < 2; i++)
257 regs_buff[22 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDT(i));
258 for (i = 0; i < 2; i++)
259 regs_buff[24 + i] = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
260 for (i = 0; i < 2; i++)
261 regs_buff[26 + i] = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(i));
262
263 /* Receive */
264 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_VFPSRTYPE);
265
266 /* Transmit */
267 for (i = 0; i < 2; i++)
268 regs_buff[29 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAL(i));
269 for (i = 0; i < 2; i++)
270 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAH(i));
271 for (i = 0; i < 2; i++)
272 regs_buff[33 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDLEN(i));
273 for (i = 0; i < 2; i++)
274 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDH(i));
275 for (i = 0; i < 2; i++)
276 regs_buff[37 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDT(i));
277 for (i = 0; i < 2; i++)
278 regs_buff[39 + i] = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
279 for (i = 0; i < 2; i++)
280 regs_buff[41 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAL(i));
281 for (i = 0; i < 2; i++)
282 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAH(i));
283
284 for (i = 0; i < ARRAY_SIZE(ixgbevf_reg_names); i++)
285 hw_dbg(hw, "%s\t%8.8x\n", ixgbevf_reg_names[i], regs_buff[i]);
286}
287
288static void ixgbevf_get_drvinfo(struct net_device *netdev,
289 struct ethtool_drvinfo *drvinfo)
290{
291 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
292
293 strlcpy(drvinfo->driver, ixgbevf_driver_name, 32);
294 strlcpy(drvinfo->version, ixgbevf_driver_version, 32);
295
296 strlcpy(drvinfo->fw_version, "N/A", 4);
297 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
298}
299
300static void ixgbevf_get_ringparam(struct net_device *netdev,
301 struct ethtool_ringparam *ring)
302{
303 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
304 struct ixgbevf_ring *tx_ring = adapter->tx_ring;
305 struct ixgbevf_ring *rx_ring = adapter->rx_ring;
306
307 ring->rx_max_pending = IXGBEVF_MAX_RXD;
308 ring->tx_max_pending = IXGBEVF_MAX_TXD;
309 ring->rx_mini_max_pending = 0;
310 ring->rx_jumbo_max_pending = 0;
311 ring->rx_pending = rx_ring->count;
312 ring->tx_pending = tx_ring->count;
313 ring->rx_mini_pending = 0;
314 ring->rx_jumbo_pending = 0;
315}
316
317static int ixgbevf_set_ringparam(struct net_device *netdev,
318 struct ethtool_ringparam *ring)
319{
320 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
321 struct ixgbevf_ring *tx_ring = NULL, *rx_ring = NULL;
322 int i, err;
323 u32 new_rx_count, new_tx_count;
324 bool need_tx_update = false;
325 bool need_rx_update = false;
326
327 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
328 return -EINVAL;
329
330 new_rx_count = max(ring->rx_pending, (u32)IXGBEVF_MIN_RXD);
331 new_rx_count = min(new_rx_count, (u32)IXGBEVF_MAX_RXD);
332 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
333
334 new_tx_count = max(ring->tx_pending, (u32)IXGBEVF_MIN_TXD);
335 new_tx_count = min(new_tx_count, (u32)IXGBEVF_MAX_TXD);
336 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
337
338 if ((new_tx_count == adapter->tx_ring->count) &&
339 (new_rx_count == adapter->rx_ring->count)) {
340 /* nothing to do */
341 return 0;
342 }
343
344 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
345 msleep(1);
346
347 if (new_tx_count != adapter->tx_ring_count) {
348 tx_ring = kcalloc(adapter->num_tx_queues,
349 sizeof(struct ixgbevf_ring), GFP_KERNEL);
350 if (!tx_ring) {
351 err = -ENOMEM;
352 goto err_setup;
353 }
354 memcpy(tx_ring, adapter->tx_ring,
355 adapter->num_tx_queues * sizeof(struct ixgbevf_ring));
356 for (i = 0; i < adapter->num_tx_queues; i++) {
357 tx_ring[i].count = new_tx_count;
358 err = ixgbevf_setup_tx_resources(adapter,
359 &tx_ring[i]);
360 if (err) {
361 while (i) {
362 i--;
363 ixgbevf_free_tx_resources(adapter,
364 &tx_ring[i]);
365 }
366 kfree(tx_ring);
367 goto err_setup;
368 }
369 tx_ring[i].v_idx = adapter->tx_ring[i].v_idx;
370 }
371 need_tx_update = true;
372 }
373
374 if (new_rx_count != adapter->rx_ring_count) {
375 rx_ring = kcalloc(adapter->num_rx_queues,
376 sizeof(struct ixgbevf_ring), GFP_KERNEL);
377 if ((!rx_ring) && (need_tx_update)) {
378 err = -ENOMEM;
379 goto err_rx_setup;
380 }
381 memcpy(rx_ring, adapter->rx_ring,
382 adapter->num_rx_queues * sizeof(struct ixgbevf_ring));
383 for (i = 0; i < adapter->num_rx_queues; i++) {
384 rx_ring[i].count = new_rx_count;
385 err = ixgbevf_setup_rx_resources(adapter,
386 &rx_ring[i]);
387 if (err) {
388 while (i) {
389 i--;
390 ixgbevf_free_rx_resources(adapter,
391 &rx_ring[i]);
392 }
393 kfree(rx_ring);
394 goto err_rx_setup;
395 }
396 rx_ring[i].v_idx = adapter->rx_ring[i].v_idx;
397 }
398 need_rx_update = true;
399 }
400
401err_rx_setup:
402 /* if rings need to be updated, here's the place to do it in one shot */
403 if (need_tx_update || need_rx_update) {
404 if (netif_running(netdev))
405 ixgbevf_down(adapter);
406 }
407
408 /* tx */
409 if (need_tx_update) {
410 kfree(adapter->tx_ring);
411 adapter->tx_ring = tx_ring;
412 tx_ring = NULL;
413 adapter->tx_ring_count = new_tx_count;
414 }
415
416 /* rx */
417 if (need_rx_update) {
418 kfree(adapter->rx_ring);
419 adapter->rx_ring = rx_ring;
420 rx_ring = NULL;
421 adapter->rx_ring_count = new_rx_count;
422 }
423
424 /* success! */
425 err = 0;
426 if (netif_running(netdev))
427 ixgbevf_up(adapter);
428
429err_setup:
430 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
431 return err;
432}
433
434static int ixgbevf_get_sset_count(struct net_device *dev, int stringset)
435{
436 switch (stringset) {
437 case ETH_SS_TEST:
438 return IXGBE_TEST_LEN;
439 case ETH_SS_STATS:
440 return IXGBE_GLOBAL_STATS_LEN;
441 default:
442 return -EINVAL;
443 }
444}
445
446static void ixgbevf_get_ethtool_stats(struct net_device *netdev,
447 struct ethtool_stats *stats, u64 *data)
448{
449 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
450 int i;
451
452 ixgbevf_update_stats(adapter);
453 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
454 char *p = (char *)adapter +
455 ixgbe_gstrings_stats[i].stat_offset;
456 char *b = (char *)adapter +
457 ixgbe_gstrings_stats[i].base_stat_offset;
458 data[i] = ((ixgbe_gstrings_stats[i].sizeof_stat ==
459 sizeof(u64)) ? *(u64 *)p : *(u32 *)p) -
460 ((ixgbe_gstrings_stats[i].sizeof_stat ==
461 sizeof(u64)) ? *(u64 *)b : *(u32 *)b);
462 }
463}
464
465static void ixgbevf_get_strings(struct net_device *netdev, u32 stringset,
466 u8 *data)
467{
468 char *p = (char *)data;
469 int i;
470
471 switch (stringset) {
472 case ETH_SS_TEST:
473 memcpy(data, *ixgbe_gstrings_test,
474 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
475 break;
476 case ETH_SS_STATS:
477 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
478 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
479 ETH_GSTRING_LEN);
480 p += ETH_GSTRING_LEN;
481 }
482 break;
483 }
484}
485
486static int ixgbevf_link_test(struct ixgbevf_adapter *adapter, u64 *data)
487{
488 struct ixgbe_hw *hw = &adapter->hw;
489 bool link_up;
490 u32 link_speed = 0;
491 *data = 0;
492
493 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
494 if (!link_up)
495 *data = 1;
496
497 return *data;
498}
499
500/* ethtool register test data */
501struct ixgbevf_reg_test {
502 u16 reg;
503 u8 array_len;
504 u8 test_type;
505 u32 mask;
506 u32 write;
507};
508
509/* In the hardware, registers are laid out either singly, in arrays
510 * spaced 0x40 bytes apart, or in contiguous tables. We assume
511 * most tests take place on arrays or single registers (handled
512 * as a single-element array) and special-case the tables.
513 * Table tests are always pattern tests.
514 *
515 * We also make provision for some required setup steps by specifying
516 * registers to be written without any read-back testing.
517 */
518
519#define PATTERN_TEST 1
520#define SET_READ_TEST 2
521#define WRITE_NO_TEST 3
522#define TABLE32_TEST 4
523#define TABLE64_TEST_LO 5
524#define TABLE64_TEST_HI 6
525
526/* default VF register test */
527static struct ixgbevf_reg_test reg_test_vf[] = {
528 { IXGBE_VFRDBAL(0), 2, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
529 { IXGBE_VFRDBAH(0), 2, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
530 { IXGBE_VFRDLEN(0), 2, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
531 { IXGBE_VFRXDCTL(0), 2, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
532 { IXGBE_VFRDT(0), 2, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
533 { IXGBE_VFRXDCTL(0), 2, WRITE_NO_TEST, 0, 0 },
534 { IXGBE_VFTDBAL(0), 2, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
535 { IXGBE_VFTDBAH(0), 2, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
536 { IXGBE_VFTDLEN(0), 2, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
537 { 0, 0, 0, 0 }
538};
539
540#define REG_PATTERN_TEST(R, M, W) \
541{ \
542 u32 pat, val, before; \
543 const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
544 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { \
545 before = readl(adapter->hw.hw_addr + R); \
546 writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
547 val = readl(adapter->hw.hw_addr + R); \
548 if (val != (_test[pat] & W & M)) { \
549 hw_dbg(&adapter->hw, \
550 "pattern test reg %04X failed: got " \
551 "0x%08X expected 0x%08X\n", \
552 R, val, (_test[pat] & W & M)); \
553 *data = R; \
554 writel(before, adapter->hw.hw_addr + R); \
555 return 1; \
556 } \
557 writel(before, adapter->hw.hw_addr + R); \
558 } \
559}
560
561#define REG_SET_AND_CHECK(R, M, W) \
562{ \
563 u32 val, before; \
564 before = readl(adapter->hw.hw_addr + R); \
565 writel((W & M), (adapter->hw.hw_addr + R)); \
566 val = readl(adapter->hw.hw_addr + R); \
567 if ((W & M) != (val & M)) { \
568 printk(KERN_ERR "set/check reg %04X test failed: got 0x%08X " \
569 "expected 0x%08X\n", R, (val & M), (W & M)); \
570 *data = R; \
571 writel(before, (adapter->hw.hw_addr + R)); \
572 return 1; \
573 } \
574 writel(before, (adapter->hw.hw_addr + R)); \
575}
576
577static int ixgbevf_reg_test(struct ixgbevf_adapter *adapter, u64 *data)
578{
579 struct ixgbevf_reg_test *test;
580 u32 i;
581
582 test = reg_test_vf;
583
584 /*
585 * Perform the register test, looping through the test table
586 * until we either fail or reach the null entry.
587 */
588 while (test->reg) {
589 for (i = 0; i < test->array_len; i++) {
590 switch (test->test_type) {
591 case PATTERN_TEST:
592 REG_PATTERN_TEST(test->reg + (i * 0x40),
593 test->mask,
594 test->write);
595 break;
596 case SET_READ_TEST:
597 REG_SET_AND_CHECK(test->reg + (i * 0x40),
598 test->mask,
599 test->write);
600 break;
601 case WRITE_NO_TEST:
602 writel(test->write,
603 (adapter->hw.hw_addr + test->reg)
604 + (i * 0x40));
605 break;
606 case TABLE32_TEST:
607 REG_PATTERN_TEST(test->reg + (i * 4),
608 test->mask,
609 test->write);
610 break;
611 case TABLE64_TEST_LO:
612 REG_PATTERN_TEST(test->reg + (i * 8),
613 test->mask,
614 test->write);
615 break;
616 case TABLE64_TEST_HI:
617 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
618 test->mask,
619 test->write);
620 break;
621 }
622 }
623 test++;
624 }
625
626 *data = 0;
627 return *data;
628}
629
630static void ixgbevf_diag_test(struct net_device *netdev,
631 struct ethtool_test *eth_test, u64 *data)
632{
633 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
634 bool if_running = netif_running(netdev);
635
636 set_bit(__IXGBEVF_TESTING, &adapter->state);
637 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
638 /* Offline tests */
639
640 hw_dbg(&adapter->hw, "offline testing starting\n");
641
642 /* Link test performed before hardware reset so autoneg doesn't
643 * interfere with test result */
644 if (ixgbevf_link_test(adapter, &data[1]))
645 eth_test->flags |= ETH_TEST_FL_FAILED;
646
647 if (if_running)
648 /* indicate we're in test mode */
649 dev_close(netdev);
650 else
651 ixgbevf_reset(adapter);
652
653 hw_dbg(&adapter->hw, "register testing starting\n");
654 if (ixgbevf_reg_test(adapter, &data[0]))
655 eth_test->flags |= ETH_TEST_FL_FAILED;
656
657 ixgbevf_reset(adapter);
658
659 clear_bit(__IXGBEVF_TESTING, &adapter->state);
660 if (if_running)
661 dev_open(netdev);
662 } else {
663 hw_dbg(&adapter->hw, "online testing starting\n");
664 /* Online tests */
665 if (ixgbevf_link_test(adapter, &data[1]))
666 eth_test->flags |= ETH_TEST_FL_FAILED;
667
668 /* Online tests aren't run; pass by default */
669 data[0] = 0;
670
671 clear_bit(__IXGBEVF_TESTING, &adapter->state);
672 }
673 msleep_interruptible(4 * 1000);
674}
675
676static int ixgbevf_nway_reset(struct net_device *netdev)
677{
678 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
679
680 if (netif_running(netdev)) {
681 if (!adapter->dev_closed)
682 ixgbevf_reinit_locked(adapter);
683 }
684
685 return 0;
686}
687
688static struct ethtool_ops ixgbevf_ethtool_ops = {
689 .get_settings = ixgbevf_get_settings,
690 .get_drvinfo = ixgbevf_get_drvinfo,
691 .get_regs_len = ixgbevf_get_regs_len,
692 .get_regs = ixgbevf_get_regs,
693 .nway_reset = ixgbevf_nway_reset,
694 .get_link = ethtool_op_get_link,
695 .get_ringparam = ixgbevf_get_ringparam,
696 .set_ringparam = ixgbevf_set_ringparam,
697 .get_rx_csum = ixgbevf_get_rx_csum,
698 .set_rx_csum = ixgbevf_set_rx_csum,
699 .get_tx_csum = ethtool_op_get_tx_csum,
700 .set_tx_csum = ethtool_op_set_tx_ipv6_csum,
701 .get_sg = ethtool_op_get_sg,
702 .set_sg = ethtool_op_set_sg,
703 .get_msglevel = ixgbevf_get_msglevel,
704 .set_msglevel = ixgbevf_set_msglevel,
705 .get_tso = ethtool_op_get_tso,
706 .set_tso = ixgbevf_set_tso,
707 .self_test = ixgbevf_diag_test,
708 .get_sset_count = ixgbevf_get_sset_count,
709 .get_strings = ixgbevf_get_strings,
710 .get_ethtool_stats = ixgbevf_get_ethtool_stats,
711};
712
713void ixgbevf_set_ethtool_ops(struct net_device *netdev)
714{
715 SET_ETHTOOL_OPS(netdev, &ixgbevf_ethtool_ops);
716}
diff --git a/drivers/net/ixgbevf/ixgbevf.h b/drivers/net/ixgbevf/ixgbevf.h
new file mode 100644
index 000000000000..f7015efbff05
--- /dev/null
+++ b/drivers/net/ixgbevf/ixgbevf.h
@@ -0,0 +1,318 @@
1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#ifndef _IXGBEVF_H_
29#define _IXGBEVF_H_
30
31#include <linux/types.h>
32#include <linux/timer.h>
33#include <linux/io.h>
34#include <linux/netdevice.h>
35
36#include "vf.h"
37
38/* wrapper around a pointer to a socket buffer,
39 * so a DMA handle can be stored along with the buffer */
40struct ixgbevf_tx_buffer {
41 struct sk_buff *skb;
42 dma_addr_t dma;
43 unsigned long time_stamp;
44 u16 length;
45 u16 next_to_watch;
46 u16 mapped_as_page;
47};
48
49struct ixgbevf_rx_buffer {
50 struct sk_buff *skb;
51 dma_addr_t dma;
52 struct page *page;
53 dma_addr_t page_dma;
54 unsigned int page_offset;
55};
56
57struct ixgbevf_ring {
58 struct ixgbevf_adapter *adapter; /* backlink */
59 void *desc; /* descriptor ring memory */
60 dma_addr_t dma; /* phys. address of descriptor ring */
61 unsigned int size; /* length in bytes */
62 unsigned int count; /* amount of descriptors */
63 unsigned int next_to_use;
64 unsigned int next_to_clean;
65
66 int queue_index; /* needed for multiqueue queue management */
67 union {
68 struct ixgbevf_tx_buffer *tx_buffer_info;
69 struct ixgbevf_rx_buffer *rx_buffer_info;
70 };
71
72 u16 head;
73 u16 tail;
74
75 unsigned int total_bytes;
76 unsigned int total_packets;
77
78 u16 reg_idx; /* holds the special value that gets the hardware register
79 * offset associated with this ring, which is different
80 * for DCB and RSS modes */
81
82#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
83 /* cpu for tx queue */
84 int cpu;
85#endif
86
87 u64 v_idx; /* maps directly to the index for this ring in the hardware
88 * vector array, can also be used for finding the bit in EICR
89 * and friends that represents the vector for this ring */
90
91 u16 work_limit; /* max work per interrupt */
92 u16 rx_buf_len;
93};
94
95enum ixgbevf_ring_f_enum {
96 RING_F_NONE = 0,
97 RING_F_ARRAY_SIZE /* must be last in enum set */
98};
99
100struct ixgbevf_ring_feature {
101 int indices;
102 int mask;
103};
104
105/* How many Rx Buffers do we bundle into one write to the hardware ? */
106#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
107
108#define MAX_RX_QUEUES 1
109#define MAX_TX_QUEUES 1
110
111#define IXGBEVF_DEFAULT_TXD 1024
112#define IXGBEVF_DEFAULT_RXD 512
113#define IXGBEVF_MAX_TXD 4096
114#define IXGBEVF_MIN_TXD 64
115#define IXGBEVF_MAX_RXD 4096
116#define IXGBEVF_MIN_RXD 64
117
118/* Supported Rx Buffer Sizes */
119#define IXGBEVF_RXBUFFER_64 64 /* Used for packet split */
120#define IXGBEVF_RXBUFFER_128 128 /* Used for packet split */
121#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
122#define IXGBEVF_RXBUFFER_2048 2048
123#define IXGBEVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
124
125#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
126
127#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
128
129#define IXGBE_TX_FLAGS_CSUM (u32)(1)
130#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
131#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
132#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
133#define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
134#define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
135#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
136#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
137#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
138
139/* MAX_MSIX_Q_VECTORS of these are allocated,
140 * but we only use one per queue-specific vector.
141 */
142struct ixgbevf_q_vector {
143 struct ixgbevf_adapter *adapter;
144 struct napi_struct napi;
145 DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
146 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
147 u8 rxr_count; /* Rx ring count assigned to this vector */
148 u8 txr_count; /* Tx ring count assigned to this vector */
149 u8 tx_itr;
150 u8 rx_itr;
151 u32 eitr;
152 int v_idx; /* vector index in list */
153};
154
155/* Helper macros to switch between ints/sec and what the register uses.
156 * And yes, it's the same math going both ways. The lowest value
157 * supported by all of the ixgbe hardware is 8.
158 */
159#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
160 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
161#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
162
163#define IXGBE_DESC_UNUSED(R) \
164 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
165 (R)->next_to_clean - (R)->next_to_use - 1)
166
167#define IXGBE_RX_DESC_ADV(R, i) \
168 (&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
169#define IXGBE_TX_DESC_ADV(R, i) \
170 (&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
171#define IXGBE_TX_CTXTDESC_ADV(R, i) \
172 (&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
173
174#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
175
176#define OTHER_VECTOR 1
177#define NON_Q_VECTORS (OTHER_VECTOR)
178
179#define MAX_MSIX_Q_VECTORS 2
180#define MAX_MSIX_COUNT 2
181
182#define MIN_MSIX_Q_VECTORS 2
183#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
184
185/* board specific private data structure */
186struct ixgbevf_adapter {
187 struct timer_list watchdog_timer;
188#ifdef NETIF_F_HW_VLAN_TX
189 struct vlan_group *vlgrp;
190#endif
191 u16 bd_number;
192 struct work_struct reset_task;
193 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
194 char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
195
196 /* Interrupt Throttle Rate */
197 u32 itr_setting;
198 u16 eitr_low;
199 u16 eitr_high;
200
201 /* TX */
202 struct ixgbevf_ring *tx_ring; /* One per active queue */
203 int num_tx_queues;
204 u64 restart_queue;
205 u64 hw_csum_tx_good;
206 u64 lsc_int;
207 u64 hw_tso_ctxt;
208 u64 hw_tso6_ctxt;
209 u32 tx_timeout_count;
210 bool detect_tx_hung;
211
212 /* RX */
213 struct ixgbevf_ring *rx_ring; /* One per active queue */
214 int num_rx_queues;
215 int num_rx_pools; /* == num_rx_queues in 82598 */
216 int num_rx_queues_per_pool; /* 1 if 82598, can be many if 82599 */
217 u64 hw_csum_rx_error;
218 u64 hw_rx_no_dma_resources;
219 u64 hw_csum_rx_good;
220 u64 non_eop_descs;
221 int num_msix_vectors;
222 int max_msix_q_vectors; /* true count of q_vectors for device */
223 struct ixgbevf_ring_feature ring_feature[RING_F_ARRAY_SIZE];
224 struct msix_entry *msix_entries;
225
226 u64 rx_hdr_split;
227 u32 alloc_rx_page_failed;
228 u32 alloc_rx_buff_failed;
229
230 /* Some features need tri-state capability,
231 * thus the additional *_CAPABLE flags.
232 */
233 u32 flags;
234#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
235#define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 1)
236#define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 2)
237#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 3)
238#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 4)
239#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 5)
240#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 6)
241#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 7)
242#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 8)
243 /* OS defined structs */
244 struct net_device *netdev;
245 struct pci_dev *pdev;
246 struct net_device_stats net_stats;
247
248 /* structs defined in ixgbe_vf.h */
249 struct ixgbe_hw hw;
250 u16 msg_enable;
251 struct ixgbevf_hw_stats stats;
252 u64 zero_base;
253 /* Interrupt Throttle Rate */
254 u32 eitr_param;
255
256 unsigned long state;
257 u32 *config_space;
258 u64 tx_busy;
259 unsigned int tx_ring_count;
260 unsigned int rx_ring_count;
261
262 u32 link_speed;
263 bool link_up;
264 unsigned long link_check_timeout;
265
266 struct work_struct watchdog_task;
267 bool netdev_registered;
268 bool dev_closed;
269};
270
271enum ixbgevf_state_t {
272 __IXGBEVF_TESTING,
273 __IXGBEVF_RESETTING,
274 __IXGBEVF_DOWN
275};
276
277enum ixgbevf_boards {
278 board_82599_vf,
279};
280
281extern struct ixgbevf_info ixgbevf_vf_info;
282extern struct ixgbe_mac_operations ixgbevf_mbx_ops;
283
284/* needed by ethtool.c */
285extern char ixgbevf_driver_name[];
286extern const char ixgbevf_driver_version[];
287
288extern int ixgbevf_up(struct ixgbevf_adapter *adapter);
289extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
290extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
291extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
292extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
293extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
294 struct ixgbevf_ring *);
295extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
296 struct ixgbevf_ring *);
297extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
298 struct ixgbevf_ring *);
299extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
300 struct ixgbevf_ring *);
301extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
302
303#ifdef ETHTOOL_OPS_COMPAT
304extern int ethtool_ioctl(struct ifreq *ifr);
305
306#endif
307extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
308extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
309
310#ifdef DEBUG
311extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
312#define hw_dbg(hw, format, arg...) \
313 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
314#else
315#define hw_dbg(hw, format, arg...) do {} while (0)
316#endif
317
318#endif /* _IXGBEVF_H_ */
diff --git a/drivers/net/ixgbevf/ixgbevf_main.c b/drivers/net/ixgbevf/ixgbevf_main.c
new file mode 100644
index 000000000000..39544afdc57f
--- /dev/null
+++ b/drivers/net/ixgbevf/ixgbevf_main.c
@@ -0,0 +1,3571 @@
1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/ethtool.h>
45#include <linux/if_vlan.h>
46
47#include "ixgbevf.h"
48
49char ixgbevf_driver_name[] = "ixgbevf";
50static const char ixgbevf_driver_string[] =
51 "Intel(R) 82599 Virtual Function";
52
53#define DRV_VERSION "1.0.0-k0"
54const char ixgbevf_driver_version[] = DRV_VERSION;
55static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
56
57static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
58 [board_82599_vf] = &ixgbevf_vf_info,
59};
60
61/* ixgbevf_pci_tbl - PCI Device ID Table
62 *
63 * Wildcard entries (PCI_ANY_ID) should come last
64 * Last entry must be all 0s
65 *
66 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
67 * Class, Class Mask, private data (not used) }
68 */
69static struct pci_device_id ixgbevf_pci_tbl[] = {
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
71 board_82599_vf},
72
73 /* required last entry */
74 {0, }
75};
76MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
77
78MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
79MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
80MODULE_LICENSE("GPL");
81MODULE_VERSION(DRV_VERSION);
82
83#define DEFAULT_DEBUG_LEVEL_SHIFT 3
84
85/* forward decls */
86static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
87static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
88 u32 itr_reg);
89
90static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
91 struct ixgbevf_ring *rx_ring,
92 u32 val)
93{
94 /*
95 * Force memory writes to complete before letting h/w
96 * know there are new descriptors to fetch. (Only
97 * applicable for weak-ordered memory model archs,
98 * such as IA-64).
99 */
100 wmb();
101 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
102}
103
104/*
105 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
106 * @adapter: pointer to adapter struct
107 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
108 * @queue: queue to map the corresponding interrupt to
109 * @msix_vector: the vector to map to the corresponding queue
110 *
111 */
112static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
113 u8 queue, u8 msix_vector)
114{
115 u32 ivar, index;
116 struct ixgbe_hw *hw = &adapter->hw;
117 if (direction == -1) {
118 /* other causes */
119 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
120 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
121 ivar &= ~0xFF;
122 ivar |= msix_vector;
123 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
124 } else {
125 /* tx or rx causes */
126 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
127 index = ((16 * (queue & 1)) + (8 * direction));
128 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
129 ivar &= ~(0xFF << index);
130 ivar |= (msix_vector << index);
131 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
132 }
133}
134
135static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
136 struct ixgbevf_tx_buffer
137 *tx_buffer_info)
138{
139 if (tx_buffer_info->dma) {
140 if (tx_buffer_info->mapped_as_page)
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length,
144 PCI_DMA_TODEVICE);
145 else
146 pci_unmap_single(adapter->pdev,
147 tx_buffer_info->dma,
148 tx_buffer_info->length,
149 PCI_DMA_TODEVICE);
150 tx_buffer_info->dma = 0;
151 }
152 if (tx_buffer_info->skb) {
153 dev_kfree_skb_any(tx_buffer_info->skb);
154 tx_buffer_info->skb = NULL;
155 }
156 tx_buffer_info->time_stamp = 0;
157 /* tx_buffer_info must be completely set up in the transmit path */
158}
159
160static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
161 struct ixgbevf_ring *tx_ring,
162 unsigned int eop)
163{
164 struct ixgbe_hw *hw = &adapter->hw;
165 u32 head, tail;
166
167 /* Detect a transmit hang in hardware, this serializes the
168 * check with the clearing of time_stamp and movement of eop */
169 head = readl(hw->hw_addr + tx_ring->head);
170 tail = readl(hw->hw_addr + tx_ring->tail);
171 adapter->detect_tx_hung = false;
172 if ((head != tail) &&
173 tx_ring->tx_buffer_info[eop].time_stamp &&
174 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
175 /* detected Tx unit hang */
176 union ixgbe_adv_tx_desc *tx_desc;
177 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
178 printk(KERN_ERR "Detected Tx Unit Hang\n"
179 " Tx Queue <%d>\n"
180 " TDH, TDT <%x>, <%x>\n"
181 " next_to_use <%x>\n"
182 " next_to_clean <%x>\n"
183 "tx_buffer_info[next_to_clean]\n"
184 " time_stamp <%lx>\n"
185 " jiffies <%lx>\n",
186 tx_ring->queue_index,
187 head, tail,
188 tx_ring->next_to_use, eop,
189 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
190 return true;
191 }
192
193 return false;
194}
195
196#define IXGBE_MAX_TXD_PWR 14
197#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
198
199/* Tx Descriptors needed, worst case */
200#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
201 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
202#ifdef MAX_SKB_FRAGS
203#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
205#else
206#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
207#endif
208
209static void ixgbevf_tx_timeout(struct net_device *netdev);
210
211/**
212 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
213 * @adapter: board private structure
214 * @tx_ring: tx ring to clean
215 **/
216static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
217 struct ixgbevf_ring *tx_ring)
218{
219 struct net_device *netdev = adapter->netdev;
220 struct ixgbe_hw *hw = &adapter->hw;
221 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
222 struct ixgbevf_tx_buffer *tx_buffer_info;
223 unsigned int i, eop, count = 0;
224 unsigned int total_bytes = 0, total_packets = 0;
225
226 i = tx_ring->next_to_clean;
227 eop = tx_ring->tx_buffer_info[i].next_to_watch;
228 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
229
230 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
231 (count < tx_ring->work_limit)) {
232 bool cleaned = false;
233 for ( ; !cleaned; count++) {
234 struct sk_buff *skb;
235 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
236 tx_buffer_info = &tx_ring->tx_buffer_info[i];
237 cleaned = (i == eop);
238 skb = tx_buffer_info->skb;
239
240 if (cleaned && skb) {
241 unsigned int segs, bytecount;
242
243 /* gso_segs is currently only valid for tcp */
244 segs = skb_shinfo(skb)->gso_segs ?: 1;
245 /* multiply data chunks by size of headers */
246 bytecount = ((segs - 1) * skb_headlen(skb)) +
247 skb->len;
248 total_packets += segs;
249 total_bytes += bytecount;
250 }
251
252 ixgbevf_unmap_and_free_tx_resource(adapter,
253 tx_buffer_info);
254
255 tx_desc->wb.status = 0;
256
257 i++;
258 if (i == tx_ring->count)
259 i = 0;
260 }
261
262 eop = tx_ring->tx_buffer_info[i].next_to_watch;
263 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
264 }
265
266 tx_ring->next_to_clean = i;
267
268#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
269 if (unlikely(count && netif_carrier_ok(netdev) &&
270 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
271 /* Make sure that anybody stopping the queue after this
272 * sees the new next_to_clean.
273 */
274 smp_mb();
275#ifdef HAVE_TX_MQ
276 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
277 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
278 netif_wake_subqueue(netdev, tx_ring->queue_index);
279 ++adapter->restart_queue;
280 }
281#else
282 if (netif_queue_stopped(netdev) &&
283 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
284 netif_wake_queue(netdev);
285 ++adapter->restart_queue;
286 }
287#endif
288 }
289
290 if (adapter->detect_tx_hung) {
291 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
292 /* schedule immediate reset if we believe we hung */
293 printk(KERN_INFO
294 "tx hang %d detected, resetting adapter\n",
295 adapter->tx_timeout_count + 1);
296 ixgbevf_tx_timeout(adapter->netdev);
297 }
298 }
299
300 /* re-arm the interrupt */
301 if ((count >= tx_ring->work_limit) &&
302 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
303 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
304 }
305
306 tx_ring->total_bytes += total_bytes;
307 tx_ring->total_packets += total_packets;
308
309 adapter->net_stats.tx_bytes += total_bytes;
310 adapter->net_stats.tx_packets += total_packets;
311
312 return (count < tx_ring->work_limit);
313}
314
315/**
316 * ixgbevf_receive_skb - Send a completed packet up the stack
317 * @q_vector: structure containing interrupt and ring information
318 * @skb: packet to send up
319 * @status: hardware indication of status of receive
320 * @rx_ring: rx descriptor ring (for a specific queue) to setup
321 * @rx_desc: rx descriptor
322 **/
323static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
324 struct sk_buff *skb, u8 status,
325 struct ixgbevf_ring *ring,
326 union ixgbe_adv_rx_desc *rx_desc)
327{
328 struct ixgbevf_adapter *adapter = q_vector->adapter;
329 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
330 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
331 int ret;
332
333 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
334 if (adapter->vlgrp && is_vlan)
335 vlan_gro_receive(&q_vector->napi,
336 adapter->vlgrp,
337 tag, skb);
338 else
339 napi_gro_receive(&q_vector->napi, skb);
340 } else {
341 if (adapter->vlgrp && is_vlan)
342 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
343 else
344 ret = netif_rx(skb);
345 }
346}
347
348/**
349 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
350 * @adapter: address of board private structure
351 * @status_err: hardware indication of status of receive
352 * @skb: skb currently being received and modified
353 **/
354static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
355 u32 status_err, struct sk_buff *skb)
356{
357 skb->ip_summed = CHECKSUM_NONE;
358
359 /* Rx csum disabled */
360 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
361 return;
362
363 /* if IP and error */
364 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
365 (status_err & IXGBE_RXDADV_ERR_IPE)) {
366 adapter->hw_csum_rx_error++;
367 return;
368 }
369
370 if (!(status_err & IXGBE_RXD_STAT_L4CS))
371 return;
372
373 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
374 adapter->hw_csum_rx_error++;
375 return;
376 }
377
378 /* It must be a TCP or UDP packet with a valid checksum */
379 skb->ip_summed = CHECKSUM_UNNECESSARY;
380 adapter->hw_csum_rx_good++;
381}
382
383/**
384 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
385 * @adapter: address of board private structure
386 **/
387static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
388 struct ixgbevf_ring *rx_ring,
389 int cleaned_count)
390{
391 struct pci_dev *pdev = adapter->pdev;
392 union ixgbe_adv_rx_desc *rx_desc;
393 struct ixgbevf_rx_buffer *bi;
394 struct sk_buff *skb;
395 unsigned int i;
396 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
397
398 i = rx_ring->next_to_use;
399 bi = &rx_ring->rx_buffer_info[i];
400
401 while (cleaned_count--) {
402 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
403
404 if (!bi->page_dma &&
405 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
406 if (!bi->page) {
407 bi->page = netdev_alloc_page(adapter->netdev);
408 if (!bi->page) {
409 adapter->alloc_rx_page_failed++;
410 goto no_buffers;
411 }
412 bi->page_offset = 0;
413 } else {
414 /* use a half page if we're re-using */
415 bi->page_offset ^= (PAGE_SIZE / 2);
416 }
417
418 bi->page_dma = pci_map_page(pdev, bi->page,
419 bi->page_offset,
420 (PAGE_SIZE / 2),
421 PCI_DMA_FROMDEVICE);
422 }
423
424 skb = bi->skb;
425 if (!skb) {
426 skb = netdev_alloc_skb(adapter->netdev,
427 bufsz);
428
429 if (!skb) {
430 adapter->alloc_rx_buff_failed++;
431 goto no_buffers;
432 }
433
434 /*
435 * Make buffer alignment 2 beyond a 16 byte boundary
436 * this will result in a 16 byte aligned IP header after
437 * the 14 byte MAC header is removed
438 */
439 skb_reserve(skb, NET_IP_ALIGN);
440
441 bi->skb = skb;
442 }
443 if (!bi->dma) {
444 bi->dma = pci_map_single(pdev, skb->data,
445 rx_ring->rx_buf_len,
446 PCI_DMA_FROMDEVICE);
447 }
448 /* Refresh the desc even if buffer_addrs didn't change because
449 * each write-back erases this info. */
450 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
451 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
452 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
453 } else {
454 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
455 }
456
457 i++;
458 if (i == rx_ring->count)
459 i = 0;
460 bi = &rx_ring->rx_buffer_info[i];
461 }
462
463no_buffers:
464 if (rx_ring->next_to_use != i) {
465 rx_ring->next_to_use = i;
466 if (i-- == 0)
467 i = (rx_ring->count - 1);
468
469 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
470 }
471}
472
473static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
474 u64 qmask)
475{
476 u32 mask;
477 struct ixgbe_hw *hw = &adapter->hw;
478
479 mask = (qmask & 0xFFFFFFFF);
480 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
481}
482
483static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
484{
485 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
486}
487
488static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
489{
490 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
491}
492
493static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
494 struct ixgbevf_ring *rx_ring,
495 int *work_done, int work_to_do)
496{
497 struct ixgbevf_adapter *adapter = q_vector->adapter;
498 struct pci_dev *pdev = adapter->pdev;
499 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
500 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
501 struct sk_buff *skb;
502 unsigned int i;
503 u32 len, staterr;
504 u16 hdr_info;
505 bool cleaned = false;
506 int cleaned_count = 0;
507 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
508
509 i = rx_ring->next_to_clean;
510 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
511 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
512 rx_buffer_info = &rx_ring->rx_buffer_info[i];
513
514 while (staterr & IXGBE_RXD_STAT_DD) {
515 u32 upper_len = 0;
516 if (*work_done >= work_to_do)
517 break;
518 (*work_done)++;
519
520 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
521 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
522 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
523 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
524 if (hdr_info & IXGBE_RXDADV_SPH)
525 adapter->rx_hdr_split++;
526 if (len > IXGBEVF_RX_HDR_SIZE)
527 len = IXGBEVF_RX_HDR_SIZE;
528 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
529 } else {
530 len = le16_to_cpu(rx_desc->wb.upper.length);
531 }
532 cleaned = true;
533 skb = rx_buffer_info->skb;
534 prefetch(skb->data - NET_IP_ALIGN);
535 rx_buffer_info->skb = NULL;
536
537 if (rx_buffer_info->dma) {
538 pci_unmap_single(pdev, rx_buffer_info->dma,
539 rx_ring->rx_buf_len,
540 PCI_DMA_FROMDEVICE);
541 rx_buffer_info->dma = 0;
542 skb_put(skb, len);
543 }
544
545 if (upper_len) {
546 pci_unmap_page(pdev, rx_buffer_info->page_dma,
547 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
548 rx_buffer_info->page_dma = 0;
549 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
550 rx_buffer_info->page,
551 rx_buffer_info->page_offset,
552 upper_len);
553
554 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
555 (page_count(rx_buffer_info->page) != 1))
556 rx_buffer_info->page = NULL;
557 else
558 get_page(rx_buffer_info->page);
559
560 skb->len += upper_len;
561 skb->data_len += upper_len;
562 skb->truesize += upper_len;
563 }
564
565 i++;
566 if (i == rx_ring->count)
567 i = 0;
568
569 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
570 prefetch(next_rxd);
571 cleaned_count++;
572
573 next_buffer = &rx_ring->rx_buffer_info[i];
574
575 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
576 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
577 rx_buffer_info->skb = next_buffer->skb;
578 rx_buffer_info->dma = next_buffer->dma;
579 next_buffer->skb = skb;
580 next_buffer->dma = 0;
581 } else {
582 skb->next = next_buffer->skb;
583 skb->next->prev = skb;
584 }
585 adapter->non_eop_descs++;
586 goto next_desc;
587 }
588
589 /* ERR_MASK will only have valid bits if EOP set */
590 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
591 dev_kfree_skb_irq(skb);
592 goto next_desc;
593 }
594
595 ixgbevf_rx_checksum(adapter, staterr, skb);
596
597 /* probably a little skewed due to removing CRC */
598 total_rx_bytes += skb->len;
599 total_rx_packets++;
600
601 /*
602 * Work around issue of some types of VM to VM loop back
603 * packets not getting split correctly
604 */
605 if (staterr & IXGBE_RXD_STAT_LB) {
606 u32 header_fixup_len = skb->len - skb->data_len;
607 if (header_fixup_len < 14)
608 skb_push(skb, header_fixup_len);
609 }
610 skb->protocol = eth_type_trans(skb, adapter->netdev);
611
612 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
613 adapter->netdev->last_rx = jiffies;
614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
754 /* XXX for_each_bit(...) */
755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
949
950 return;
951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
959
960 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
961 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
962
963 return IRQ_HANDLED;
964}
965
966static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
967{
968 struct ixgbevf_q_vector *q_vector = data;
969 struct ixgbevf_adapter *adapter = q_vector->adapter;
970 struct ixgbevf_ring *tx_ring;
971 int i, r_idx;
972
973 if (!q_vector->txr_count)
974 return IRQ_HANDLED;
975
976 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
977 for (i = 0; i < q_vector->txr_count; i++) {
978 tx_ring = &(adapter->tx_ring[r_idx]);
979 tx_ring->total_bytes = 0;
980 tx_ring->total_packets = 0;
981 ixgbevf_clean_tx_irq(adapter, tx_ring);
982 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
983 r_idx + 1);
984 }
985
986 if (adapter->itr_setting & 1)
987 ixgbevf_set_itr_msix(q_vector);
988
989 return IRQ_HANDLED;
990}
991
992/**
993 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
994 * @irq: unused
995 * @data: pointer to our q_vector struct for this interrupt vector
996 **/
997static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
998{
999 struct ixgbevf_q_vector *q_vector = data;
1000 struct ixgbevf_adapter *adapter = q_vector->adapter;
1001 struct ixgbe_hw *hw = &adapter->hw;
1002 struct ixgbevf_ring *rx_ring;
1003 int r_idx;
1004 int i;
1005
1006 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1007 for (i = 0; i < q_vector->rxr_count; i++) {
1008 rx_ring = &(adapter->rx_ring[r_idx]);
1009 rx_ring->total_bytes = 0;
1010 rx_ring->total_packets = 0;
1011 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1012 r_idx + 1);
1013 }
1014
1015 if (!q_vector->rxr_count)
1016 return IRQ_HANDLED;
1017
1018 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1019 rx_ring = &(adapter->rx_ring[r_idx]);
1020 /* disable interrupts on this vector only */
1021 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1022 napi_schedule(&q_vector->napi);
1023
1024
1025 return IRQ_HANDLED;
1026}
1027
1028static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1029{
1030 ixgbevf_msix_clean_rx(irq, data);
1031 ixgbevf_msix_clean_tx(irq, data);
1032
1033 return IRQ_HANDLED;
1034}
1035
1036static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1037 int r_idx)
1038{
1039 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1040
1041 set_bit(r_idx, q_vector->rxr_idx);
1042 q_vector->rxr_count++;
1043 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1044}
1045
1046static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1047 int t_idx)
1048{
1049 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1050
1051 set_bit(t_idx, q_vector->txr_idx);
1052 q_vector->txr_count++;
1053 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1054}
1055
1056/**
1057 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1058 * @adapter: board private structure to initialize
1059 *
1060 * This function maps descriptor rings to the queue-specific vectors
1061 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1062 * one vector per ring/queue, but on a constrained vector budget, we
1063 * group the rings as "efficiently" as possible. You would add new
1064 * mapping configurations in here.
1065 **/
1066static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1067{
1068 int q_vectors;
1069 int v_start = 0;
1070 int rxr_idx = 0, txr_idx = 0;
1071 int rxr_remaining = adapter->num_rx_queues;
1072 int txr_remaining = adapter->num_tx_queues;
1073 int i, j;
1074 int rqpv, tqpv;
1075 int err = 0;
1076
1077 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1078
1079 /*
1080 * The ideal configuration...
1081 * We have enough vectors to map one per queue.
1082 */
1083 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1084 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1085 map_vector_to_rxq(adapter, v_start, rxr_idx);
1086
1087 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1088 map_vector_to_txq(adapter, v_start, txr_idx);
1089 goto out;
1090 }
1091
1092 /*
1093 * If we don't have enough vectors for a 1-to-1
1094 * mapping, we'll have to group them so there are
1095 * multiple queues per vector.
1096 */
1097 /* Re-adjusting *qpv takes care of the remainder. */
1098 for (i = v_start; i < q_vectors; i++) {
1099 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1100 for (j = 0; j < rqpv; j++) {
1101 map_vector_to_rxq(adapter, i, rxr_idx);
1102 rxr_idx++;
1103 rxr_remaining--;
1104 }
1105 }
1106 for (i = v_start; i < q_vectors; i++) {
1107 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1108 for (j = 0; j < tqpv; j++) {
1109 map_vector_to_txq(adapter, i, txr_idx);
1110 txr_idx++;
1111 txr_remaining--;
1112 }
1113 }
1114
1115out:
1116 return err;
1117}
1118
1119/**
1120 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1121 * @adapter: board private structure
1122 *
1123 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1124 * interrupts from the kernel.
1125 **/
1126static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1127{
1128 struct net_device *netdev = adapter->netdev;
1129 irqreturn_t (*handler)(int, void *);
1130 int i, vector, q_vectors, err;
1131 int ri = 0, ti = 0;
1132
1133 /* Decrement for Other and TCP Timer vectors */
1134 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1135
1136#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1137 ? &ixgbevf_msix_clean_many : \
1138 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1139 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1140 NULL)
1141 for (vector = 0; vector < q_vectors; vector++) {
1142 handler = SET_HANDLER(adapter->q_vector[vector]);
1143
1144 if (handler == &ixgbevf_msix_clean_rx) {
1145 sprintf(adapter->name[vector], "%s-%s-%d",
1146 netdev->name, "rx", ri++);
1147 } else if (handler == &ixgbevf_msix_clean_tx) {
1148 sprintf(adapter->name[vector], "%s-%s-%d",
1149 netdev->name, "tx", ti++);
1150 } else if (handler == &ixgbevf_msix_clean_many) {
1151 sprintf(adapter->name[vector], "%s-%s-%d",
1152 netdev->name, "TxRx", vector);
1153 } else {
1154 /* skip this unused q_vector */
1155 continue;
1156 }
1157 err = request_irq(adapter->msix_entries[vector].vector,
1158 handler, 0, adapter->name[vector],
1159 adapter->q_vector[vector]);
1160 if (err) {
1161 hw_dbg(&adapter->hw,
1162 "request_irq failed for MSIX interrupt "
1163 "Error: %d\n", err);
1164 goto free_queue_irqs;
1165 }
1166 }
1167
1168 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1169 err = request_irq(adapter->msix_entries[vector].vector,
1170 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1171 if (err) {
1172 hw_dbg(&adapter->hw,
1173 "request_irq for msix_mbx failed: %d\n", err);
1174 goto free_queue_irqs;
1175 }
1176
1177 return 0;
1178
1179free_queue_irqs:
1180 for (i = vector - 1; i >= 0; i--)
1181 free_irq(adapter->msix_entries[--vector].vector,
1182 &(adapter->q_vector[i]));
1183 pci_disable_msix(adapter->pdev);
1184 kfree(adapter->msix_entries);
1185 adapter->msix_entries = NULL;
1186 return err;
1187}
1188
1189static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1190{
1191 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1192
1193 for (i = 0; i < q_vectors; i++) {
1194 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1195 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1196 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1197 q_vector->rxr_count = 0;
1198 q_vector->txr_count = 0;
1199 q_vector->eitr = adapter->eitr_param;
1200 }
1201}
1202
1203/**
1204 * ixgbevf_request_irq - initialize interrupts
1205 * @adapter: board private structure
1206 *
1207 * Attempts to configure interrupts using the best available
1208 * capabilities of the hardware and kernel.
1209 **/
1210static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1211{
1212 int err = 0;
1213
1214 err = ixgbevf_request_msix_irqs(adapter);
1215
1216 if (err)
1217 hw_dbg(&adapter->hw,
1218 "request_irq failed, Error %d\n", err);
1219
1220 return err;
1221}
1222
1223static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1224{
1225 struct net_device *netdev = adapter->netdev;
1226 int i, q_vectors;
1227
1228 q_vectors = adapter->num_msix_vectors;
1229
1230 i = q_vectors - 1;
1231
1232 free_irq(adapter->msix_entries[i].vector, netdev);
1233 i--;
1234
1235 for (; i >= 0; i--) {
1236 free_irq(adapter->msix_entries[i].vector,
1237 adapter->q_vector[i]);
1238 }
1239
1240 ixgbevf_reset_q_vectors(adapter);
1241}
1242
1243/**
1244 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1245 * @adapter: board private structure
1246 **/
1247static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1248{
1249 int i;
1250 struct ixgbe_hw *hw = &adapter->hw;
1251
1252 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1253
1254 IXGBE_WRITE_FLUSH(hw);
1255
1256 for (i = 0; i < adapter->num_msix_vectors; i++)
1257 synchronize_irq(adapter->msix_entries[i].vector);
1258}
1259
1260/**
1261 * ixgbevf_irq_enable - Enable default interrupt generation settings
1262 * @adapter: board private structure
1263 **/
1264static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1265 bool queues, bool flush)
1266{
1267 struct ixgbe_hw *hw = &adapter->hw;
1268 u32 mask;
1269 u64 qmask;
1270
1271 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1272 qmask = ~0;
1273
1274 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1275
1276 if (queues)
1277 ixgbevf_irq_enable_queues(adapter, qmask);
1278
1279 if (flush)
1280 IXGBE_WRITE_FLUSH(hw);
1281}
1282
1283/**
1284 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1285 * @adapter: board private structure
1286 *
1287 * Configure the Tx unit of the MAC after a reset.
1288 **/
1289static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1290{
1291 u64 tdba;
1292 struct ixgbe_hw *hw = &adapter->hw;
1293 u32 i, j, tdlen, txctrl;
1294
1295 /* Setup the HW Tx Head and Tail descriptor pointers */
1296 for (i = 0; i < adapter->num_tx_queues; i++) {
1297 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1298 j = ring->reg_idx;
1299 tdba = ring->dma;
1300 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1301 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1302 (tdba & DMA_BIT_MASK(32)));
1303 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1304 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1305 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1306 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1307 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1308 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1309 /* Disable Tx Head Writeback RO bit, since this hoses
1310 * bookkeeping if things aren't delivered in order.
1311 */
1312 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1313 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1314 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1315 }
1316}
1317
1318#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1319
1320static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1321{
1322 struct ixgbevf_ring *rx_ring;
1323 struct ixgbe_hw *hw = &adapter->hw;
1324 u32 srrctl;
1325
1326 rx_ring = &adapter->rx_ring[index];
1327
1328 srrctl = IXGBE_SRRCTL_DROP_EN;
1329
1330 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1331 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1332 /* grow the amount we can receive on large page machines */
1333 if (bufsz < (PAGE_SIZE / 2))
1334 bufsz = (PAGE_SIZE / 2);
1335 /* cap the bufsz at our largest descriptor size */
1336 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1337
1338 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1339 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1340 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1341 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1342 IXGBE_SRRCTL_BSIZEHDR_MASK);
1343 } else {
1344 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1345
1346 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1347 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1348 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1349 else
1350 srrctl |= rx_ring->rx_buf_len >>
1351 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1352 }
1353 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1354}
1355
1356/**
1357 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1358 * @adapter: board private structure
1359 *
1360 * Configure the Rx unit of the MAC after a reset.
1361 **/
1362static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1363{
1364 u64 rdba;
1365 struct ixgbe_hw *hw = &adapter->hw;
1366 struct net_device *netdev = adapter->netdev;
1367 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1368 int i, j;
1369 u32 rdlen;
1370 int rx_buf_len;
1371
1372 /* Decide whether to use packet split mode or not */
1373 if (netdev->mtu > ETH_DATA_LEN) {
1374 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1375 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1376 else
1377 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1378 } else {
1379 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1380 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1381 else
1382 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1383 }
1384
1385 /* Set the RX buffer length according to the mode */
1386 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1387 /* PSRTYPE must be initialized in 82599 */
1388 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1389 IXGBE_PSRTYPE_UDPHDR |
1390 IXGBE_PSRTYPE_IPV4HDR |
1391 IXGBE_PSRTYPE_IPV6HDR |
1392 IXGBE_PSRTYPE_L2HDR;
1393 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1394 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1395 } else {
1396 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1397 if (netdev->mtu <= ETH_DATA_LEN)
1398 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1399 else
1400 rx_buf_len = ALIGN(max_frame, 1024);
1401 }
1402
1403 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1404 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1405 * the Base and Length of the Rx Descriptor Ring */
1406 for (i = 0; i < adapter->num_rx_queues; i++) {
1407 rdba = adapter->rx_ring[i].dma;
1408 j = adapter->rx_ring[i].reg_idx;
1409 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1410 (rdba & DMA_BIT_MASK(32)));
1411 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1412 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1413 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1414 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1415 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1416 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1417 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1418
1419 ixgbevf_configure_srrctl(adapter, j);
1420 }
1421}
1422
1423static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1424 struct vlan_group *grp)
1425{
1426 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1427 struct ixgbe_hw *hw = &adapter->hw;
1428 int i, j;
1429 u32 ctrl;
1430
1431 adapter->vlgrp = grp;
1432
1433 for (i = 0; i < adapter->num_rx_queues; i++) {
1434 j = adapter->rx_ring[i].reg_idx;
1435 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1436 ctrl |= IXGBE_RXDCTL_VME;
1437 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1438 }
1439}
1440
1441static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1442{
1443 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1444 struct ixgbe_hw *hw = &adapter->hw;
1445 struct net_device *v_netdev;
1446
1447 /* add VID to filter table */
1448 if (hw->mac.ops.set_vfta)
1449 hw->mac.ops.set_vfta(hw, vid, 0, true);
1450 /*
1451 * Copy feature flags from netdev to the vlan netdev for this vid.
1452 * This allows things like TSO to bubble down to our vlan device.
1453 */
1454 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1455 v_netdev->features |= adapter->netdev->features;
1456 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1457}
1458
1459static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1460{
1461 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1462 struct ixgbe_hw *hw = &adapter->hw;
1463
1464 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1465 ixgbevf_irq_disable(adapter);
1466
1467 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1468
1469 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1470 ixgbevf_irq_enable(adapter, true, true);
1471
1472 /* remove VID from filter table */
1473 if (hw->mac.ops.set_vfta)
1474 hw->mac.ops.set_vfta(hw, vid, 0, false);
1475}
1476
1477static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1478{
1479 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1480
1481 if (adapter->vlgrp) {
1482 u16 vid;
1483 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1484 if (!vlan_group_get_device(adapter->vlgrp, vid))
1485 continue;
1486 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1487 }
1488 }
1489}
1490
1491static u8 *ixgbevf_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr,
1492 u32 *vmdq)
1493{
1494 struct dev_mc_list *mc_ptr;
1495 u8 *addr = *mc_addr_ptr;
1496 *vmdq = 0;
1497
1498 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1499 if (mc_ptr->next)
1500 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1501 else
1502 *mc_addr_ptr = NULL;
1503
1504 return addr;
1505}
1506
1507/**
1508 * ixgbevf_set_rx_mode - Multicast set
1509 * @netdev: network interface device structure
1510 *
1511 * The set_rx_method entry point is called whenever the multicast address
1512 * list or the network interface flags are updated. This routine is
1513 * responsible for configuring the hardware for proper multicast mode.
1514 **/
1515static void ixgbevf_set_rx_mode(struct net_device *netdev)
1516{
1517 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1518 struct ixgbe_hw *hw = &adapter->hw;
1519 u8 *addr_list = NULL;
1520 int addr_count = 0;
1521
1522 /* reprogram multicast list */
1523 addr_count = netdev->mc_count;
1524 if (addr_count)
1525 addr_list = netdev->mc_list->dmi_addr;
1526 if (hw->mac.ops.update_mc_addr_list)
1527 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1528 ixgbevf_addr_list_itr);
1529}
1530
1531static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1532{
1533 int q_idx;
1534 struct ixgbevf_q_vector *q_vector;
1535 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1536
1537 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1538 struct napi_struct *napi;
1539 q_vector = adapter->q_vector[q_idx];
1540 if (!q_vector->rxr_count)
1541 continue;
1542 napi = &q_vector->napi;
1543 if (q_vector->rxr_count > 1)
1544 napi->poll = &ixgbevf_clean_rxonly_many;
1545
1546 napi_enable(napi);
1547 }
1548}
1549
1550static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1551{
1552 int q_idx;
1553 struct ixgbevf_q_vector *q_vector;
1554 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1555
1556 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1557 q_vector = adapter->q_vector[q_idx];
1558 if (!q_vector->rxr_count)
1559 continue;
1560 napi_disable(&q_vector->napi);
1561 }
1562}
1563
1564static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1565{
1566 struct net_device *netdev = adapter->netdev;
1567 int i;
1568
1569 ixgbevf_set_rx_mode(netdev);
1570
1571 ixgbevf_restore_vlan(adapter);
1572
1573 ixgbevf_configure_tx(adapter);
1574 ixgbevf_configure_rx(adapter);
1575 for (i = 0; i < adapter->num_rx_queues; i++) {
1576 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1577 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1578 ring->next_to_use = ring->count - 1;
1579 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1580 }
1581}
1582
1583#define IXGBE_MAX_RX_DESC_POLL 10
1584static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1585 int rxr)
1586{
1587 struct ixgbe_hw *hw = &adapter->hw;
1588 int j = adapter->rx_ring[rxr].reg_idx;
1589 int k;
1590
1591 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1592 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1593 break;
1594 else
1595 msleep(1);
1596 }
1597 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1598 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1599 "not set within the polling period\n", rxr);
1600 }
1601
1602 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1603 (adapter->rx_ring[rxr].count - 1));
1604}
1605
1606static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1607{
1608 struct net_device *netdev = adapter->netdev;
1609 struct ixgbe_hw *hw = &adapter->hw;
1610 int i, j = 0;
1611 int num_rx_rings = adapter->num_rx_queues;
1612 u32 txdctl, rxdctl;
1613
1614 for (i = 0; i < adapter->num_tx_queues; i++) {
1615 j = adapter->tx_ring[i].reg_idx;
1616 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1617 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1618 txdctl |= (8 << 16);
1619 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1620 }
1621
1622 for (i = 0; i < adapter->num_tx_queues; i++) {
1623 j = adapter->tx_ring[i].reg_idx;
1624 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1625 txdctl |= IXGBE_TXDCTL_ENABLE;
1626 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1627 }
1628
1629 for (i = 0; i < num_rx_rings; i++) {
1630 j = adapter->rx_ring[i].reg_idx;
1631 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1632 rxdctl |= IXGBE_RXDCTL_ENABLE;
1633 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1634 ixgbevf_rx_desc_queue_enable(adapter, i);
1635 }
1636
1637 ixgbevf_configure_msix(adapter);
1638
1639 if (hw->mac.ops.set_rar) {
1640 if (is_valid_ether_addr(hw->mac.addr))
1641 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1642 else
1643 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1644 }
1645
1646 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1647 ixgbevf_napi_enable_all(adapter);
1648
1649 /* enable transmits */
1650 netif_tx_start_all_queues(netdev);
1651
1652 /* bring the link up in the watchdog, this could race with our first
1653 * link up interrupt but shouldn't be a problem */
1654 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1655 adapter->link_check_timeout = jiffies;
1656 mod_timer(&adapter->watchdog_timer, jiffies);
1657 return 0;
1658}
1659
1660int ixgbevf_up(struct ixgbevf_adapter *adapter)
1661{
1662 int err;
1663 struct ixgbe_hw *hw = &adapter->hw;
1664
1665 ixgbevf_configure(adapter);
1666
1667 err = ixgbevf_up_complete(adapter);
1668
1669 /* clear any pending interrupts, may auto mask */
1670 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1671
1672 ixgbevf_irq_enable(adapter, true, true);
1673
1674 return err;
1675}
1676
1677/**
1678 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1679 * @adapter: board private structure
1680 * @rx_ring: ring to free buffers from
1681 **/
1682static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1683 struct ixgbevf_ring *rx_ring)
1684{
1685 struct pci_dev *pdev = adapter->pdev;
1686 unsigned long size;
1687 unsigned int i;
1688
1689 /* Free all the Rx ring sk_buffs */
1690
1691 for (i = 0; i < rx_ring->count; i++) {
1692 struct ixgbevf_rx_buffer *rx_buffer_info;
1693
1694 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1695 if (rx_buffer_info->dma) {
1696 pci_unmap_single(pdev, rx_buffer_info->dma,
1697 rx_ring->rx_buf_len,
1698 PCI_DMA_FROMDEVICE);
1699 rx_buffer_info->dma = 0;
1700 }
1701 if (rx_buffer_info->skb) {
1702 struct sk_buff *skb = rx_buffer_info->skb;
1703 rx_buffer_info->skb = NULL;
1704 do {
1705 struct sk_buff *this = skb;
1706 skb = skb->prev;
1707 dev_kfree_skb(this);
1708 } while (skb);
1709 }
1710 if (!rx_buffer_info->page)
1711 continue;
1712 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
1713 PCI_DMA_FROMDEVICE);
1714 rx_buffer_info->page_dma = 0;
1715 put_page(rx_buffer_info->page);
1716 rx_buffer_info->page = NULL;
1717 rx_buffer_info->page_offset = 0;
1718 }
1719
1720 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1721 memset(rx_ring->rx_buffer_info, 0, size);
1722
1723 /* Zero out the descriptor ring */
1724 memset(rx_ring->desc, 0, rx_ring->size);
1725
1726 rx_ring->next_to_clean = 0;
1727 rx_ring->next_to_use = 0;
1728
1729 if (rx_ring->head)
1730 writel(0, adapter->hw.hw_addr + rx_ring->head);
1731 if (rx_ring->tail)
1732 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1733}
1734
1735/**
1736 * ixgbevf_clean_tx_ring - Free Tx Buffers
1737 * @adapter: board private structure
1738 * @tx_ring: ring to be cleaned
1739 **/
1740static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1741 struct ixgbevf_ring *tx_ring)
1742{
1743 struct ixgbevf_tx_buffer *tx_buffer_info;
1744 unsigned long size;
1745 unsigned int i;
1746
1747 /* Free all the Tx ring sk_buffs */
1748
1749 for (i = 0; i < tx_ring->count; i++) {
1750 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1751 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1752 }
1753
1754 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1755 memset(tx_ring->tx_buffer_info, 0, size);
1756
1757 memset(tx_ring->desc, 0, tx_ring->size);
1758
1759 tx_ring->next_to_use = 0;
1760 tx_ring->next_to_clean = 0;
1761
1762 if (tx_ring->head)
1763 writel(0, adapter->hw.hw_addr + tx_ring->head);
1764 if (tx_ring->tail)
1765 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1766}
1767
1768/**
1769 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1770 * @adapter: board private structure
1771 **/
1772static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1773{
1774 int i;
1775
1776 for (i = 0; i < adapter->num_rx_queues; i++)
1777 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1778}
1779
1780/**
1781 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1782 * @adapter: board private structure
1783 **/
1784static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1785{
1786 int i;
1787
1788 for (i = 0; i < adapter->num_tx_queues; i++)
1789 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1790}
1791
1792void ixgbevf_down(struct ixgbevf_adapter *adapter)
1793{
1794 struct net_device *netdev = adapter->netdev;
1795 struct ixgbe_hw *hw = &adapter->hw;
1796 u32 txdctl;
1797 int i, j;
1798
1799 /* signal that we are down to the interrupt handler */
1800 set_bit(__IXGBEVF_DOWN, &adapter->state);
1801 /* disable receives */
1802
1803 netif_tx_disable(netdev);
1804
1805 msleep(10);
1806
1807 netif_tx_stop_all_queues(netdev);
1808
1809 ixgbevf_irq_disable(adapter);
1810
1811 ixgbevf_napi_disable_all(adapter);
1812
1813 del_timer_sync(&adapter->watchdog_timer);
1814 /* can't call flush scheduled work here because it can deadlock
1815 * if linkwatch_event tries to acquire the rtnl_lock which we are
1816 * holding */
1817 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1818 msleep(1);
1819
1820 /* disable transmits in the hardware now that interrupts are off */
1821 for (i = 0; i < adapter->num_tx_queues; i++) {
1822 j = adapter->tx_ring[i].reg_idx;
1823 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1824 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1825 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1826 }
1827
1828 netif_carrier_off(netdev);
1829
1830 if (!pci_channel_offline(adapter->pdev))
1831 ixgbevf_reset(adapter);
1832
1833 ixgbevf_clean_all_tx_rings(adapter);
1834 ixgbevf_clean_all_rx_rings(adapter);
1835}
1836
1837void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1838{
1839 WARN_ON(in_interrupt());
1840 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1841 msleep(1);
1842
1843 ixgbevf_down(adapter);
1844 ixgbevf_up(adapter);
1845
1846 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1847}
1848
1849void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1850{
1851 struct ixgbe_hw *hw = &adapter->hw;
1852 struct net_device *netdev = adapter->netdev;
1853
1854 if (hw->mac.ops.reset_hw(hw))
1855 hw_dbg(hw, "PF still resetting\n");
1856 else
1857 hw->mac.ops.init_hw(hw);
1858
1859 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1860 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1861 netdev->addr_len);
1862 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1863 netdev->addr_len);
1864 }
1865}
1866
1867static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1868 int vectors)
1869{
1870 int err, vector_threshold;
1871
1872 /* We'll want at least 3 (vector_threshold):
1873 * 1) TxQ[0] Cleanup
1874 * 2) RxQ[0] Cleanup
1875 * 3) Other (Link Status Change, etc.)
1876 */
1877 vector_threshold = MIN_MSIX_COUNT;
1878
1879 /* The more we get, the more we will assign to Tx/Rx Cleanup
1880 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1881 * Right now, we simply care about how many we'll get; we'll
1882 * set them up later while requesting irq's.
1883 */
1884 while (vectors >= vector_threshold) {
1885 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1886 vectors);
1887 if (!err) /* Success in acquiring all requested vectors. */
1888 break;
1889 else if (err < 0)
1890 vectors = 0; /* Nasty failure, quit now */
1891 else /* err == number of vectors we should try again with */
1892 vectors = err;
1893 }
1894
1895 if (vectors < vector_threshold) {
1896 /* Can't allocate enough MSI-X interrupts? Oh well.
1897 * This just means we'll go with either a single MSI
1898 * vector or fall back to legacy interrupts.
1899 */
1900 hw_dbg(&adapter->hw,
1901 "Unable to allocate MSI-X interrupts\n");
1902 kfree(adapter->msix_entries);
1903 adapter->msix_entries = NULL;
1904 } else {
1905 /*
1906 * Adjust for only the vectors we'll use, which is minimum
1907 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1908 * vectors we were allocated.
1909 */
1910 adapter->num_msix_vectors = vectors;
1911 }
1912}
1913
1914/*
1915 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1916 * @adapter: board private structure to initialize
1917 *
1918 * This is the top level queue allocation routine. The order here is very
1919 * important, starting with the "most" number of features turned on at once,
1920 * and ending with the smallest set of features. This way large combinations
1921 * can be allocated if they're turned on, and smaller combinations are the
1922 * fallthrough conditions.
1923 *
1924 **/
1925static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1926{
1927 /* Start with base case */
1928 adapter->num_rx_queues = 1;
1929 adapter->num_tx_queues = 1;
1930 adapter->num_rx_pools = adapter->num_rx_queues;
1931 adapter->num_rx_queues_per_pool = 1;
1932}
1933
1934/**
1935 * ixgbevf_alloc_queues - Allocate memory for all rings
1936 * @adapter: board private structure to initialize
1937 *
1938 * We allocate one ring per queue at run-time since we don't know the
1939 * number of queues at compile-time. The polling_netdev array is
1940 * intended for Multiqueue, but should work fine with a single queue.
1941 **/
1942static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1943{
1944 int i;
1945
1946 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1947 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1948 if (!adapter->tx_ring)
1949 goto err_tx_ring_allocation;
1950
1951 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1952 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1953 if (!adapter->rx_ring)
1954 goto err_rx_ring_allocation;
1955
1956 for (i = 0; i < adapter->num_tx_queues; i++) {
1957 adapter->tx_ring[i].count = adapter->tx_ring_count;
1958 adapter->tx_ring[i].queue_index = i;
1959 adapter->tx_ring[i].reg_idx = i;
1960 }
1961
1962 for (i = 0; i < adapter->num_rx_queues; i++) {
1963 adapter->rx_ring[i].count = adapter->rx_ring_count;
1964 adapter->rx_ring[i].queue_index = i;
1965 adapter->rx_ring[i].reg_idx = i;
1966 }
1967
1968 return 0;
1969
1970err_rx_ring_allocation:
1971 kfree(adapter->tx_ring);
1972err_tx_ring_allocation:
1973 return -ENOMEM;
1974}
1975
1976/**
1977 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1978 * @adapter: board private structure to initialize
1979 *
1980 * Attempt to configure the interrupts using the best available
1981 * capabilities of the hardware and the kernel.
1982 **/
1983static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1984{
1985 int err = 0;
1986 int vector, v_budget;
1987
1988 /*
1989 * It's easy to be greedy for MSI-X vectors, but it really
1990 * doesn't do us much good if we have a lot more vectors
1991 * than CPU's. So let's be conservative and only ask for
1992 * (roughly) twice the number of vectors as there are CPU's.
1993 */
1994 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
1995 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
1996
1997 /* A failure in MSI-X entry allocation isn't fatal, but it does
1998 * mean we disable MSI-X capabilities of the adapter. */
1999 adapter->msix_entries = kcalloc(v_budget,
2000 sizeof(struct msix_entry), GFP_KERNEL);
2001 if (!adapter->msix_entries) {
2002 err = -ENOMEM;
2003 goto out;
2004 }
2005
2006 for (vector = 0; vector < v_budget; vector++)
2007 adapter->msix_entries[vector].entry = vector;
2008
2009 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2010
2011out:
2012 return err;
2013}
2014
2015/**
2016 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2017 * @adapter: board private structure to initialize
2018 *
2019 * We allocate one q_vector per queue interrupt. If allocation fails we
2020 * return -ENOMEM.
2021 **/
2022static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2023{
2024 int q_idx, num_q_vectors;
2025 struct ixgbevf_q_vector *q_vector;
2026 int napi_vectors;
2027 int (*poll)(struct napi_struct *, int);
2028
2029 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2030 napi_vectors = adapter->num_rx_queues;
2031 poll = &ixgbevf_clean_rxonly;
2032
2033 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2034 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2035 if (!q_vector)
2036 goto err_out;
2037 q_vector->adapter = adapter;
2038 q_vector->v_idx = q_idx;
2039 q_vector->eitr = adapter->eitr_param;
2040 if (q_idx < napi_vectors)
2041 netif_napi_add(adapter->netdev, &q_vector->napi,
2042 (*poll), 64);
2043 adapter->q_vector[q_idx] = q_vector;
2044 }
2045
2046 return 0;
2047
2048err_out:
2049 while (q_idx) {
2050 q_idx--;
2051 q_vector = adapter->q_vector[q_idx];
2052 netif_napi_del(&q_vector->napi);
2053 kfree(q_vector);
2054 adapter->q_vector[q_idx] = NULL;
2055 }
2056 return -ENOMEM;
2057}
2058
2059/**
2060 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2061 * @adapter: board private structure to initialize
2062 *
2063 * This function frees the memory allocated to the q_vectors. In addition if
2064 * NAPI is enabled it will delete any references to the NAPI struct prior
2065 * to freeing the q_vector.
2066 **/
2067static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2068{
2069 int q_idx, num_q_vectors;
2070 int napi_vectors;
2071
2072 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2073 napi_vectors = adapter->num_rx_queues;
2074
2075 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2076 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2077
2078 adapter->q_vector[q_idx] = NULL;
2079 if (q_idx < napi_vectors)
2080 netif_napi_del(&q_vector->napi);
2081 kfree(q_vector);
2082 }
2083}
2084
2085/**
2086 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2087 * @adapter: board private structure
2088 *
2089 **/
2090static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2091{
2092 pci_disable_msix(adapter->pdev);
2093 kfree(adapter->msix_entries);
2094 adapter->msix_entries = NULL;
2095
2096 return;
2097}
2098
2099/**
2100 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2101 * @adapter: board private structure to initialize
2102 *
2103 **/
2104static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2105{
2106 int err;
2107
2108 /* Number of supported queues */
2109 ixgbevf_set_num_queues(adapter);
2110
2111 err = ixgbevf_set_interrupt_capability(adapter);
2112 if (err) {
2113 hw_dbg(&adapter->hw,
2114 "Unable to setup interrupt capabilities\n");
2115 goto err_set_interrupt;
2116 }
2117
2118 err = ixgbevf_alloc_q_vectors(adapter);
2119 if (err) {
2120 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2121 "vectors\n");
2122 goto err_alloc_q_vectors;
2123 }
2124
2125 err = ixgbevf_alloc_queues(adapter);
2126 if (err) {
2127 printk(KERN_ERR "Unable to allocate memory for queues\n");
2128 goto err_alloc_queues;
2129 }
2130
2131 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2132 "Tx Queue count = %u\n",
2133 (adapter->num_rx_queues > 1) ? "Enabled" :
2134 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2135
2136 set_bit(__IXGBEVF_DOWN, &adapter->state);
2137
2138 return 0;
2139err_alloc_queues:
2140 ixgbevf_free_q_vectors(adapter);
2141err_alloc_q_vectors:
2142 ixgbevf_reset_interrupt_capability(adapter);
2143err_set_interrupt:
2144 return err;
2145}
2146
2147/**
2148 * ixgbevf_sw_init - Initialize general software structures
2149 * (struct ixgbevf_adapter)
2150 * @adapter: board private structure to initialize
2151 *
2152 * ixgbevf_sw_init initializes the Adapter private data structure.
2153 * Fields are initialized based on PCI device information and
2154 * OS network device settings (MTU size).
2155 **/
2156static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2157{
2158 struct ixgbe_hw *hw = &adapter->hw;
2159 struct pci_dev *pdev = adapter->pdev;
2160 int err;
2161
2162 /* PCI config space info */
2163
2164 hw->vendor_id = pdev->vendor;
2165 hw->device_id = pdev->device;
2166 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2167 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2168 hw->subsystem_device_id = pdev->subsystem_device;
2169
2170 hw->mbx.ops.init_params(hw);
2171 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2172 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2173 err = hw->mac.ops.reset_hw(hw);
2174 if (err) {
2175 dev_info(&pdev->dev,
2176 "PF still in reset state, assigning new address\n");
2177 random_ether_addr(hw->mac.addr);
2178 } else {
2179 err = hw->mac.ops.init_hw(hw);
2180 if (err) {
2181 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2182 goto out;
2183 }
2184 }
2185
2186 /* Enable dynamic interrupt throttling rates */
2187 adapter->eitr_param = 20000;
2188 adapter->itr_setting = 1;
2189
2190 /* set defaults for eitr in MegaBytes */
2191 adapter->eitr_low = 10;
2192 adapter->eitr_high = 20;
2193
2194 /* set default ring sizes */
2195 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2196 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2197
2198 /* enable rx csum by default */
2199 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2200
2201 set_bit(__IXGBEVF_DOWN, &adapter->state);
2202
2203out:
2204 return err;
2205}
2206
2207static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2208{
2209 struct ixgbe_hw *hw = &adapter->hw;
2210
2211 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2212 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2213 adapter->stats.last_vfgorc |=
2214 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2215 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2216 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2217 adapter->stats.last_vfgotc |=
2218 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2219 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2220
2221 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2222 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2223 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2224 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2225 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2226}
2227
2228#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2229 { \
2230 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2231 if (current_counter < last_counter) \
2232 counter += 0x100000000LL; \
2233 last_counter = current_counter; \
2234 counter &= 0xFFFFFFFF00000000LL; \
2235 counter |= current_counter; \
2236 }
2237
2238#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2239 { \
2240 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2241 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2242 u64 current_counter = (current_counter_msb << 32) | \
2243 current_counter_lsb; \
2244 if (current_counter < last_counter) \
2245 counter += 0x1000000000LL; \
2246 last_counter = current_counter; \
2247 counter &= 0xFFFFFFF000000000LL; \
2248 counter |= current_counter; \
2249 }
2250/**
2251 * ixgbevf_update_stats - Update the board statistics counters.
2252 * @adapter: board private structure
2253 **/
2254void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2255{
2256 struct ixgbe_hw *hw = &adapter->hw;
2257
2258 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2259 adapter->stats.vfgprc);
2260 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2261 adapter->stats.vfgptc);
2262 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2263 adapter->stats.last_vfgorc,
2264 adapter->stats.vfgorc);
2265 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2266 adapter->stats.last_vfgotc,
2267 adapter->stats.vfgotc);
2268 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2269 adapter->stats.vfmprc);
2270
2271 /* Fill out the OS statistics structure */
2272 adapter->net_stats.multicast = adapter->stats.vfmprc -
2273 adapter->stats.base_vfmprc;
2274}
2275
2276/**
2277 * ixgbevf_watchdog - Timer Call-back
2278 * @data: pointer to adapter cast into an unsigned long
2279 **/
2280static void ixgbevf_watchdog(unsigned long data)
2281{
2282 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2283 struct ixgbe_hw *hw = &adapter->hw;
2284 u64 eics = 0;
2285 int i;
2286
2287 /*
2288 * Do the watchdog outside of interrupt context due to the lovely
2289 * delays that some of the newer hardware requires
2290 */
2291
2292 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2293 goto watchdog_short_circuit;
2294
2295 /* get one bit for every active tx/rx interrupt vector */
2296 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2297 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2298 if (qv->rxr_count || qv->txr_count)
2299 eics |= (1 << i);
2300 }
2301
2302 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2303
2304watchdog_short_circuit:
2305 schedule_work(&adapter->watchdog_task);
2306}
2307
2308/**
2309 * ixgbevf_tx_timeout - Respond to a Tx Hang
2310 * @netdev: network interface device structure
2311 **/
2312static void ixgbevf_tx_timeout(struct net_device *netdev)
2313{
2314 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2315
2316 /* Do the reset outside of interrupt context */
2317 schedule_work(&adapter->reset_task);
2318}
2319
2320static void ixgbevf_reset_task(struct work_struct *work)
2321{
2322 struct ixgbevf_adapter *adapter;
2323 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2324
2325 /* If we're already down or resetting, just bail */
2326 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2327 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2328 return;
2329
2330 adapter->tx_timeout_count++;
2331
2332 ixgbevf_reinit_locked(adapter);
2333}
2334
2335/**
2336 * ixgbevf_watchdog_task - worker thread to bring link up
2337 * @work: pointer to work_struct containing our data
2338 **/
2339static void ixgbevf_watchdog_task(struct work_struct *work)
2340{
2341 struct ixgbevf_adapter *adapter = container_of(work,
2342 struct ixgbevf_adapter,
2343 watchdog_task);
2344 struct net_device *netdev = adapter->netdev;
2345 struct ixgbe_hw *hw = &adapter->hw;
2346 u32 link_speed = adapter->link_speed;
2347 bool link_up = adapter->link_up;
2348
2349 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2350
2351 /*
2352 * Always check the link on the watchdog because we have
2353 * no LSC interrupt
2354 */
2355 if (hw->mac.ops.check_link) {
2356 if ((hw->mac.ops.check_link(hw, &link_speed,
2357 &link_up, false)) != 0) {
2358 adapter->link_up = link_up;
2359 adapter->link_speed = link_speed;
2360 schedule_work(&adapter->reset_task);
2361 goto pf_has_reset;
2362 }
2363 } else {
2364 /* always assume link is up, if no check link
2365 * function */
2366 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2367 link_up = true;
2368 }
2369 adapter->link_up = link_up;
2370 adapter->link_speed = link_speed;
2371
2372 if (link_up) {
2373 if (!netif_carrier_ok(netdev)) {
2374 hw_dbg(&adapter->hw, "NIC Link is Up %s, ",
2375 ((link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2376 "10 Gbps" : "1 Gbps"));
2377 netif_carrier_on(netdev);
2378 netif_tx_wake_all_queues(netdev);
2379 } else {
2380 /* Force detection of hung controller */
2381 adapter->detect_tx_hung = true;
2382 }
2383 } else {
2384 adapter->link_up = false;
2385 adapter->link_speed = 0;
2386 if (netif_carrier_ok(netdev)) {
2387 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2388 netif_carrier_off(netdev);
2389 netif_tx_stop_all_queues(netdev);
2390 }
2391 }
2392
2393pf_has_reset:
2394 ixgbevf_update_stats(adapter);
2395
2396 /* Force detection of hung controller every watchdog period */
2397 adapter->detect_tx_hung = true;
2398
2399 /* Reset the timer */
2400 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2401 mod_timer(&adapter->watchdog_timer,
2402 round_jiffies(jiffies + (2 * HZ)));
2403
2404 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2405}
2406
2407/**
2408 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2409 * @adapter: board private structure
2410 * @tx_ring: Tx descriptor ring for a specific queue
2411 *
2412 * Free all transmit software resources
2413 **/
2414void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2415 struct ixgbevf_ring *tx_ring)
2416{
2417 struct pci_dev *pdev = adapter->pdev;
2418
2419
2420 ixgbevf_clean_tx_ring(adapter, tx_ring);
2421
2422 vfree(tx_ring->tx_buffer_info);
2423 tx_ring->tx_buffer_info = NULL;
2424
2425 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2426
2427 tx_ring->desc = NULL;
2428}
2429
2430/**
2431 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2432 * @adapter: board private structure
2433 *
2434 * Free all transmit software resources
2435 **/
2436static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2437{
2438 int i;
2439
2440 for (i = 0; i < adapter->num_tx_queues; i++)
2441 if (adapter->tx_ring[i].desc)
2442 ixgbevf_free_tx_resources(adapter,
2443 &adapter->tx_ring[i]);
2444
2445}
2446
2447/**
2448 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2449 * @adapter: board private structure
2450 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2451 *
2452 * Return 0 on success, negative on failure
2453 **/
2454int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2455 struct ixgbevf_ring *tx_ring)
2456{
2457 struct pci_dev *pdev = adapter->pdev;
2458 int size;
2459
2460 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2461 tx_ring->tx_buffer_info = vmalloc(size);
2462 if (!tx_ring->tx_buffer_info)
2463 goto err;
2464 memset(tx_ring->tx_buffer_info, 0, size);
2465
2466 /* round up to nearest 4K */
2467 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2468 tx_ring->size = ALIGN(tx_ring->size, 4096);
2469
2470 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2471 &tx_ring->dma);
2472 if (!tx_ring->desc)
2473 goto err;
2474
2475 tx_ring->next_to_use = 0;
2476 tx_ring->next_to_clean = 0;
2477 tx_ring->work_limit = tx_ring->count;
2478 return 0;
2479
2480err:
2481 vfree(tx_ring->tx_buffer_info);
2482 tx_ring->tx_buffer_info = NULL;
2483 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2484 "descriptor ring\n");
2485 return -ENOMEM;
2486}
2487
2488/**
2489 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2490 * @adapter: board private structure
2491 *
2492 * If this function returns with an error, then it's possible one or
2493 * more of the rings is populated (while the rest are not). It is the
2494 * callers duty to clean those orphaned rings.
2495 *
2496 * Return 0 on success, negative on failure
2497 **/
2498static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2499{
2500 int i, err = 0;
2501
2502 for (i = 0; i < adapter->num_tx_queues; i++) {
2503 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2504 if (!err)
2505 continue;
2506 hw_dbg(&adapter->hw,
2507 "Allocation for Tx Queue %u failed\n", i);
2508 break;
2509 }
2510
2511 return err;
2512}
2513
2514/**
2515 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2516 * @adapter: board private structure
2517 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2518 *
2519 * Returns 0 on success, negative on failure
2520 **/
2521int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2522 struct ixgbevf_ring *rx_ring)
2523{
2524 struct pci_dev *pdev = adapter->pdev;
2525 int size;
2526
2527 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2528 rx_ring->rx_buffer_info = vmalloc(size);
2529 if (!rx_ring->rx_buffer_info) {
2530 hw_dbg(&adapter->hw,
2531 "Unable to vmalloc buffer memory for "
2532 "the receive descriptor ring\n");
2533 goto alloc_failed;
2534 }
2535 memset(rx_ring->rx_buffer_info, 0, size);
2536
2537 /* Round up to nearest 4K */
2538 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2539 rx_ring->size = ALIGN(rx_ring->size, 4096);
2540
2541 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
2542 &rx_ring->dma);
2543
2544 if (!rx_ring->desc) {
2545 hw_dbg(&adapter->hw,
2546 "Unable to allocate memory for "
2547 "the receive descriptor ring\n");
2548 vfree(rx_ring->rx_buffer_info);
2549 rx_ring->rx_buffer_info = NULL;
2550 goto alloc_failed;
2551 }
2552
2553 rx_ring->next_to_clean = 0;
2554 rx_ring->next_to_use = 0;
2555
2556 return 0;
2557alloc_failed:
2558 return -ENOMEM;
2559}
2560
2561/**
2562 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2563 * @adapter: board private structure
2564 *
2565 * If this function returns with an error, then it's possible one or
2566 * more of the rings is populated (while the rest are not). It is the
2567 * callers duty to clean those orphaned rings.
2568 *
2569 * Return 0 on success, negative on failure
2570 **/
2571static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2572{
2573 int i, err = 0;
2574
2575 for (i = 0; i < adapter->num_rx_queues; i++) {
2576 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2577 if (!err)
2578 continue;
2579 hw_dbg(&adapter->hw,
2580 "Allocation for Rx Queue %u failed\n", i);
2581 break;
2582 }
2583 return err;
2584}
2585
2586/**
2587 * ixgbevf_free_rx_resources - Free Rx Resources
2588 * @adapter: board private structure
2589 * @rx_ring: ring to clean the resources from
2590 *
2591 * Free all receive software resources
2592 **/
2593void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2594 struct ixgbevf_ring *rx_ring)
2595{
2596 struct pci_dev *pdev = adapter->pdev;
2597
2598 ixgbevf_clean_rx_ring(adapter, rx_ring);
2599
2600 vfree(rx_ring->rx_buffer_info);
2601 rx_ring->rx_buffer_info = NULL;
2602
2603 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2604
2605 rx_ring->desc = NULL;
2606}
2607
2608/**
2609 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2610 * @adapter: board private structure
2611 *
2612 * Free all receive software resources
2613 **/
2614static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2615{
2616 int i;
2617
2618 for (i = 0; i < adapter->num_rx_queues; i++)
2619 if (adapter->rx_ring[i].desc)
2620 ixgbevf_free_rx_resources(adapter,
2621 &adapter->rx_ring[i]);
2622}
2623
2624/**
2625 * ixgbevf_open - Called when a network interface is made active
2626 * @netdev: network interface device structure
2627 *
2628 * Returns 0 on success, negative value on failure
2629 *
2630 * The open entry point is called when a network interface is made
2631 * active by the system (IFF_UP). At this point all resources needed
2632 * for transmit and receive operations are allocated, the interrupt
2633 * handler is registered with the OS, the watchdog timer is started,
2634 * and the stack is notified that the interface is ready.
2635 **/
2636static int ixgbevf_open(struct net_device *netdev)
2637{
2638 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2639 struct ixgbe_hw *hw = &adapter->hw;
2640 int err;
2641
2642 /* disallow open during test */
2643 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2644 return -EBUSY;
2645
2646 if (hw->adapter_stopped) {
2647 ixgbevf_reset(adapter);
2648 /* if adapter is still stopped then PF isn't up and
2649 * the vf can't start. */
2650 if (hw->adapter_stopped) {
2651 err = IXGBE_ERR_MBX;
2652 printk(KERN_ERR "Unable to start - perhaps the PF"
2653 "Driver isn't up yet\n");
2654 goto err_setup_reset;
2655 }
2656 }
2657
2658 /* allocate transmit descriptors */
2659 err = ixgbevf_setup_all_tx_resources(adapter);
2660 if (err)
2661 goto err_setup_tx;
2662
2663 /* allocate receive descriptors */
2664 err = ixgbevf_setup_all_rx_resources(adapter);
2665 if (err)
2666 goto err_setup_rx;
2667
2668 ixgbevf_configure(adapter);
2669
2670 /*
2671 * Map the Tx/Rx rings to the vectors we were allotted.
2672 * if request_irq will be called in this function map_rings
2673 * must be called *before* up_complete
2674 */
2675 ixgbevf_map_rings_to_vectors(adapter);
2676
2677 err = ixgbevf_up_complete(adapter);
2678 if (err)
2679 goto err_up;
2680
2681 /* clear any pending interrupts, may auto mask */
2682 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2683 err = ixgbevf_request_irq(adapter);
2684 if (err)
2685 goto err_req_irq;
2686
2687 ixgbevf_irq_enable(adapter, true, true);
2688
2689 return 0;
2690
2691err_req_irq:
2692 ixgbevf_down(adapter);
2693err_up:
2694 ixgbevf_free_irq(adapter);
2695err_setup_rx:
2696 ixgbevf_free_all_rx_resources(adapter);
2697err_setup_tx:
2698 ixgbevf_free_all_tx_resources(adapter);
2699 ixgbevf_reset(adapter);
2700
2701err_setup_reset:
2702
2703 return err;
2704}
2705
2706/**
2707 * ixgbevf_close - Disables a network interface
2708 * @netdev: network interface device structure
2709 *
2710 * Returns 0, this is not allowed to fail
2711 *
2712 * The close entry point is called when an interface is de-activated
2713 * by the OS. The hardware is still under the drivers control, but
2714 * needs to be disabled. A global MAC reset is issued to stop the
2715 * hardware, and all transmit and receive resources are freed.
2716 **/
2717static int ixgbevf_close(struct net_device *netdev)
2718{
2719 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2720
2721 ixgbevf_down(adapter);
2722 ixgbevf_free_irq(adapter);
2723
2724 ixgbevf_free_all_tx_resources(adapter);
2725 ixgbevf_free_all_rx_resources(adapter);
2726
2727 return 0;
2728}
2729
2730static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2731 struct ixgbevf_ring *tx_ring,
2732 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2733{
2734 struct ixgbe_adv_tx_context_desc *context_desc;
2735 unsigned int i;
2736 int err;
2737 struct ixgbevf_tx_buffer *tx_buffer_info;
2738 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2739 u32 mss_l4len_idx, l4len;
2740
2741 if (skb_is_gso(skb)) {
2742 if (skb_header_cloned(skb)) {
2743 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2744 if (err)
2745 return err;
2746 }
2747 l4len = tcp_hdrlen(skb);
2748 *hdr_len += l4len;
2749
2750 if (skb->protocol == htons(ETH_P_IP)) {
2751 struct iphdr *iph = ip_hdr(skb);
2752 iph->tot_len = 0;
2753 iph->check = 0;
2754 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2755 iph->daddr, 0,
2756 IPPROTO_TCP,
2757 0);
2758 adapter->hw_tso_ctxt++;
2759 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2760 ipv6_hdr(skb)->payload_len = 0;
2761 tcp_hdr(skb)->check =
2762 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2763 &ipv6_hdr(skb)->daddr,
2764 0, IPPROTO_TCP, 0);
2765 adapter->hw_tso6_ctxt++;
2766 }
2767
2768 i = tx_ring->next_to_use;
2769
2770 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2771 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2772
2773 /* VLAN MACLEN IPLEN */
2774 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2775 vlan_macip_lens |=
2776 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2777 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2778 IXGBE_ADVTXD_MACLEN_SHIFT);
2779 *hdr_len += skb_network_offset(skb);
2780 vlan_macip_lens |=
2781 (skb_transport_header(skb) - skb_network_header(skb));
2782 *hdr_len +=
2783 (skb_transport_header(skb) - skb_network_header(skb));
2784 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2785 context_desc->seqnum_seed = 0;
2786
2787 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2788 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2789 IXGBE_ADVTXD_DTYP_CTXT);
2790
2791 if (skb->protocol == htons(ETH_P_IP))
2792 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2793 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2794 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2795
2796 /* MSS L4LEN IDX */
2797 mss_l4len_idx =
2798 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2799 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2800 /* use index 1 for TSO */
2801 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2802 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2803
2804 tx_buffer_info->time_stamp = jiffies;
2805 tx_buffer_info->next_to_watch = i;
2806
2807 i++;
2808 if (i == tx_ring->count)
2809 i = 0;
2810 tx_ring->next_to_use = i;
2811
2812 return true;
2813 }
2814
2815 return false;
2816}
2817
2818static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2819 struct ixgbevf_ring *tx_ring,
2820 struct sk_buff *skb, u32 tx_flags)
2821{
2822 struct ixgbe_adv_tx_context_desc *context_desc;
2823 unsigned int i;
2824 struct ixgbevf_tx_buffer *tx_buffer_info;
2825 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2826
2827 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2828 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2829 i = tx_ring->next_to_use;
2830 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2831 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2832
2833 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2834 vlan_macip_lens |= (tx_flags &
2835 IXGBE_TX_FLAGS_VLAN_MASK);
2836 vlan_macip_lens |= (skb_network_offset(skb) <<
2837 IXGBE_ADVTXD_MACLEN_SHIFT);
2838 if (skb->ip_summed == CHECKSUM_PARTIAL)
2839 vlan_macip_lens |= (skb_transport_header(skb) -
2840 skb_network_header(skb));
2841
2842 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2843 context_desc->seqnum_seed = 0;
2844
2845 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2846 IXGBE_ADVTXD_DTYP_CTXT);
2847
2848 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2849 switch (skb->protocol) {
2850 case __constant_htons(ETH_P_IP):
2851 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2852 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2853 type_tucmd_mlhl |=
2854 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2855 break;
2856 case __constant_htons(ETH_P_IPV6):
2857 /* XXX what about other V6 headers?? */
2858 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2859 type_tucmd_mlhl |=
2860 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2861 break;
2862 default:
2863 if (unlikely(net_ratelimit())) {
2864 printk(KERN_WARNING
2865 "partial checksum but "
2866 "proto=%x!\n",
2867 skb->protocol);
2868 }
2869 break;
2870 }
2871 }
2872
2873 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2874 /* use index zero for tx checksum offload */
2875 context_desc->mss_l4len_idx = 0;
2876
2877 tx_buffer_info->time_stamp = jiffies;
2878 tx_buffer_info->next_to_watch = i;
2879
2880 adapter->hw_csum_tx_good++;
2881 i++;
2882 if (i == tx_ring->count)
2883 i = 0;
2884 tx_ring->next_to_use = i;
2885
2886 return true;
2887 }
2888
2889 return false;
2890}
2891
2892static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2893 struct ixgbevf_ring *tx_ring,
2894 struct sk_buff *skb, u32 tx_flags,
2895 unsigned int first)
2896{
2897 struct pci_dev *pdev = adapter->pdev;
2898 struct ixgbevf_tx_buffer *tx_buffer_info;
2899 unsigned int len;
2900 unsigned int total = skb->len;
2901 unsigned int offset = 0, size, count = 0, i;
2902 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2903 unsigned int f;
2904
2905 i = tx_ring->next_to_use;
2906
2907 len = min(skb_headlen(skb), total);
2908 while (len) {
2909 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2910 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2911
2912 tx_buffer_info->length = size;
2913 tx_buffer_info->mapped_as_page = false;
2914 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2915 skb->data + offset,
2916 size, PCI_DMA_TODEVICE);
2917 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2918 goto dma_error;
2919 tx_buffer_info->time_stamp = jiffies;
2920 tx_buffer_info->next_to_watch = i;
2921
2922 len -= size;
2923 total -= size;
2924 offset += size;
2925 count++;
2926 i++;
2927 if (i == tx_ring->count)
2928 i = 0;
2929 }
2930
2931 for (f = 0; f < nr_frags; f++) {
2932 struct skb_frag_struct *frag;
2933
2934 frag = &skb_shinfo(skb)->frags[f];
2935 len = min((unsigned int)frag->size, total);
2936 offset = frag->page_offset;
2937
2938 while (len) {
2939 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2940 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2941
2942 tx_buffer_info->length = size;
2943 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2944 frag->page,
2945 offset,
2946 size,
2947 PCI_DMA_TODEVICE);
2948 tx_buffer_info->mapped_as_page = true;
2949 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2950 goto dma_error;
2951 tx_buffer_info->time_stamp = jiffies;
2952 tx_buffer_info->next_to_watch = i;
2953
2954 len -= size;
2955 total -= size;
2956 offset += size;
2957 count++;
2958 i++;
2959 if (i == tx_ring->count)
2960 i = 0;
2961 }
2962 if (total == 0)
2963 break;
2964 }
2965
2966 if (i == 0)
2967 i = tx_ring->count - 1;
2968 else
2969 i = i - 1;
2970 tx_ring->tx_buffer_info[i].skb = skb;
2971 tx_ring->tx_buffer_info[first].next_to_watch = i;
2972
2973 return count;
2974
2975dma_error:
2976 dev_err(&pdev->dev, "TX DMA map failed\n");
2977
2978 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2979 tx_buffer_info->dma = 0;
2980 tx_buffer_info->time_stamp = 0;
2981 tx_buffer_info->next_to_watch = 0;
2982 count--;
2983
2984 /* clear timestamp and dma mappings for remaining portion of packet */
2985 while (count >= 0) {
2986 count--;
2987 i--;
2988 if (i < 0)
2989 i += tx_ring->count;
2990 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2991 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2992 }
2993
2994 return count;
2995}
2996
2997static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
2998 struct ixgbevf_ring *tx_ring, int tx_flags,
2999 int count, u32 paylen, u8 hdr_len)
3000{
3001 union ixgbe_adv_tx_desc *tx_desc = NULL;
3002 struct ixgbevf_tx_buffer *tx_buffer_info;
3003 u32 olinfo_status = 0, cmd_type_len = 0;
3004 unsigned int i;
3005
3006 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3007
3008 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3009
3010 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3011
3012 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3013 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3014
3015 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3016 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3017
3018 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3019 IXGBE_ADVTXD_POPTS_SHIFT;
3020
3021 /* use index 1 context for tso */
3022 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3023 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3024 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3025 IXGBE_ADVTXD_POPTS_SHIFT;
3026
3027 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3028 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3029 IXGBE_ADVTXD_POPTS_SHIFT;
3030
3031 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3032
3033 i = tx_ring->next_to_use;
3034 while (count--) {
3035 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3036 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3037 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3038 tx_desc->read.cmd_type_len =
3039 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3040 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3041 i++;
3042 if (i == tx_ring->count)
3043 i = 0;
3044 }
3045
3046 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3047
3048 /*
3049 * Force memory writes to complete before letting h/w
3050 * know there are new descriptors to fetch. (Only
3051 * applicable for weak-ordered memory model archs,
3052 * such as IA-64).
3053 */
3054 wmb();
3055
3056 tx_ring->next_to_use = i;
3057 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3058}
3059
3060static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3061 struct ixgbevf_ring *tx_ring, int size)
3062{
3063 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3064
3065 netif_stop_subqueue(netdev, tx_ring->queue_index);
3066 /* Herbert's original patch had:
3067 * smp_mb__after_netif_stop_queue();
3068 * but since that doesn't exist yet, just open code it. */
3069 smp_mb();
3070
3071 /* We need to check again in a case another CPU has just
3072 * made room available. */
3073 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3074 return -EBUSY;
3075
3076 /* A reprieve! - use start_queue because it doesn't call schedule */
3077 netif_start_subqueue(netdev, tx_ring->queue_index);
3078 ++adapter->restart_queue;
3079 return 0;
3080}
3081
3082static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3083 struct ixgbevf_ring *tx_ring, int size)
3084{
3085 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3086 return 0;
3087 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3088}
3089
3090static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3091{
3092 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3093 struct ixgbevf_ring *tx_ring;
3094 unsigned int first;
3095 unsigned int tx_flags = 0;
3096 u8 hdr_len = 0;
3097 int r_idx = 0, tso;
3098 int count = 0;
3099
3100 unsigned int f;
3101
3102 tx_ring = &adapter->tx_ring[r_idx];
3103
3104 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3105 tx_flags |= vlan_tx_tag_get(skb);
3106 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3107 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3108 }
3109
3110 /* four things can cause us to need a context descriptor */
3111 if (skb_is_gso(skb) ||
3112 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3113 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3114 count++;
3115
3116 count += TXD_USE_COUNT(skb_headlen(skb));
3117 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3118 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3119
3120 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3121 adapter->tx_busy++;
3122 return NETDEV_TX_BUSY;
3123 }
3124
3125 first = tx_ring->next_to_use;
3126
3127 if (skb->protocol == htons(ETH_P_IP))
3128 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3129 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3130 if (tso < 0) {
3131 dev_kfree_skb_any(skb);
3132 return NETDEV_TX_OK;
3133 }
3134
3135 if (tso)
3136 tx_flags |= IXGBE_TX_FLAGS_TSO;
3137 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3138 (skb->ip_summed == CHECKSUM_PARTIAL))
3139 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3140
3141 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3142 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3143 skb->len, hdr_len);
3144
3145 netdev->trans_start = jiffies;
3146
3147 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3148
3149 return NETDEV_TX_OK;
3150}
3151
3152/**
3153 * ixgbevf_get_stats - Get System Network Statistics
3154 * @netdev: network interface device structure
3155 *
3156 * Returns the address of the device statistics structure.
3157 * The statistics are actually updated from the timer callback.
3158 **/
3159static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3160{
3161 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3162
3163 /* only return the current stats */
3164 return &adapter->net_stats;
3165}
3166
3167/**
3168 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3169 * @netdev: network interface device structure
3170 * @p: pointer to an address structure
3171 *
3172 * Returns 0 on success, negative on failure
3173 **/
3174static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3175{
3176 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3177 struct ixgbe_hw *hw = &adapter->hw;
3178 struct sockaddr *addr = p;
3179
3180 if (!is_valid_ether_addr(addr->sa_data))
3181 return -EADDRNOTAVAIL;
3182
3183 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3184 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3185
3186 if (hw->mac.ops.set_rar)
3187 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3188
3189 return 0;
3190}
3191
3192/**
3193 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3194 * @netdev: network interface device structure
3195 * @new_mtu: new value for maximum frame size
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3200{
3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3202 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3203
3204 /* MTU < 68 is an error and causes problems on some kernels */
3205 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3206 return -EINVAL;
3207
3208 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3209 netdev->mtu, new_mtu);
3210 /* must set new MTU before calling down or up */
3211 netdev->mtu = new_mtu;
3212
3213 if (netif_running(netdev))
3214 ixgbevf_reinit_locked(adapter);
3215
3216 return 0;
3217}
3218
3219static void ixgbevf_shutdown(struct pci_dev *pdev)
3220{
3221 struct net_device *netdev = pci_get_drvdata(pdev);
3222 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3223
3224 netif_device_detach(netdev);
3225
3226 if (netif_running(netdev)) {
3227 ixgbevf_down(adapter);
3228 ixgbevf_free_irq(adapter);
3229 ixgbevf_free_all_tx_resources(adapter);
3230 ixgbevf_free_all_rx_resources(adapter);
3231 }
3232
3233#ifdef CONFIG_PM
3234 pci_save_state(pdev);
3235#endif
3236
3237 pci_disable_device(pdev);
3238}
3239
3240#ifdef HAVE_NET_DEVICE_OPS
3241static const struct net_device_ops ixgbe_netdev_ops = {
3242 .ndo_open = &ixgbevf_open,
3243 .ndo_stop = &ixgbevf_close,
3244 .ndo_start_xmit = &ixgbevf_xmit_frame,
3245 .ndo_get_stats = &ixgbevf_get_stats,
3246 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3247 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3248 .ndo_validate_addr = eth_validate_addr,
3249 .ndo_set_mac_address = &ixgbevf_set_mac,
3250 .ndo_change_mtu = &ixgbevf_change_mtu,
3251 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3252 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3253 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3254 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3255};
3256#endif /* HAVE_NET_DEVICE_OPS */
3257
3258static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3259{
3260 struct ixgbevf_adapter *adapter;
3261 adapter = netdev_priv(dev);
3262#ifdef HAVE_NET_DEVICE_OPS
3263 dev->netdev_ops = &ixgbe_netdev_ops;
3264#else /* HAVE_NET_DEVICE_OPS */
3265 dev->open = &ixgbevf_open;
3266 dev->stop = &ixgbevf_close;
3267
3268 dev->hard_start_xmit = &ixgbevf_xmit_frame;
3269
3270 dev->get_stats = &ixgbevf_get_stats;
3271 dev->set_multicast_list = &ixgbevf_set_rx_mode;
3272 dev->set_mac_address = &ixgbevf_set_mac;
3273 dev->change_mtu = &ixgbevf_change_mtu;
3274 dev->tx_timeout = &ixgbevf_tx_timeout;
3275 dev->vlan_rx_register = &ixgbevf_vlan_rx_register;
3276 dev->vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid;
3277 dev->vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid;
3278#endif /* HAVE_NET_DEVICE_OPS */
3279 ixgbevf_set_ethtool_ops(dev);
3280 dev->watchdog_timeo = 5 * HZ;
3281}
3282
3283/**
3284 * ixgbevf_probe - Device Initialization Routine
3285 * @pdev: PCI device information struct
3286 * @ent: entry in ixgbevf_pci_tbl
3287 *
3288 * Returns 0 on success, negative on failure
3289 *
3290 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3291 * The OS initialization, configuring of the adapter private structure,
3292 * and a hardware reset occur.
3293 **/
3294static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3295 const struct pci_device_id *ent)
3296{
3297 struct net_device *netdev;
3298 struct ixgbevf_adapter *adapter = NULL;
3299 struct ixgbe_hw *hw = NULL;
3300 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3301 static int cards_found;
3302 int err, pci_using_dac;
3303
3304 err = pci_enable_device(pdev);
3305 if (err)
3306 return err;
3307
3308 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
3309 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3310 pci_using_dac = 1;
3311 } else {
3312 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3313 if (err) {
3314 err = pci_set_consistent_dma_mask(pdev,
3315 DMA_BIT_MASK(32));
3316 if (err) {
3317 dev_err(&pdev->dev, "No usable DMA "
3318 "configuration, aborting\n");
3319 goto err_dma;
3320 }
3321 }
3322 pci_using_dac = 0;
3323 }
3324
3325 err = pci_request_regions(pdev, ixgbevf_driver_name);
3326 if (err) {
3327 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3328 goto err_pci_reg;
3329 }
3330
3331 pci_set_master(pdev);
3332
3333#ifdef HAVE_TX_MQ
3334 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3335 MAX_TX_QUEUES);
3336#else
3337 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3338#endif
3339 if (!netdev) {
3340 err = -ENOMEM;
3341 goto err_alloc_etherdev;
3342 }
3343
3344 SET_NETDEV_DEV(netdev, &pdev->dev);
3345
3346 pci_set_drvdata(pdev, netdev);
3347 adapter = netdev_priv(netdev);
3348
3349 adapter->netdev = netdev;
3350 adapter->pdev = pdev;
3351 hw = &adapter->hw;
3352 hw->back = adapter;
3353 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3354
3355 /*
3356 * call save state here in standalone driver because it relies on
3357 * adapter struct to exist, and needs to call netdev_priv
3358 */
3359 pci_save_state(pdev);
3360
3361 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3362 pci_resource_len(pdev, 0));
3363 if (!hw->hw_addr) {
3364 err = -EIO;
3365 goto err_ioremap;
3366 }
3367
3368 ixgbevf_assign_netdev_ops(netdev);
3369
3370 adapter->bd_number = cards_found;
3371
3372 /* Setup hw api */
3373 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3374 hw->mac.type = ii->mac;
3375
3376 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3377 sizeof(struct ixgbe_mac_operations));
3378
3379 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3380 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3381 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3382
3383 /* setup the private structure */
3384 err = ixgbevf_sw_init(adapter);
3385
3386 ixgbevf_init_last_counter_stats(adapter);
3387
3388#ifdef MAX_SKB_FRAGS
3389 netdev->features = NETIF_F_SG |
3390 NETIF_F_IP_CSUM |
3391 NETIF_F_HW_VLAN_TX |
3392 NETIF_F_HW_VLAN_RX |
3393 NETIF_F_HW_VLAN_FILTER;
3394
3395 netdev->features |= NETIF_F_IPV6_CSUM;
3396 netdev->features |= NETIF_F_TSO;
3397 netdev->features |= NETIF_F_TSO6;
3398 netdev->vlan_features |= NETIF_F_TSO;
3399 netdev->vlan_features |= NETIF_F_TSO6;
3400 netdev->vlan_features |= NETIF_F_IP_CSUM;
3401 netdev->vlan_features |= NETIF_F_SG;
3402
3403 if (pci_using_dac)
3404 netdev->features |= NETIF_F_HIGHDMA;
3405
3406#endif /* MAX_SKB_FRAGS */
3407
3408 /* The HW MAC address was set and/or determined in sw_init */
3409 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3410 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3411
3412 if (!is_valid_ether_addr(netdev->dev_addr)) {
3413 printk(KERN_ERR "invalid MAC address\n");
3414 err = -EIO;
3415 goto err_sw_init;
3416 }
3417
3418 init_timer(&adapter->watchdog_timer);
3419 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3420 adapter->watchdog_timer.data = (unsigned long)adapter;
3421
3422 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3423 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3424
3425 err = ixgbevf_init_interrupt_scheme(adapter);
3426 if (err)
3427 goto err_sw_init;
3428
3429 /* pick up the PCI bus settings for reporting later */
3430 if (hw->mac.ops.get_bus_info)
3431 hw->mac.ops.get_bus_info(hw);
3432
3433
3434 netif_carrier_off(netdev);
3435 netif_tx_stop_all_queues(netdev);
3436
3437 strcpy(netdev->name, "eth%d");
3438
3439 err = register_netdev(netdev);
3440 if (err)
3441 goto err_register;
3442
3443 adapter->netdev_registered = true;
3444
3445 /* print the MAC address */
3446 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3447 netdev->dev_addr[0],
3448 netdev->dev_addr[1],
3449 netdev->dev_addr[2],
3450 netdev->dev_addr[3],
3451 netdev->dev_addr[4],
3452 netdev->dev_addr[5]);
3453
3454 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3455
3456 hw_dbg(hw, "LRO is disabled \n");
3457
3458 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3459 cards_found++;
3460 return 0;
3461
3462err_register:
3463err_sw_init:
3464 ixgbevf_reset_interrupt_capability(adapter);
3465 iounmap(hw->hw_addr);
3466err_ioremap:
3467 free_netdev(netdev);
3468err_alloc_etherdev:
3469 pci_release_regions(pdev);
3470err_pci_reg:
3471err_dma:
3472 pci_disable_device(pdev);
3473 return err;
3474}
3475
3476/**
3477 * ixgbevf_remove - Device Removal Routine
3478 * @pdev: PCI device information struct
3479 *
3480 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3481 * that it should release a PCI device. The could be caused by a
3482 * Hot-Plug event, or because the driver is going to be removed from
3483 * memory.
3484 **/
3485static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3486{
3487 struct net_device *netdev = pci_get_drvdata(pdev);
3488 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3489
3490 set_bit(__IXGBEVF_DOWN, &adapter->state);
3491
3492 del_timer_sync(&adapter->watchdog_timer);
3493
3494 cancel_work_sync(&adapter->watchdog_task);
3495
3496 flush_scheduled_work();
3497
3498 if (adapter->netdev_registered) {
3499 unregister_netdev(netdev);
3500 adapter->netdev_registered = false;
3501 }
3502
3503 ixgbevf_reset_interrupt_capability(adapter);
3504
3505 iounmap(adapter->hw.hw_addr);
3506 pci_release_regions(pdev);
3507
3508 hw_dbg(&adapter->hw, "Remove complete\n");
3509
3510 kfree(adapter->tx_ring);
3511 kfree(adapter->rx_ring);
3512
3513 free_netdev(netdev);
3514
3515 pci_disable_device(pdev);
3516}
3517
3518static struct pci_driver ixgbevf_driver = {
3519 .name = ixgbevf_driver_name,
3520 .id_table = ixgbevf_pci_tbl,
3521 .probe = ixgbevf_probe,
3522 .remove = __devexit_p(ixgbevf_remove),
3523 .shutdown = ixgbevf_shutdown,
3524};
3525
3526/**
3527 * ixgbe_init_module - Driver Registration Routine
3528 *
3529 * ixgbe_init_module is the first routine called when the driver is
3530 * loaded. All it does is register with the PCI subsystem.
3531 **/
3532static int __init ixgbevf_init_module(void)
3533{
3534 int ret;
3535 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3536 ixgbevf_driver_version);
3537
3538 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3539
3540 ret = pci_register_driver(&ixgbevf_driver);
3541 return ret;
3542}
3543
3544module_init(ixgbevf_init_module);
3545
3546/**
3547 * ixgbe_exit_module - Driver Exit Cleanup Routine
3548 *
3549 * ixgbe_exit_module is called just before the driver is removed
3550 * from memory.
3551 **/
3552static void __exit ixgbevf_exit_module(void)
3553{
3554 pci_unregister_driver(&ixgbevf_driver);
3555}
3556
3557#ifdef DEBUG
3558/**
3559 * ixgbe_get_hw_dev_name - return device name string
3560 * used by hardware layer to print debugging information
3561 **/
3562char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3563{
3564 struct ixgbevf_adapter *adapter = hw->back;
3565 return adapter->netdev->name;
3566}
3567
3568#endif
3569module_exit(ixgbevf_exit_module);
3570
3571/* ixgbevf_main.c */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 17:19:45 -0500