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authorJohn Fastabend <john.r.fastabend@intel.com>2011-02-23 00:58:14 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-03-12 07:12:35 -0500
commit3b97fd695453ced96f22bdf1a84453f6744d25cc (patch)
treeb14fae0ed8354fa673f8ca02d1b8578a13b46208 /drivers/net/ixgbe
parent8187cd485b1a74b6ae258786b9ade3ecaafec318 (diff)
ixgbe: DCB, missed translation from 8021Qaz TSA to CEE link strict
The patch below allowed IEEE 802.1Qaz and CEE DCB hardware configurations to use common hardware set routines, commit 88eb696cc6a7af8f9272266965b1a4dd7d6a931b Author: John Fastabend <john.r.fastabend@intel.com> Date: Thu Feb 10 03:02:11 2011 -0800 ixgbe: DCB, abstract out dcb_config from DCB hardware configuration However the case when CEE link strict and group strict are set was missed and are currently being mapped incorrectly in some configurations. This patch resolves this. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe')
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb.c24
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c24
2 files changed, 23 insertions, 25 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb.c b/drivers/net/ixgbe/ixgbe_dcb.c
index c2ee6fcb4e91..e2e7a292525d 100644
--- a/drivers/net/ixgbe/ixgbe_dcb.c
+++ b/drivers/net/ixgbe/ixgbe_dcb.c
@@ -292,30 +292,8 @@ s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en)
292} 292}
293 293
294s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, 294s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw,
295 u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa) 295 u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type)
296{ 296{
297 int i;
298 u8 prio_type[IEEE_8021QAZ_MAX_TCS];
299
300 /* Map TSA onto CEE prio type */
301 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
302 switch (tsa[i]) {
303 case IEEE_8021QAZ_TSA_STRICT:
304 prio_type[i] = 2;
305 break;
306 case IEEE_8021QAZ_TSA_ETS:
307 prio_type[i] = 0;
308 break;
309 default:
310 /* Hardware only supports priority strict or
311 * ETS transmission selection algorithms if
312 * we receive some other value from dcbnl
313 * throw an error
314 */
315 return -EINVAL;
316 }
317 }
318
319 switch (hw->mac.type) { 297 switch (hw->mac.type) {
320 case ixgbe_mac_82598EB: 298 case ixgbe_mac_82598EB:
321 ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, 299 ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index 91ff51c53b04..8abef8d588fd 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -642,8 +642,9 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
642{ 642{
643 struct ixgbe_adapter *adapter = netdev_priv(dev); 643 struct ixgbe_adapter *adapter = netdev_priv(dev);
644 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS]; 644 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
645 __u8 prio_type[IEEE_8021QAZ_MAX_TCS];
645 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN; 646 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
646 int err; 647 int i, err;
647 /* naively give each TC a bwg to map onto CEE hardware */ 648 /* naively give each TC a bwg to map onto CEE hardware */
648 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7}; 649 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
649 650
@@ -659,9 +660,28 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
659 660
660 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets)); 661 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
661 662
663 /* Map TSA onto CEE prio type */
664 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
665 switch (ets->tc_tsa[i]) {
666 case IEEE_8021QAZ_TSA_STRICT:
667 prio_type[i] = 2;
668 break;
669 case IEEE_8021QAZ_TSA_ETS:
670 prio_type[i] = 0;
671 break;
672 default:
673 /* Hardware only supports priority strict or
674 * ETS transmission selection algorithms if
675 * we receive some other value from dcbnl
676 * throw an error
677 */
678 return -EINVAL;
679 }
680 }
681
662 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame); 682 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
663 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max, 683 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
664 bwg_id, ets->tc_tsa); 684 bwg_id, prio_type);
665 return err; 685 return err;
666} 686}
667 687