diff options
author | Greg Rose <gregory.v.rose@intel.com> | 2010-01-08 21:25:10 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-01-10 16:34:24 -0500 |
commit | 10ca132c41ecc1b55bc22667493ab75c4f6eec0d (patch) | |
tree | 82856455eaafab858e21f167fdb5a0b4277c16f0 /drivers/net/ixgbe | |
parent | ecc6703cbb2bb648c7345c652a704f7af56322b8 (diff) |
ixgbe: Mailbox header and code module
The 82599 virtual function device and the master 82599 physical function
device implement a mailbox utility for communication between the devices
using some SRAM scratch memory and a doorbell/answering mechanism enabled
via interrupt and/or polling. This C module and accompanying header
file implement the base functions for use of this feature.
Signed-off-by: Greg Rose <gregory.v.rose@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_mbx.c | 479 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_mbx.h | 96 |
2 files changed, 575 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_mbx.c b/drivers/net/ixgbe/ixgbe_mbx.c new file mode 100644 index 000000000000..d75f9148eb1f --- /dev/null +++ b/drivers/net/ixgbe/ixgbe_mbx.c | |||
@@ -0,0 +1,479 @@ | |||
1 | /******************************************************************************* | ||
2 | |||
3 | Intel 10 Gigabit PCI Express Linux driver | ||
4 | Copyright(c) 1999 - 2009 Intel Corporation. | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify it | ||
7 | under the terms and conditions of the GNU General Public License, | ||
8 | version 2, as published by the Free Software Foundation. | ||
9 | |||
10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License along with | ||
16 | this program; if not, write to the Free Software Foundation, Inc., | ||
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | |||
19 | The full GNU General Public License is included in this distribution in | ||
20 | the file called "COPYING". | ||
21 | |||
22 | Contact Information: | ||
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
25 | |||
26 | *******************************************************************************/ | ||
27 | |||
28 | #include <linux/pci.h> | ||
29 | #include <linux/delay.h> | ||
30 | #include "ixgbe_type.h" | ||
31 | #include "ixgbe_common.h" | ||
32 | #include "ixgbe_mbx.h" | ||
33 | |||
34 | /** | ||
35 | * ixgbe_read_mbx - Reads a message from the mailbox | ||
36 | * @hw: pointer to the HW structure | ||
37 | * @msg: The message buffer | ||
38 | * @size: Length of buffer | ||
39 | * @mbx_id: id of mailbox to read | ||
40 | * | ||
41 | * returns SUCCESS if it successfuly read message from buffer | ||
42 | **/ | ||
43 | s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
44 | { | ||
45 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
46 | s32 ret_val = IXGBE_ERR_MBX; | ||
47 | |||
48 | /* limit read to size of mailbox */ | ||
49 | if (size > mbx->size) | ||
50 | size = mbx->size; | ||
51 | |||
52 | if (mbx->ops.read) | ||
53 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | ||
54 | |||
55 | return ret_val; | ||
56 | } | ||
57 | |||
58 | /** | ||
59 | * ixgbe_write_mbx - Write a message to the mailbox | ||
60 | * @hw: pointer to the HW structure | ||
61 | * @msg: The message buffer | ||
62 | * @size: Length of buffer | ||
63 | * @mbx_id: id of mailbox to write | ||
64 | * | ||
65 | * returns SUCCESS if it successfully copied message into the buffer | ||
66 | **/ | ||
67 | s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
68 | { | ||
69 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
70 | s32 ret_val = 0; | ||
71 | |||
72 | if (size > mbx->size) | ||
73 | ret_val = IXGBE_ERR_MBX; | ||
74 | |||
75 | else if (mbx->ops.write) | ||
76 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | ||
77 | |||
78 | return ret_val; | ||
79 | } | ||
80 | |||
81 | /** | ||
82 | * ixgbe_check_for_msg - checks to see if someone sent us mail | ||
83 | * @hw: pointer to the HW structure | ||
84 | * @mbx_id: id of mailbox to check | ||
85 | * | ||
86 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
87 | **/ | ||
88 | s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id) | ||
89 | { | ||
90 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
91 | s32 ret_val = IXGBE_ERR_MBX; | ||
92 | |||
93 | if (mbx->ops.check_for_msg) | ||
94 | ret_val = mbx->ops.check_for_msg(hw, mbx_id); | ||
95 | |||
96 | return ret_val; | ||
97 | } | ||
98 | |||
99 | /** | ||
100 | * ixgbe_check_for_ack - checks to see if someone sent us ACK | ||
101 | * @hw: pointer to the HW structure | ||
102 | * @mbx_id: id of mailbox to check | ||
103 | * | ||
104 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
105 | **/ | ||
106 | s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id) | ||
107 | { | ||
108 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
109 | s32 ret_val = IXGBE_ERR_MBX; | ||
110 | |||
111 | if (mbx->ops.check_for_ack) | ||
112 | ret_val = mbx->ops.check_for_ack(hw, mbx_id); | ||
113 | |||
114 | return ret_val; | ||
115 | } | ||
116 | |||
117 | /** | ||
118 | * ixgbe_check_for_rst - checks to see if other side has reset | ||
119 | * @hw: pointer to the HW structure | ||
120 | * @mbx_id: id of mailbox to check | ||
121 | * | ||
122 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
123 | **/ | ||
124 | s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id) | ||
125 | { | ||
126 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
127 | s32 ret_val = IXGBE_ERR_MBX; | ||
128 | |||
129 | if (mbx->ops.check_for_rst) | ||
130 | ret_val = mbx->ops.check_for_rst(hw, mbx_id); | ||
131 | |||
132 | return ret_val; | ||
133 | } | ||
134 | |||
135 | /** | ||
136 | * ixgbe_poll_for_msg - Wait for message notification | ||
137 | * @hw: pointer to the HW structure | ||
138 | * @mbx_id: id of mailbox to write | ||
139 | * | ||
140 | * returns SUCCESS if it successfully received a message notification | ||
141 | **/ | ||
142 | static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id) | ||
143 | { | ||
144 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
145 | int countdown = mbx->timeout; | ||
146 | |||
147 | if (!countdown || !mbx->ops.check_for_msg) | ||
148 | goto out; | ||
149 | |||
150 | while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) { | ||
151 | countdown--; | ||
152 | if (!countdown) | ||
153 | break; | ||
154 | udelay(mbx->usec_delay); | ||
155 | } | ||
156 | |||
157 | /* if we failed, all future posted messages fail until reset */ | ||
158 | if (!countdown) | ||
159 | mbx->timeout = 0; | ||
160 | out: | ||
161 | return countdown ? 0 : IXGBE_ERR_MBX; | ||
162 | } | ||
163 | |||
164 | /** | ||
165 | * ixgbe_poll_for_ack - Wait for message acknowledgement | ||
166 | * @hw: pointer to the HW structure | ||
167 | * @mbx_id: id of mailbox to write | ||
168 | * | ||
169 | * returns SUCCESS if it successfully received a message acknowledgement | ||
170 | **/ | ||
171 | static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id) | ||
172 | { | ||
173 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
174 | int countdown = mbx->timeout; | ||
175 | |||
176 | if (!countdown || !mbx->ops.check_for_ack) | ||
177 | goto out; | ||
178 | |||
179 | while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) { | ||
180 | countdown--; | ||
181 | if (!countdown) | ||
182 | break; | ||
183 | udelay(mbx->usec_delay); | ||
184 | } | ||
185 | |||
186 | /* if we failed, all future posted messages fail until reset */ | ||
187 | if (!countdown) | ||
188 | mbx->timeout = 0; | ||
189 | out: | ||
190 | return countdown ? 0 : IXGBE_ERR_MBX; | ||
191 | } | ||
192 | |||
193 | /** | ||
194 | * ixgbe_read_posted_mbx - Wait for message notification and receive message | ||
195 | * @hw: pointer to the HW structure | ||
196 | * @msg: The message buffer | ||
197 | * @size: Length of buffer | ||
198 | * @mbx_id: id of mailbox to write | ||
199 | * | ||
200 | * returns SUCCESS if it successfully received a message notification and | ||
201 | * copied it into the receive buffer. | ||
202 | **/ | ||
203 | s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
204 | { | ||
205 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
206 | s32 ret_val = IXGBE_ERR_MBX; | ||
207 | |||
208 | if (!mbx->ops.read) | ||
209 | goto out; | ||
210 | |||
211 | ret_val = ixgbe_poll_for_msg(hw, mbx_id); | ||
212 | |||
213 | /* if ack received read message, otherwise we timed out */ | ||
214 | if (!ret_val) | ||
215 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | ||
216 | out: | ||
217 | return ret_val; | ||
218 | } | ||
219 | |||
220 | /** | ||
221 | * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack | ||
222 | * @hw: pointer to the HW structure | ||
223 | * @msg: The message buffer | ||
224 | * @size: Length of buffer | ||
225 | * @mbx_id: id of mailbox to write | ||
226 | * | ||
227 | * returns SUCCESS if it successfully copied message into the buffer and | ||
228 | * received an ack to that message within delay * timeout period | ||
229 | **/ | ||
230 | s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, | ||
231 | u16 mbx_id) | ||
232 | { | ||
233 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
234 | s32 ret_val = IXGBE_ERR_MBX; | ||
235 | |||
236 | /* exit if either we can't write or there isn't a defined timeout */ | ||
237 | if (!mbx->ops.write || !mbx->timeout) | ||
238 | goto out; | ||
239 | |||
240 | /* send msg */ | ||
241 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | ||
242 | |||
243 | /* if msg sent wait until we receive an ack */ | ||
244 | if (!ret_val) | ||
245 | ret_val = ixgbe_poll_for_ack(hw, mbx_id); | ||
246 | out: | ||
247 | return ret_val; | ||
248 | } | ||
249 | |||
250 | /** | ||
251 | * ixgbe_init_mbx_ops_generic - Initialize MB function pointers | ||
252 | * @hw: pointer to the HW structure | ||
253 | * | ||
254 | * Setup the mailbox read and write message function pointers | ||
255 | **/ | ||
256 | void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw) | ||
257 | { | ||
258 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
259 | |||
260 | mbx->ops.read_posted = ixgbe_read_posted_mbx; | ||
261 | mbx->ops.write_posted = ixgbe_write_posted_mbx; | ||
262 | } | ||
263 | |||
264 | static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) | ||
265 | { | ||
266 | u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); | ||
267 | s32 ret_val = IXGBE_ERR_MBX; | ||
268 | |||
269 | if (mbvficr & mask) { | ||
270 | ret_val = 0; | ||
271 | IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); | ||
272 | } | ||
273 | |||
274 | return ret_val; | ||
275 | } | ||
276 | |||
277 | /** | ||
278 | * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail | ||
279 | * @hw: pointer to the HW structure | ||
280 | * @vf_number: the VF index | ||
281 | * | ||
282 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
283 | **/ | ||
284 | static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number) | ||
285 | { | ||
286 | s32 ret_val = IXGBE_ERR_MBX; | ||
287 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); | ||
288 | u32 vf_bit = vf_number % 16; | ||
289 | |||
290 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit, | ||
291 | index)) { | ||
292 | ret_val = 0; | ||
293 | hw->mbx.stats.reqs++; | ||
294 | } | ||
295 | |||
296 | return ret_val; | ||
297 | } | ||
298 | |||
299 | /** | ||
300 | * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed | ||
301 | * @hw: pointer to the HW structure | ||
302 | * @vf_number: the VF index | ||
303 | * | ||
304 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
305 | **/ | ||
306 | static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number) | ||
307 | { | ||
308 | s32 ret_val = IXGBE_ERR_MBX; | ||
309 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); | ||
310 | u32 vf_bit = vf_number % 16; | ||
311 | |||
312 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit, | ||
313 | index)) { | ||
314 | ret_val = 0; | ||
315 | hw->mbx.stats.acks++; | ||
316 | } | ||
317 | |||
318 | return ret_val; | ||
319 | } | ||
320 | |||
321 | /** | ||
322 | * ixgbe_check_for_rst_pf - checks to see if the VF has reset | ||
323 | * @hw: pointer to the HW structure | ||
324 | * @vf_number: the VF index | ||
325 | * | ||
326 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
327 | **/ | ||
328 | static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number) | ||
329 | { | ||
330 | u32 reg_offset = (vf_number < 32) ? 0 : 1; | ||
331 | u32 vf_shift = vf_number % 32; | ||
332 | u32 vflre = 0; | ||
333 | s32 ret_val = IXGBE_ERR_MBX; | ||
334 | |||
335 | if (hw->mac.type == ixgbe_mac_82599EB) | ||
336 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); | ||
337 | |||
338 | if (vflre & (1 << vf_shift)) { | ||
339 | ret_val = 0; | ||
340 | IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); | ||
341 | hw->mbx.stats.rsts++; | ||
342 | } | ||
343 | |||
344 | return ret_val; | ||
345 | } | ||
346 | |||
347 | /** | ||
348 | * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock | ||
349 | * @hw: pointer to the HW structure | ||
350 | * @vf_number: the VF index | ||
351 | * | ||
352 | * return SUCCESS if we obtained the mailbox lock | ||
353 | **/ | ||
354 | static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number) | ||
355 | { | ||
356 | s32 ret_val = IXGBE_ERR_MBX; | ||
357 | u32 p2v_mailbox; | ||
358 | |||
359 | /* Take ownership of the buffer */ | ||
360 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); | ||
361 | |||
362 | /* reserve mailbox for vf use */ | ||
363 | p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number)); | ||
364 | if (p2v_mailbox & IXGBE_PFMAILBOX_PFU) | ||
365 | ret_val = 0; | ||
366 | |||
367 | return ret_val; | ||
368 | } | ||
369 | |||
370 | /** | ||
371 | * ixgbe_write_mbx_pf - Places a message in the mailbox | ||
372 | * @hw: pointer to the HW structure | ||
373 | * @msg: The message buffer | ||
374 | * @size: Length of buffer | ||
375 | * @vf_number: the VF index | ||
376 | * | ||
377 | * returns SUCCESS if it successfully copied message into the buffer | ||
378 | **/ | ||
379 | static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, | ||
380 | u16 vf_number) | ||
381 | { | ||
382 | s32 ret_val; | ||
383 | u16 i; | ||
384 | |||
385 | /* lock the mailbox to prevent pf/vf race condition */ | ||
386 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); | ||
387 | if (ret_val) | ||
388 | goto out_no_write; | ||
389 | |||
390 | /* flush msg and acks as we are overwriting the message buffer */ | ||
391 | ixgbe_check_for_msg_pf(hw, vf_number); | ||
392 | ixgbe_check_for_ack_pf(hw, vf_number); | ||
393 | |||
394 | /* copy the caller specified message to the mailbox memory buffer */ | ||
395 | for (i = 0; i < size; i++) | ||
396 | IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]); | ||
397 | |||
398 | /* Interrupt VF to tell it a message has been sent and release buffer*/ | ||
399 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); | ||
400 | |||
401 | /* update stats */ | ||
402 | hw->mbx.stats.msgs_tx++; | ||
403 | |||
404 | out_no_write: | ||
405 | return ret_val; | ||
406 | |||
407 | } | ||
408 | |||
409 | /** | ||
410 | * ixgbe_read_mbx_pf - Read a message from the mailbox | ||
411 | * @hw: pointer to the HW structure | ||
412 | * @msg: The message buffer | ||
413 | * @size: Length of buffer | ||
414 | * @vf_number: the VF index | ||
415 | * | ||
416 | * This function copies a message from the mailbox buffer to the caller's | ||
417 | * memory buffer. The presumption is that the caller knows that there was | ||
418 | * a message due to a VF request so no polling for message is needed. | ||
419 | **/ | ||
420 | static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, | ||
421 | u16 vf_number) | ||
422 | { | ||
423 | s32 ret_val; | ||
424 | u16 i; | ||
425 | |||
426 | /* lock the mailbox to prevent pf/vf race condition */ | ||
427 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); | ||
428 | if (ret_val) | ||
429 | goto out_no_read; | ||
430 | |||
431 | /* copy the message to the mailbox memory buffer */ | ||
432 | for (i = 0; i < size; i++) | ||
433 | msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i); | ||
434 | |||
435 | /* Acknowledge the message and release buffer */ | ||
436 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); | ||
437 | |||
438 | /* update stats */ | ||
439 | hw->mbx.stats.msgs_rx++; | ||
440 | |||
441 | out_no_read: | ||
442 | return ret_val; | ||
443 | } | ||
444 | |||
445 | /** | ||
446 | * ixgbe_init_mbx_params_pf - set initial values for pf mailbox | ||
447 | * @hw: pointer to the HW structure | ||
448 | * | ||
449 | * Initializes the hw->mbx struct to correct values for pf mailbox | ||
450 | */ | ||
451 | void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) | ||
452 | { | ||
453 | struct ixgbe_mbx_info *mbx = &hw->mbx; | ||
454 | |||
455 | if (hw->mac.type != ixgbe_mac_82599EB) | ||
456 | return; | ||
457 | |||
458 | mbx->timeout = 0; | ||
459 | mbx->usec_delay = 0; | ||
460 | |||
461 | mbx->size = IXGBE_VFMAILBOX_SIZE; | ||
462 | |||
463 | mbx->stats.msgs_tx = 0; | ||
464 | mbx->stats.msgs_rx = 0; | ||
465 | mbx->stats.reqs = 0; | ||
466 | mbx->stats.acks = 0; | ||
467 | mbx->stats.rsts = 0; | ||
468 | } | ||
469 | |||
470 | struct ixgbe_mbx_operations mbx_ops_82599 = { | ||
471 | .read = ixgbe_read_mbx_pf, | ||
472 | .write = ixgbe_write_mbx_pf, | ||
473 | .read_posted = ixgbe_read_posted_mbx, | ||
474 | .write_posted = ixgbe_write_posted_mbx, | ||
475 | .check_for_msg = ixgbe_check_for_msg_pf, | ||
476 | .check_for_ack = ixgbe_check_for_ack_pf, | ||
477 | .check_for_rst = ixgbe_check_for_rst_pf, | ||
478 | }; | ||
479 | |||
diff --git a/drivers/net/ixgbe/ixgbe_mbx.h b/drivers/net/ixgbe/ixgbe_mbx.h new file mode 100644 index 000000000000..be7ab3309ab7 --- /dev/null +++ b/drivers/net/ixgbe/ixgbe_mbx.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /******************************************************************************* | ||
2 | |||
3 | Intel 10 Gigabit PCI Express Linux driver | ||
4 | Copyright(c) 1999 - 2009 Intel Corporation. | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify it | ||
7 | under the terms and conditions of the GNU General Public License, | ||
8 | version 2, as published by the Free Software Foundation. | ||
9 | |||
10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License along with | ||
16 | this program; if not, write to the Free Software Foundation, Inc., | ||
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | |||
19 | The full GNU General Public License is included in this distribution in | ||
20 | the file called "COPYING". | ||
21 | |||
22 | Contact Information: | ||
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
25 | |||
26 | *******************************************************************************/ | ||
27 | |||
28 | #ifndef _IXGBE_MBX_H_ | ||
29 | #define _IXGBE_MBX_H_ | ||
30 | |||
31 | #include "ixgbe_type.h" | ||
32 | |||
33 | #define IXGBE_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ | ||
34 | #define IXGBE_ERR_MBX -100 | ||
35 | |||
36 | #define IXGBE_VFMAILBOX 0x002FC | ||
37 | #define IXGBE_VFMBMEM 0x00200 | ||
38 | |||
39 | #define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * x)) | ||
40 | #define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * vfn)) | ||
41 | |||
42 | #define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */ | ||
43 | #define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ | ||
44 | #define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ | ||
45 | #define IXGBE_PFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ | ||
46 | #define IXGBE_PFMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */ | ||
47 | |||
48 | #define IXGBE_MBVFICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */ | ||
49 | #define IXGBE_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */ | ||
50 | #define IXGBE_MBVFICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */ | ||
51 | #define IXGBE_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */ | ||
52 | |||
53 | |||
54 | /* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the | ||
55 | * PF. The reverse is true if it is IXGBE_PF_*. | ||
56 | * Message ACK's are the value or'd with 0xF0000000 | ||
57 | */ | ||
58 | #define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with | ||
59 | * this are the ACK */ | ||
60 | #define IXGBE_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with | ||
61 | * this are the NACK */ | ||
62 | #define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still | ||
63 | clear to send requests */ | ||
64 | #define IXGBE_VT_MSGINFO_SHIFT 16 | ||
65 | /* bits 23:16 are used for exra info for certain messages */ | ||
66 | #define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT) | ||
67 | |||
68 | #define IXGBE_VF_RESET 0x01 /* VF requests reset */ | ||
69 | #define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */ | ||
70 | #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */ | ||
71 | #define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */ | ||
72 | #define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */ | ||
73 | |||
74 | /* length of permanent address message returned from PF */ | ||
75 | #define IXGBE_VF_PERMADDR_MSG_LEN 4 | ||
76 | /* word in permanent address message with the current multicast type */ | ||
77 | #define IXGBE_VF_MC_TYPE_WORD 3 | ||
78 | |||
79 | #define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */ | ||
80 | |||
81 | #define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */ | ||
82 | #define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */ | ||
83 | |||
84 | s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16); | ||
85 | s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16); | ||
86 | s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16); | ||
87 | s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16); | ||
88 | s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16); | ||
89 | s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16); | ||
90 | s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16); | ||
91 | void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw); | ||
92 | void ixgbe_init_mbx_params_pf(struct ixgbe_hw *); | ||
93 | |||
94 | extern struct ixgbe_mbx_operations mbx_ops_82599; | ||
95 | |||
96 | #endif /* _IXGBE_MBX_H_ */ | ||