diff options
author | PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com> | 2009-02-27 10:44:30 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-03-01 03:24:33 -0500 |
commit | 11afc1b1fd802c11dc0fa986c210602c177f1e21 (patch) | |
tree | 16f46e5acf0aa7b5ec8b1a0cc07a0c89ac002642 /drivers/net/ixgbe/ixgbe_phy.h | |
parent | 8010dc306ba39a8cdb3993d1e809fcb7dfdf089a (diff) |
ixgbe: Add hardware specific initialization code for 82599 devices
This patch adds the hardware initialization code specific to 82599. This
is similar to the 82598 hardware initialization code. It also includes all
changes to the existing hardware init code to support 82599.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_phy.h')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_phy.h | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h index 539a3061eb29..cc5f1b3287e1 100644 --- a/drivers/net/ixgbe/ixgbe_phy.h +++ b/drivers/net/ixgbe/ixgbe_phy.h | |||
@@ -54,14 +54,15 @@ | |||
54 | #define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 | 54 | #define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 |
55 | 55 | ||
56 | /* Bit-shift macros */ | 56 | /* Bit-shift macros */ |
57 | #define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 12 | 57 | #define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24 |
58 | #define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 8 | 58 | #define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16 |
59 | #define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 4 | 59 | #define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8 |
60 | 60 | ||
61 | /* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ | 61 | /* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ |
62 | #define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 | 62 | #define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 |
63 | #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 | 63 | #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 |
64 | #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 | 64 | #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 |
65 | #define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100 | ||
65 | 66 | ||
66 | /* I2C SDA and SCL timing parameters for standard mode */ | 67 | /* I2C SDA and SCL timing parameters for standard mode */ |
67 | #define IXGBE_I2C_T_HD_STA 4 | 68 | #define IXGBE_I2C_T_HD_STA 4 |
@@ -101,5 +102,12 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); | |||
101 | s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, | 102 | s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, |
102 | u16 *list_offset, | 103 | u16 *list_offset, |
103 | u16 *data_offset); | 104 | u16 *data_offset); |
104 | 105 | s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, | |
106 | u8 dev_addr, u8 *data); | ||
107 | s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, | ||
108 | u8 dev_addr, u8 data); | ||
109 | s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, | ||
110 | u8 *eeprom_data); | ||
111 | s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, | ||
112 | u8 eeprom_data); | ||
105 | #endif /* _IXGBE_PHY_H_ */ | 113 | #endif /* _IXGBE_PHY_H_ */ |