diff options
author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2009-05-19 05:19:11 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-05-19 18:36:14 -0400 |
commit | 0cefafadbbe3947fd97b7560a214eb486069faac (patch) | |
tree | c9dc76511ce295758e324f11c7435217a8b2c321 /drivers/net/ixgbe/ixgbe_main.c | |
parent | 537d58a00a8756189b10ffc1309c0131d57b6320 (diff) |
ixgbe: Cleanup feature setup code to make the code more readable
This is purely a cleanup patch. This collapses some of the code required
when we configure our Tx and Rx feature sets, and makes the code more
readable and maintainable.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 85 |
1 files changed, 50 insertions, 35 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index d3426197f4b3..3d5f7f575ae3 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -1747,10 +1747,11 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) | |||
1747 | u32 srrctl; | 1747 | u32 srrctl; |
1748 | int queue0 = 0; | 1748 | int queue0 = 0; |
1749 | unsigned long mask; | 1749 | unsigned long mask; |
1750 | struct ixgbe_ring_feature *feature = adapter->ring_feature; | ||
1750 | 1751 | ||
1751 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 1752 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { |
1752 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 1753 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
1753 | int dcb_i = adapter->ring_feature[RING_F_DCB].indices; | 1754 | int dcb_i = feature[RING_F_DCB].indices; |
1754 | if (dcb_i == 8) | 1755 | if (dcb_i == 8) |
1755 | queue0 = index >> 4; | 1756 | queue0 = index >> 4; |
1756 | else if (dcb_i == 4) | 1757 | else if (dcb_i == 4) |
@@ -1773,7 +1774,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) | |||
1773 | queue0 = index; | 1774 | queue0 = index; |
1774 | } | 1775 | } |
1775 | } else { | 1776 | } else { |
1776 | mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask; | 1777 | mask = (unsigned long) feature[RING_F_RSS].mask; |
1777 | queue0 = index & mask; | 1778 | queue0 = index & mask; |
1778 | index = index & mask; | 1779 | index = index & mask; |
1779 | } | 1780 | } |
@@ -1804,6 +1805,36 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) | |||
1804 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl); | 1805 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl); |
1805 | } | 1806 | } |
1806 | 1807 | ||
1808 | static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) | ||
1809 | { | ||
1810 | u32 mrqc = 0; | ||
1811 | int mask; | ||
1812 | |||
1813 | if (!(adapter->hw.mac.type == ixgbe_mac_82599EB)) | ||
1814 | return mrqc; | ||
1815 | |||
1816 | mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED | ||
1817 | #ifdef CONFIG_IXGBE_DCB | ||
1818 | | IXGBE_FLAG_DCB_ENABLED | ||
1819 | #endif | ||
1820 | ); | ||
1821 | |||
1822 | switch (mask) { | ||
1823 | case (IXGBE_FLAG_RSS_ENABLED): | ||
1824 | mrqc = IXGBE_MRQC_RSSEN; | ||
1825 | break; | ||
1826 | #ifdef CONFIG_IXGBE_DCB | ||
1827 | case (IXGBE_FLAG_DCB_ENABLED): | ||
1828 | mrqc = IXGBE_MRQC_RT8TCEN; | ||
1829 | break; | ||
1830 | #endif /* CONFIG_IXGBE_DCB */ | ||
1831 | default: | ||
1832 | break; | ||
1833 | } | ||
1834 | |||
1835 | return mrqc; | ||
1836 | } | ||
1837 | |||
1807 | /** | 1838 | /** |
1808 | * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset | 1839 | * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset |
1809 | * @adapter: board private structure | 1840 | * @adapter: board private structure |
@@ -1877,8 +1908,10 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1877 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | 1908 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); |
1878 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN); | 1909 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN); |
1879 | 1910 | ||
1880 | /* Setup the HW Rx Head and Tail Descriptor Pointers and | 1911 | /* |
1881 | * the Base and Length of the Rx Descriptor Ring */ | 1912 | * Setup the HW Rx Head and Tail Descriptor Pointers and |
1913 | * the Base and Length of the Rx Descriptor Ring | ||
1914 | */ | ||
1882 | for (i = 0; i < adapter->num_rx_queues; i++) { | 1915 | for (i = 0; i < adapter->num_rx_queues; i++) { |
1883 | rdba = adapter->rx_ring[i].dma; | 1916 | rdba = adapter->rx_ring[i].dma; |
1884 | j = adapter->rx_ring[i].reg_idx; | 1917 | j = adapter->rx_ring[i].reg_idx; |
@@ -1922,23 +1955,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1922 | } | 1955 | } |
1923 | 1956 | ||
1924 | /* Program MRQC for the distribution of queues */ | 1957 | /* Program MRQC for the distribution of queues */ |
1925 | if (hw->mac.type == ixgbe_mac_82599EB) { | 1958 | mrqc = ixgbe_setup_mrqc(adapter); |
1926 | int mask = adapter->flags & ( | ||
1927 | IXGBE_FLAG_RSS_ENABLED | ||
1928 | | IXGBE_FLAG_DCB_ENABLED | ||
1929 | ); | ||
1930 | 1959 | ||
1931 | switch (mask) { | ||
1932 | case (IXGBE_FLAG_RSS_ENABLED): | ||
1933 | mrqc = IXGBE_MRQC_RSSEN; | ||
1934 | break; | ||
1935 | case (IXGBE_FLAG_DCB_ENABLED): | ||
1936 | mrqc = IXGBE_MRQC_RT8TCEN; | ||
1937 | break; | ||
1938 | default: | ||
1939 | break; | ||
1940 | } | ||
1941 | } | ||
1942 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { | 1960 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { |
1943 | /* Fill out redirection table */ | 1961 | /* Fill out redirection table */ |
1944 | for (i = 0, j = 0; i < 128; i++, j++) { | 1962 | for (i = 0, j = 0; i < 128; i++, j++) { |
@@ -2842,17 +2860,15 @@ static void ixgbe_reset_task(struct work_struct *work) | |||
2842 | static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) | 2860 | static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) |
2843 | { | 2861 | { |
2844 | bool ret = false; | 2862 | bool ret = false; |
2863 | struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB]; | ||
2845 | 2864 | ||
2846 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 2865 | if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) |
2847 | adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3; | 2866 | return ret; |
2848 | adapter->num_rx_queues = | 2867 | |
2849 | adapter->ring_feature[RING_F_DCB].indices; | 2868 | f->mask = 0x7 << 3; |
2850 | adapter->num_tx_queues = | 2869 | adapter->num_rx_queues = f->indices; |
2851 | adapter->ring_feature[RING_F_DCB].indices; | 2870 | adapter->num_tx_queues = f->indices; |
2852 | ret = true; | 2871 | ret = true; |
2853 | } else { | ||
2854 | ret = false; | ||
2855 | } | ||
2856 | 2872 | ||
2857 | return ret; | 2873 | return ret; |
2858 | } | 2874 | } |
@@ -2869,13 +2885,12 @@ static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) | |||
2869 | static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter) | 2885 | static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter) |
2870 | { | 2886 | { |
2871 | bool ret = false; | 2887 | bool ret = false; |
2888 | struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS]; | ||
2872 | 2889 | ||
2873 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { | 2890 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { |
2874 | adapter->ring_feature[RING_F_RSS].mask = 0xF; | 2891 | f->mask = 0xF; |
2875 | adapter->num_rx_queues = | 2892 | adapter->num_rx_queues = f->indices; |
2876 | adapter->ring_feature[RING_F_RSS].indices; | 2893 | adapter->num_tx_queues = f->indices; |
2877 | adapter->num_tx_queues = | ||
2878 | adapter->ring_feature[RING_F_RSS].indices; | ||
2879 | ret = true; | 2894 | ret = true; |
2880 | } else { | 2895 | } else { |
2881 | ret = false; | 2896 | ret = false; |