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authorAuke Kok <auke-jan.h.kok@intel.com>2007-09-15 17:07:45 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:51:02 -0400
commit9a799d71034c4e2b168740c8a8530591011313d5 (patch)
treece2dedefe2b101e1e81105a7ca8e3e61321193b6 /drivers/net/ixgbe/ixgbe_main.c
parentdc029ad97f267cbd1c2e978a443eb5ae93a55328 (diff)
ixgbe: driver for Intel(R) 82598 PCI-Express 10GbE adapters (v4)
This patch adds support for the Intel 82598 PCI-Express 10GbE chipset. Devices will be available on the market soon. This version of the driver is largely the same as the last release: * Driver uses a single RX and single TX queue, each using 1 MSI-X irq vector. * Driver runs in NAPI mode only * Driver is largely multiqueue-ready (TM) Changes since 20070803: * removed wrappers for hardware functions * incorporated e1000e-style HW api reorganization code * sparse/checkpatch cleanups, namespace cleanups * driver prints out extra debugging information at load time identifying adapter board number, mac, phy types * removed ixgbe_api.c, ixgbe_api.h, ixgbe_osdep.h * driver update to 1.1.18 * removed ixgbe.txt which contained no useful info anymore [ Integrated napi_struct changes from Auke as well... -DaveM ] Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Ayyappan Veeraiyan <ayyappan.veeraiyan@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c2873
1 files changed, 2873 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
new file mode 100644
index 000000000000..a08a46224c28
--- /dev/null
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -0,0 +1,2873 @@
1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/types.h>
30#include <linux/module.h>
31#include <linux/pci.h>
32#include <linux/netdevice.h>
33#include <linux/vmalloc.h>
34#include <linux/string.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/ethtool.h>
42#include <linux/if_vlan.h>
43
44#include "ixgbe.h"
45#include "ixgbe_common.h"
46
47char ixgbe_driver_name[] = "ixgbe";
48static char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
50
51#define DRV_VERSION "1.1.18"
52char ixgbe_driver_version[] = DRV_VERSION;
53static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
54
55static const struct ixgbe_info *ixgbe_info_tbl[] = {
56 [board_82598AF] = &ixgbe_82598AF_info,
57 [board_82598EB] = &ixgbe_82598EB_info,
58 [board_82598AT] = &ixgbe_82598AT_info,
59};
60
61/* ixgbe_pci_tbl - PCI Device ID Table
62 *
63 * Wildcard entries (PCI_ANY_ID) should come last
64 * Last entry must be all 0s
65 *
66 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
67 * Class, Class Mask, private data (not used) }
68 */
69static struct pci_device_id ixgbe_pci_tbl[] = {
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
71 board_82598AF },
72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
73 board_82598AF },
74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
75 board_82598AT },
76 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
77 board_82598EB },
78
79 /* required last entry */
80 {0, }
81};
82MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
83
84MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
85MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
89#define DEFAULT_DEBUG_LEVEL_SHIFT 3
90
91
92#ifdef DEBUG
93/**
94 * ixgbe_get_hw_dev_name - return device name string
95 * used by hardware layer to print debugging information
96 **/
97char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
98{
99 struct ixgbe_adapter *adapter = hw->back;
100 struct net_device *netdev = adapter->netdev;
101 return netdev->name;
102}
103#endif
104
105static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
106 u8 msix_vector)
107{
108 u32 ivar, index;
109
110 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
111 index = (int_alloc_entry >> 2) & 0x1F;
112 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
113 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
114 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
115 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
116}
117
118static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
119 struct ixgbe_tx_buffer
120 *tx_buffer_info)
121{
122 if (tx_buffer_info->dma) {
123 pci_unmap_page(adapter->pdev,
124 tx_buffer_info->dma,
125 tx_buffer_info->length, PCI_DMA_TODEVICE);
126 tx_buffer_info->dma = 0;
127 }
128 if (tx_buffer_info->skb) {
129 dev_kfree_skb_any(tx_buffer_info->skb);
130 tx_buffer_info->skb = NULL;
131 }
132 /* tx_buffer_info must be completely set up in the transmit path */
133}
134
135static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
136 struct ixgbe_ring *tx_ring,
137 unsigned int eop,
138 union ixgbe_adv_tx_desc *eop_desc)
139{
140 /* Detect a transmit hang in hardware, this serializes the
141 * check with the clearing of time_stamp and movement of i */
142 adapter->detect_tx_hung = false;
143 if (tx_ring->tx_buffer_info[eop].dma &&
144 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
145 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
146 /* detected Tx unit hang */
147 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
148 " TDH <%x>\n"
149 " TDT <%x>\n"
150 " next_to_use <%x>\n"
151 " next_to_clean <%x>\n"
152 "tx_buffer_info[next_to_clean]\n"
153 " time_stamp <%lx>\n"
154 " next_to_watch <%x>\n"
155 " jiffies <%lx>\n"
156 " next_to_watch.status <%x>\n",
157 readl(adapter->hw.hw_addr + tx_ring->head),
158 readl(adapter->hw.hw_addr + tx_ring->tail),
159 tx_ring->next_to_use,
160 tx_ring->next_to_clean,
161 tx_ring->tx_buffer_info[eop].time_stamp,
162 eop, jiffies, eop_desc->wb.status);
163 return true;
164 }
165
166 return false;
167}
168
169/**
170 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
171 * @adapter: board private structure
172 **/
173static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
174 struct ixgbe_ring *tx_ring)
175{
176 struct net_device *netdev = adapter->netdev;
177 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
178 struct ixgbe_tx_buffer *tx_buffer_info;
179 unsigned int i, eop;
180 bool cleaned = false;
181 int count = 0;
182
183 i = tx_ring->next_to_clean;
184 eop = tx_ring->tx_buffer_info[i].next_to_watch;
185 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
186 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
187 for (cleaned = false; !cleaned;) {
188 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
189 tx_buffer_info = &tx_ring->tx_buffer_info[i];
190 cleaned = (i == eop);
191
192 tx_ring->stats.bytes += tx_buffer_info->length;
193 ixgbe_unmap_and_free_tx_resource(adapter,
194 tx_buffer_info);
195 tx_desc->wb.status = 0;
196
197 i++;
198 if (i == tx_ring->count)
199 i = 0;
200 }
201
202 tx_ring->stats.packets++;
203
204 eop = tx_ring->tx_buffer_info[i].next_to_watch;
205 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
206
207 /* weight of a sort for tx, avoid endless transmit cleanup */
208 if (count++ >= tx_ring->work_limit)
209 break;
210 }
211
212 tx_ring->next_to_clean = i;
213
214#define TX_WAKE_THRESHOLD 32
215 spin_lock(&tx_ring->tx_lock);
216
217 if (cleaned && netif_carrier_ok(netdev) &&
218 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD) &&
219 !test_bit(__IXGBE_DOWN, &adapter->state))
220 netif_wake_queue(netdev);
221
222 spin_unlock(&tx_ring->tx_lock);
223
224 if (adapter->detect_tx_hung)
225 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
226 netif_stop_queue(netdev);
227
228 if (count >= tx_ring->work_limit)
229 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
230
231 return cleaned;
232}
233
234/**
235 * ixgbe_receive_skb - Send a completed packet up the stack
236 * @adapter: board private structure
237 * @skb: packet to send up
238 * @is_vlan: packet has a VLAN tag
239 * @tag: VLAN tag from descriptor
240 **/
241static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
242 struct sk_buff *skb, bool is_vlan,
243 u16 tag)
244{
245 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
246 if (adapter->vlgrp && is_vlan)
247 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
248 else
249 netif_receive_skb(skb);
250 } else {
251
252 if (adapter->vlgrp && is_vlan)
253 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
254 else
255 netif_rx(skb);
256 }
257}
258
259static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
260 u32 status_err,
261 struct sk_buff *skb)
262{
263 skb->ip_summed = CHECKSUM_NONE;
264
265 /* Ignore Checksum bit is set */
266 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
267 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
268 return;
269 /* TCP/UDP checksum error bit is set */
270 if (status_err & (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE)) {
271 /* let the stack verify checksum errors */
272 adapter->hw_csum_rx_error++;
273 return;
274 }
275 /* It must be a TCP or UDP packet with a valid checksum */
276 if (status_err & (IXGBE_RXD_STAT_L4CS | IXGBE_RXD_STAT_UDPCS))
277 skb->ip_summed = CHECKSUM_UNNECESSARY;
278 adapter->hw_csum_rx_good++;
279}
280
281/**
282 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
283 * @adapter: address of board private structure
284 **/
285static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
286 struct ixgbe_ring *rx_ring,
287 int cleaned_count)
288{
289 struct net_device *netdev = adapter->netdev;
290 struct pci_dev *pdev = adapter->pdev;
291 union ixgbe_adv_rx_desc *rx_desc;
292 struct ixgbe_rx_buffer *rx_buffer_info;
293 struct sk_buff *skb;
294 unsigned int i;
295 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
296
297 i = rx_ring->next_to_use;
298 rx_buffer_info = &rx_ring->rx_buffer_info[i];
299
300 while (cleaned_count--) {
301 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
302
303 if (!rx_buffer_info->page &&
304 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
305 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
306 if (!rx_buffer_info->page) {
307 adapter->alloc_rx_page_failed++;
308 goto no_buffers;
309 }
310 rx_buffer_info->page_dma =
311 pci_map_page(pdev, rx_buffer_info->page,
312 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
313 }
314
315 if (!rx_buffer_info->skb) {
316 skb = netdev_alloc_skb(netdev, bufsz);
317
318 if (!skb) {
319 adapter->alloc_rx_buff_failed++;
320 goto no_buffers;
321 }
322
323 /*
324 * Make buffer alignment 2 beyond a 16 byte boundary
325 * this will result in a 16 byte aligned IP header after
326 * the 14 byte MAC header is removed
327 */
328 skb_reserve(skb, NET_IP_ALIGN);
329
330 rx_buffer_info->skb = skb;
331 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
332 bufsz,
333 PCI_DMA_FROMDEVICE);
334 }
335 /* Refresh the desc even if buffer_addrs didn't change because
336 * each write-back erases this info. */
337 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
338 rx_desc->read.pkt_addr =
339 cpu_to_le64(rx_buffer_info->page_dma);
340 rx_desc->read.hdr_addr =
341 cpu_to_le64(rx_buffer_info->dma);
342 } else {
343 rx_desc->read.pkt_addr =
344 cpu_to_le64(rx_buffer_info->dma);
345 }
346
347 i++;
348 if (i == rx_ring->count)
349 i = 0;
350 rx_buffer_info = &rx_ring->rx_buffer_info[i];
351 }
352no_buffers:
353 if (rx_ring->next_to_use != i) {
354 rx_ring->next_to_use = i;
355 if (i-- == 0)
356 i = (rx_ring->count - 1);
357
358 /*
359 * Force memory writes to complete before letting h/w
360 * know there are new descriptors to fetch. (Only
361 * applicable for weak-ordered memory model archs,
362 * such as IA-64).
363 */
364 wmb();
365 writel(i, adapter->hw.hw_addr + rx_ring->tail);
366 }
367}
368
369static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
370 struct ixgbe_ring *rx_ring,
371 int *work_done, int work_to_do)
372{
373 struct net_device *netdev = adapter->netdev;
374 struct pci_dev *pdev = adapter->pdev;
375 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
376 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
377 struct sk_buff *skb;
378 unsigned int i;
379 u32 upper_len, len, staterr;
380 u16 hdr_info, vlan_tag;
381 bool is_vlan, cleaned = false;
382 int cleaned_count = 0;
383
384 i = rx_ring->next_to_clean;
385 upper_len = 0;
386 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
387 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
388 rx_buffer_info = &rx_ring->rx_buffer_info[i];
389 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
390 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
391
392 while (staterr & IXGBE_RXD_STAT_DD) {
393 if (*work_done >= work_to_do)
394 break;
395 (*work_done)++;
396
397 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
398 hdr_info =
399 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
400 len =
401 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
402 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
403 if (hdr_info & IXGBE_RXDADV_SPH)
404 adapter->rx_hdr_split++;
405 if (len > IXGBE_RX_HDR_SIZE)
406 len = IXGBE_RX_HDR_SIZE;
407 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
408 } else
409 len = le16_to_cpu(rx_desc->wb.upper.length);
410
411 cleaned = true;
412 skb = rx_buffer_info->skb;
413 prefetch(skb->data - NET_IP_ALIGN);
414 rx_buffer_info->skb = NULL;
415
416 if (len && !skb_shinfo(skb)->nr_frags) {
417 pci_unmap_single(pdev, rx_buffer_info->dma,
418 adapter->rx_buf_len + NET_IP_ALIGN,
419 PCI_DMA_FROMDEVICE);
420 skb_put(skb, len);
421 }
422
423 if (upper_len) {
424 pci_unmap_page(pdev, rx_buffer_info->page_dma,
425 PAGE_SIZE, PCI_DMA_FROMDEVICE);
426 rx_buffer_info->page_dma = 0;
427 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
428 rx_buffer_info->page, 0, upper_len);
429 rx_buffer_info->page = NULL;
430
431 skb->len += upper_len;
432 skb->data_len += upper_len;
433 skb->truesize += upper_len;
434 }
435
436 i++;
437 if (i == rx_ring->count)
438 i = 0;
439 next_buffer = &rx_ring->rx_buffer_info[i];
440
441 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
442 prefetch(next_rxd);
443
444 cleaned_count++;
445 if (staterr & IXGBE_RXD_STAT_EOP) {
446 rx_ring->stats.packets++;
447 rx_ring->stats.bytes += skb->len;
448 } else {
449 rx_buffer_info->skb = next_buffer->skb;
450 rx_buffer_info->dma = next_buffer->dma;
451 next_buffer->skb = skb;
452 adapter->non_eop_descs++;
453 goto next_desc;
454 }
455
456 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
457 dev_kfree_skb_irq(skb);
458 goto next_desc;
459 }
460
461 ixgbe_rx_checksum(adapter, staterr, skb);
462 skb->protocol = eth_type_trans(skb, netdev);
463 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
464 netdev->last_rx = jiffies;
465
466next_desc:
467 rx_desc->wb.upper.status_error = 0;
468
469 /* return some buffers to hardware, one at a time is too slow */
470 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
471 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
472 cleaned_count = 0;
473 }
474
475 /* use prefetched values */
476 rx_desc = next_rxd;
477 rx_buffer_info = next_buffer;
478
479 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
480 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
481 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
482 }
483
484 rx_ring->next_to_clean = i;
485 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
486
487 if (cleaned_count)
488 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
489
490 return cleaned;
491}
492
493#define IXGBE_MAX_INTR 10
494/**
495 * ixgbe_configure_msix - Configure MSI-X hardware
496 * @adapter: board private structure
497 *
498 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
499 * interrupts.
500 **/
501static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
502{
503 int i, vector = 0;
504
505 for (i = 0; i < adapter->num_tx_queues; i++) {
506 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
507 IXGBE_MSIX_VECTOR(vector));
508 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
509 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
510 vector++;
511 }
512
513 for (i = 0; i < adapter->num_rx_queues; i++) {
514 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
515 IXGBE_MSIX_VECTOR(vector));
516 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
517 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
518 vector++;
519 }
520
521 vector = adapter->num_tx_queues + adapter->num_rx_queues;
522 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
523 IXGBE_MSIX_VECTOR(vector));
524 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
525}
526
527static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
528{
529 struct net_device *netdev = data;
530 struct ixgbe_adapter *adapter = netdev_priv(netdev);
531 struct ixgbe_hw *hw = &adapter->hw;
532 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
533
534 if (eicr & IXGBE_EICR_LSC) {
535 adapter->lsc_int++;
536 if (!test_bit(__IXGBE_DOWN, &adapter->state))
537 mod_timer(&adapter->watchdog_timer, jiffies);
538 }
539 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
540
541 return IRQ_HANDLED;
542}
543
544static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
545{
546 struct ixgbe_ring *txr = data;
547 struct ixgbe_adapter *adapter = txr->adapter;
548
549 ixgbe_clean_tx_irq(adapter, txr);
550
551 return IRQ_HANDLED;
552}
553
554static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
555{
556 struct ixgbe_ring *rxr = data;
557 struct ixgbe_adapter *adapter = rxr->adapter;
558
559 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
560 netif_rx_schedule(adapter->netdev, &adapter->napi);
561 return IRQ_HANDLED;
562}
563
564static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
565{
566 struct ixgbe_adapter *adapter = container_of(napi,
567 struct ixgbe_adapter, napi);
568 struct net_device *netdev = adapter->netdev;
569 int work_done = 0;
570 struct ixgbe_ring *rxr = adapter->rx_ring;
571
572 /* Keep link state information with original netdev */
573 if (!netif_carrier_ok(netdev))
574 goto quit_polling;
575
576 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
577
578 /* If no Tx and not enough Rx work done, exit the polling mode */
579 if ((work_done < budget) || !netif_running(netdev)) {
580quit_polling:
581 netif_rx_complete(netdev, napi);
582 if (!test_bit(__IXGBE_DOWN, &adapter->state))
583 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
584 rxr->eims_value);
585 }
586
587 return work_done;
588}
589
590/**
591 * ixgbe_setup_msix - Initialize MSI-X interrupts
592 *
593 * ixgbe_setup_msix allocates MSI-X vectors and requests
594 * interrutps from the kernel.
595 **/
596static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
597{
598 struct net_device *netdev = adapter->netdev;
599 int i, int_vector = 0, err = 0;
600 int max_msix_count;
601
602 /* +1 for the LSC interrupt */
603 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
604 adapter->msix_entries = kcalloc(max_msix_count,
605 sizeof(struct msix_entry), GFP_KERNEL);
606 if (!adapter->msix_entries)
607 return -ENOMEM;
608
609 for (i = 0; i < max_msix_count; i++)
610 adapter->msix_entries[i].entry = i;
611
612 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
613 max_msix_count);
614 if (err)
615 goto out;
616
617 for (i = 0; i < adapter->num_tx_queues; i++) {
618 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
619 err = request_irq(adapter->msix_entries[int_vector].vector,
620 &ixgbe_msix_clean_tx,
621 0,
622 adapter->tx_ring[i].name,
623 &(adapter->tx_ring[i]));
624 if (err) {
625 DPRINTK(PROBE, ERR,
626 "request_irq failed for MSIX interrupt "
627 "Error: %d\n", err);
628 goto release_irqs;
629 }
630 adapter->tx_ring[i].eims_value =
631 (1 << IXGBE_MSIX_VECTOR(int_vector));
632 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
633 int_vector++;
634 }
635
636 for (i = 0; i < adapter->num_rx_queues; i++) {
637 if (strlen(netdev->name) < (IFNAMSIZ - 5))
638 sprintf(adapter->rx_ring[i].name,
639 "%s-rx%d", netdev->name, i);
640 else
641 memcpy(adapter->rx_ring[i].name,
642 netdev->name, IFNAMSIZ);
643 err = request_irq(adapter->msix_entries[int_vector].vector,
644 &ixgbe_msix_clean_rx, 0,
645 adapter->rx_ring[i].name,
646 &(adapter->rx_ring[i]));
647 if (err) {
648 DPRINTK(PROBE, ERR,
649 "request_irq failed for MSIX interrupt "
650 "Error: %d\n", err);
651 goto release_irqs;
652 }
653
654 adapter->rx_ring[i].eims_value =
655 (1 << IXGBE_MSIX_VECTOR(int_vector));
656 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
657 int_vector++;
658 }
659
660 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
661 err = request_irq(adapter->msix_entries[int_vector].vector,
662 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
663 if (err) {
664 DPRINTK(PROBE, ERR,
665 "request_irq for msix_lsc failed: %d\n", err);
666 goto release_irqs;
667 }
668
669 /* FIXME: implement netif_napi_remove() instead */
670 adapter->napi.poll = ixgbe_clean_rxonly;
671 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
672 return 0;
673
674release_irqs:
675 int_vector--;
676 for (; int_vector >= adapter->num_tx_queues; int_vector--)
677 free_irq(adapter->msix_entries[int_vector].vector,
678 &(adapter->rx_ring[int_vector -
679 adapter->num_tx_queues]));
680
681 for (; int_vector >= 0; int_vector--)
682 free_irq(adapter->msix_entries[int_vector].vector,
683 &(adapter->tx_ring[int_vector]));
684out:
685 kfree(adapter->msix_entries);
686 adapter->msix_entries = NULL;
687 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
688 return err;
689}
690
691/**
692 * ixgbe_intr - Interrupt Handler
693 * @irq: interrupt number
694 * @data: pointer to a network interface device structure
695 * @pt_regs: CPU registers structure
696 **/
697static irqreturn_t ixgbe_intr(int irq, void *data)
698{
699 struct net_device *netdev = data;
700 struct ixgbe_adapter *adapter = netdev_priv(netdev);
701 struct ixgbe_hw *hw = &adapter->hw;
702 u32 eicr;
703
704 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
705
706 if (!eicr)
707 return IRQ_NONE; /* Not our interrupt */
708
709 if (eicr & IXGBE_EICR_LSC) {
710 adapter->lsc_int++;
711 if (!test_bit(__IXGBE_DOWN, &adapter->state))
712 mod_timer(&adapter->watchdog_timer, jiffies);
713 }
714 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
715 /* Disable interrupts and register for poll. The flush of the
716 * posted write is intentionally left out. */
717 atomic_inc(&adapter->irq_sem);
718 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
719 __netif_rx_schedule(netdev, &adapter->napi);
720 }
721
722 return IRQ_HANDLED;
723}
724
725/**
726 * ixgbe_request_irq - initialize interrupts
727 * @adapter: board private structure
728 *
729 * Attempts to configure interrupts using the best available
730 * capabilities of the hardware and kernel.
731 **/
732static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
733{
734 struct net_device *netdev = adapter->netdev;
735 int flags, err;
736 irqreturn_t(*handler) (int, void *) = &ixgbe_intr;
737
738 flags = IRQF_SHARED;
739
740 err = ixgbe_setup_msix(adapter);
741 if (!err)
742 goto request_done;
743
744 /*
745 * if we can't do MSI-X, fall through and try MSI
746 * No need to reallocate memory since we're decreasing the number of
747 * queues. We just won't use the other ones, also it is freed correctly
748 * on ixgbe_remove.
749 */
750 *num_rx_queues = 1;
751
752 /* do MSI */
753 err = pci_enable_msi(adapter->pdev);
754 if (!err) {
755 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
756 flags &= ~IRQF_SHARED;
757 handler = &ixgbe_intr;
758 }
759
760 err = request_irq(adapter->pdev->irq, handler, flags,
761 netdev->name, netdev);
762 if (err)
763 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
764
765request_done:
766 return err;
767}
768
769static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
770{
771 struct net_device *netdev = adapter->netdev;
772
773 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
774 int i;
775
776 for (i = 0; i < adapter->num_tx_queues; i++)
777 free_irq(adapter->msix_entries[i].vector,
778 &(adapter->tx_ring[i]));
779 for (i = 0; i < adapter->num_rx_queues; i++)
780 free_irq(adapter->msix_entries[i +
781 adapter->num_tx_queues].vector,
782 &(adapter->rx_ring[i]));
783 i = adapter->num_rx_queues + adapter->num_tx_queues;
784 free_irq(adapter->msix_entries[i].vector, netdev);
785 pci_disable_msix(adapter->pdev);
786 kfree(adapter->msix_entries);
787 adapter->msix_entries = NULL;
788 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
789 return;
790 }
791
792 free_irq(adapter->pdev->irq, netdev);
793 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
794 pci_disable_msi(adapter->pdev);
795 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
796 }
797}
798
799/**
800 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
801 * @adapter: board private structure
802 **/
803static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
804{
805 atomic_inc(&adapter->irq_sem);
806 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
807 IXGBE_WRITE_FLUSH(&adapter->hw);
808 synchronize_irq(adapter->pdev->irq);
809}
810
811/**
812 * ixgbe_irq_enable - Enable default interrupt generation settings
813 * @adapter: board private structure
814 **/
815static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
816{
817 if (atomic_dec_and_test(&adapter->irq_sem)) {
818 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
819 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
820 (IXGBE_EIMS_ENABLE_MASK &
821 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
822 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
823 IXGBE_EIMS_ENABLE_MASK);
824 IXGBE_WRITE_FLUSH(&adapter->hw);
825 }
826}
827
828/**
829 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
830 *
831 **/
832static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
833{
834 int i;
835 struct ixgbe_hw *hw = &adapter->hw;
836
837 if (adapter->rx_eitr)
838 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
839 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
840
841 /* for re-triggering the interrupt in non-NAPI mode */
842 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
843 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
844
845 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
846 for (i = 0; i < adapter->num_tx_queues; i++)
847 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
848}
849
850/**
851 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
852 * @adapter: board private structure
853 *
854 * Configure the Tx unit of the MAC after a reset.
855 **/
856static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
857{
858 u64 tdba;
859 struct ixgbe_hw *hw = &adapter->hw;
860 u32 i, tdlen;
861
862 /* Setup the HW Tx Head and Tail descriptor pointers */
863 for (i = 0; i < adapter->num_tx_queues; i++) {
864 tdba = adapter->tx_ring[i].dma;
865 tdlen = adapter->tx_ring[i].count *
866 sizeof(union ixgbe_adv_tx_desc);
867 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
868 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
869 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
870 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
871 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
872 adapter->tx_ring[i].head = IXGBE_TDH(i);
873 adapter->tx_ring[i].tail = IXGBE_TDT(i);
874 }
875
876 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
877}
878
879#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
880 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
881
882#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
883/**
884 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
885 * @adapter: board private structure
886 *
887 * Configure the Rx unit of the MAC after a reset.
888 **/
889static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
890{
891 u64 rdba;
892 struct ixgbe_hw *hw = &adapter->hw;
893 struct net_device *netdev = adapter->netdev;
894 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
895 u32 rdlen, rxctrl, rxcsum;
896 u32 random[10];
897 u32 reta, mrqc;
898 int i;
899 u32 fctrl, hlreg0;
900 u32 srrctl;
901 u32 pages;
902
903 /* Decide whether to use packet split mode or not */
904 if (netdev->mtu > ETH_DATA_LEN)
905 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
906 else
907 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
908
909 /* Set the RX buffer length according to the mode */
910 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
911 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
912 } else {
913 if (netdev->mtu <= ETH_DATA_LEN)
914 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
915 else
916 adapter->rx_buf_len = ALIGN(max_frame, 1024);
917 }
918
919 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
920 fctrl |= IXGBE_FCTRL_BAM;
921 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
922
923 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
924 if (adapter->netdev->mtu <= ETH_DATA_LEN)
925 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
926 else
927 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
928 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
929
930 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
931
932 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
933 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
934 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
935
936 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
937 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
938 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
939 srrctl |= ((IXGBE_RX_HDR_SIZE <<
940 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
941 IXGBE_SRRCTL_BSIZEHDR_MASK);
942 } else {
943 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
944
945 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
946 srrctl |=
947 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
948 else
949 srrctl |=
950 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
951 }
952 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
953
954 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
955 /* disable receives while setting up the descriptors */
956 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
957 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
958
959 /* Setup the HW Rx Head and Tail Descriptor Pointers and
960 * the Base and Length of the Rx Descriptor Ring */
961 for (i = 0; i < adapter->num_rx_queues; i++) {
962 rdba = adapter->rx_ring[i].dma;
963 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
964 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
965 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
966 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
967 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
968 adapter->rx_ring[i].head = IXGBE_RDH(i);
969 adapter->rx_ring[i].tail = IXGBE_RDT(i);
970 }
971
972 if (adapter->num_rx_queues > 1) {
973 /* Random 40bytes used as random key in RSS hash function */
974 get_random_bytes(&random[0], 40);
975
976 switch (adapter->num_rx_queues) {
977 case 8:
978 case 4:
979 /* Bits [3:0] in each byte refers the Rx queue no */
980 reta = 0x00010203;
981 break;
982 case 2:
983 reta = 0x00010001;
984 break;
985 default:
986 reta = 0x00000000;
987 break;
988 }
989
990 /* Fill out redirection table */
991 for (i = 0; i < 32; i++) {
992 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
993 if (adapter->num_rx_queues > 4) {
994 i++;
995 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
996 0x04050607);
997 }
998 }
999
1000 /* Fill out hash function seeds */
1001 for (i = 0; i < 10; i++)
1002 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1003
1004 mrqc = IXGBE_MRQC_RSSEN
1005 /* Perform hash on these packet types */
1006 | IXGBE_MRQC_RSS_FIELD_IPV4
1007 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1008 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1009 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1010 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1011 | IXGBE_MRQC_RSS_FIELD_IPV6
1012 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1013 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1014 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1015 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1016
1017 /* Multiqueue and packet checksumming are mutually exclusive. */
1018 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1019 rxcsum |= IXGBE_RXCSUM_PCSD;
1020 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1021 } else {
1022 /* Enable Receive Checksum Offload for TCP and UDP */
1023 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1024 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1025 /* Enable IPv4 payload checksum for UDP fragments
1026 * Must be used in conjunction with packet-split. */
1027 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1028 } else {
1029 /* don't need to clear IPPCSE as it defaults to 0 */
1030 }
1031 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1032 }
1033 /* Enable Receives */
1034 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1035 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1036}
1037
1038static void ixgbe_vlan_rx_register(struct net_device *netdev,
1039 struct vlan_group *grp)
1040{
1041 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1042 u32 ctrl;
1043
1044 ixgbe_irq_disable(adapter);
1045 adapter->vlgrp = grp;
1046
1047 if (grp) {
1048 /* enable VLAN tag insert/strip */
1049 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1050 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1051 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1052 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1053 }
1054
1055 ixgbe_irq_enable(adapter);
1056}
1057
1058static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1059{
1060 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1061
1062 /* add VID to filter table */
1063 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1064}
1065
1066static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1067{
1068 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1069
1070 ixgbe_irq_disable(adapter);
1071 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1072 ixgbe_irq_enable(adapter);
1073
1074 /* remove VID from filter table */
1075 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1076}
1077
1078static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1079{
1080 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1081
1082 if (adapter->vlgrp) {
1083 u16 vid;
1084 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1085 if (!vlan_group_get_device(adapter->vlgrp, vid))
1086 continue;
1087 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1088 }
1089 }
1090}
1091
1092/**
1093 * ixgbe_set_multi - Multicast and Promiscuous mode set
1094 * @netdev: network interface device structure
1095 *
1096 * The set_multi entry point is called whenever the multicast address
1097 * list or the network interface flags are updated. This routine is
1098 * responsible for configuring the hardware for proper multicast,
1099 * promiscuous mode, and all-multi behavior.
1100 **/
1101static void ixgbe_set_multi(struct net_device *netdev)
1102{
1103 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1104 struct ixgbe_hw *hw = &adapter->hw;
1105 struct dev_mc_list *mc_ptr;
1106 u8 *mta_list;
1107 u32 fctrl;
1108 int i;
1109
1110 /* Check for Promiscuous and All Multicast modes */
1111
1112 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1113
1114 if (netdev->flags & IFF_PROMISC) {
1115 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1116 } else if (netdev->flags & IFF_ALLMULTI) {
1117 fctrl |= IXGBE_FCTRL_MPE;
1118 fctrl &= ~IXGBE_FCTRL_UPE;
1119 } else {
1120 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1121 }
1122
1123 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1124
1125 if (netdev->mc_count) {
1126 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1127 if (!mta_list)
1128 return;
1129
1130 /* Shared function expects packed array of only addresses. */
1131 mc_ptr = netdev->mc_list;
1132
1133 for (i = 0; i < netdev->mc_count; i++) {
1134 if (!mc_ptr)
1135 break;
1136 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1137 ETH_ALEN);
1138 mc_ptr = mc_ptr->next;
1139 }
1140
1141 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1142 kfree(mta_list);
1143 } else {
1144 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1145 }
1146
1147}
1148
1149static void ixgbe_configure(struct ixgbe_adapter *adapter)
1150{
1151 struct net_device *netdev = adapter->netdev;
1152 int i;
1153
1154 ixgbe_set_multi(netdev);
1155
1156 ixgbe_restore_vlan(adapter);
1157
1158 ixgbe_configure_tx(adapter);
1159 ixgbe_configure_rx(adapter);
1160 for (i = 0; i < adapter->num_rx_queues; i++)
1161 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1162 (adapter->rx_ring[i].count - 1));
1163}
1164
1165static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1166{
1167 struct net_device *netdev = adapter->netdev;
1168 int i;
1169 u32 gpie = 0;
1170 struct ixgbe_hw *hw = &adapter->hw;
1171 u32 txdctl, rxdctl, mhadd;
1172 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1173
1174 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1175 IXGBE_FLAG_MSI_ENABLED)) {
1176 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1177 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1178 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1179 } else {
1180 /* MSI only */
1181 gpie = (IXGBE_GPIE_EIAME |
1182 IXGBE_GPIE_PBA_SUPPORT);
1183 }
1184 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1185 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1186 }
1187
1188 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1189
1190 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1191 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1192 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1193
1194 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1195 }
1196
1197 for (i = 0; i < adapter->num_tx_queues; i++) {
1198 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1199 txdctl |= IXGBE_TXDCTL_ENABLE;
1200 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1201 }
1202
1203 for (i = 0; i < adapter->num_rx_queues; i++) {
1204 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1205 rxdctl |= IXGBE_RXDCTL_ENABLE;
1206 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1207 }
1208 /* enable all receives */
1209 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1210 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1211 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1212
1213 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1214 ixgbe_configure_msix(adapter);
1215 else
1216 ixgbe_configure_msi_and_legacy(adapter);
1217
1218 clear_bit(__IXGBE_DOWN, &adapter->state);
1219 napi_enable(&adapter->napi);
1220 ixgbe_irq_enable(adapter);
1221
1222 /* bring the link up in the watchdog, this could race with our first
1223 * link up interrupt but shouldn't be a problem */
1224 mod_timer(&adapter->watchdog_timer, jiffies);
1225 return 0;
1226}
1227
1228int ixgbe_up(struct ixgbe_adapter *adapter)
1229{
1230 /* hardware has been reset, we need to reload some things */
1231 ixgbe_configure(adapter);
1232
1233 return ixgbe_up_complete(adapter);
1234}
1235
1236void ixgbe_reset(struct ixgbe_adapter *adapter)
1237{
1238 if (ixgbe_init_hw(&adapter->hw))
1239 DPRINTK(PROBE, ERR, "Hardware Error\n");
1240
1241 /* reprogram the RAR[0] in case user changed it. */
1242 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1243
1244}
1245
1246#ifdef CONFIG_PM
1247static int ixgbe_resume(struct pci_dev *pdev)
1248{
1249 struct net_device *netdev = pci_get_drvdata(pdev);
1250 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1251 u32 err, num_rx_queues = adapter->num_rx_queues;
1252
1253 pci_set_power_state(pdev, PCI_D0);
1254 pci_restore_state(pdev);
1255 err = pci_enable_device(pdev);
1256 if (err) {
1257 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1258 "suspend\n");
1259 return err;
1260 }
1261 pci_set_master(pdev);
1262
1263 pci_enable_wake(pdev, PCI_D3hot, 0);
1264 pci_enable_wake(pdev, PCI_D3cold, 0);
1265
1266 if (netif_running(netdev)) {
1267 err = ixgbe_request_irq(adapter, &num_rx_queues);
1268 if (err)
1269 return err;
1270 }
1271
1272 ixgbe_reset(adapter);
1273
1274 if (netif_running(netdev))
1275 ixgbe_up(adapter);
1276
1277 netif_device_attach(netdev);
1278
1279 return 0;
1280}
1281#endif
1282
1283/**
1284 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1285 * @adapter: board private structure
1286 * @rx_ring: ring to free buffers from
1287 **/
1288static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1289 struct ixgbe_ring *rx_ring)
1290{
1291 struct pci_dev *pdev = adapter->pdev;
1292 unsigned long size;
1293 unsigned int i;
1294
1295 /* Free all the Rx ring sk_buffs */
1296
1297 for (i = 0; i < rx_ring->count; i++) {
1298 struct ixgbe_rx_buffer *rx_buffer_info;
1299
1300 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1301 if (rx_buffer_info->dma) {
1302 pci_unmap_single(pdev, rx_buffer_info->dma,
1303 adapter->rx_buf_len,
1304 PCI_DMA_FROMDEVICE);
1305 rx_buffer_info->dma = 0;
1306 }
1307 if (rx_buffer_info->skb) {
1308 dev_kfree_skb(rx_buffer_info->skb);
1309 rx_buffer_info->skb = NULL;
1310 }
1311 if (!rx_buffer_info->page)
1312 continue;
1313 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1314 PCI_DMA_FROMDEVICE);
1315 rx_buffer_info->page_dma = 0;
1316
1317 put_page(rx_buffer_info->page);
1318 rx_buffer_info->page = NULL;
1319 }
1320
1321 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1322 memset(rx_ring->rx_buffer_info, 0, size);
1323
1324 /* Zero out the descriptor ring */
1325 memset(rx_ring->desc, 0, rx_ring->size);
1326
1327 rx_ring->next_to_clean = 0;
1328 rx_ring->next_to_use = 0;
1329
1330 writel(0, adapter->hw.hw_addr + rx_ring->head);
1331 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1332}
1333
1334/**
1335 * ixgbe_clean_tx_ring - Free Tx Buffers
1336 * @adapter: board private structure
1337 * @tx_ring: ring to be cleaned
1338 **/
1339static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1340 struct ixgbe_ring *tx_ring)
1341{
1342 struct ixgbe_tx_buffer *tx_buffer_info;
1343 unsigned long size;
1344 unsigned int i;
1345
1346 /* Free all the Tx ring sk_buffs */
1347
1348 for (i = 0; i < tx_ring->count; i++) {
1349 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1350 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1351 }
1352
1353 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1354 memset(tx_ring->tx_buffer_info, 0, size);
1355
1356 /* Zero out the descriptor ring */
1357 memset(tx_ring->desc, 0, tx_ring->size);
1358
1359 tx_ring->next_to_use = 0;
1360 tx_ring->next_to_clean = 0;
1361
1362 writel(0, adapter->hw.hw_addr + tx_ring->head);
1363 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1364}
1365
1366/**
1367 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1368 * @adapter: board private structure
1369 **/
1370static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1371{
1372 int i;
1373
1374 for (i = 0; i < adapter->num_tx_queues; i++)
1375 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1376}
1377
1378/**
1379 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1380 * @adapter: board private structure
1381 **/
1382static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1383{
1384 int i;
1385
1386 for (i = 0; i < adapter->num_rx_queues; i++)
1387 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1388}
1389
1390void ixgbe_down(struct ixgbe_adapter *adapter)
1391{
1392 struct net_device *netdev = adapter->netdev;
1393 u32 rxctrl;
1394
1395 /* signal that we are down to the interrupt handler */
1396 set_bit(__IXGBE_DOWN, &adapter->state);
1397
1398 /* disable receives */
1399 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1400 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1401 rxctrl & ~IXGBE_RXCTRL_RXEN);
1402
1403 netif_tx_disable(netdev);
1404
1405 /* disable transmits in the hardware */
1406
1407 /* flush both disables */
1408 IXGBE_WRITE_FLUSH(&adapter->hw);
1409 msleep(10);
1410
1411 ixgbe_irq_disable(adapter);
1412
1413 napi_disable(&adapter->napi);
1414 del_timer_sync(&adapter->watchdog_timer);
1415
1416 netif_carrier_off(netdev);
1417 netif_stop_queue(netdev);
1418
1419 ixgbe_reset(adapter);
1420 ixgbe_clean_all_tx_rings(adapter);
1421 ixgbe_clean_all_rx_rings(adapter);
1422
1423}
1424
1425static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1426{
1427 struct net_device *netdev = pci_get_drvdata(pdev);
1428 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1429#ifdef CONFIG_PM
1430 int retval = 0;
1431#endif
1432
1433 netif_device_detach(netdev);
1434
1435 if (netif_running(netdev)) {
1436 ixgbe_down(adapter);
1437 ixgbe_free_irq(adapter);
1438 }
1439
1440#ifdef CONFIG_PM
1441 retval = pci_save_state(pdev);
1442 if (retval)
1443 return retval;
1444#endif
1445
1446 pci_enable_wake(pdev, PCI_D3hot, 0);
1447 pci_enable_wake(pdev, PCI_D3cold, 0);
1448
1449 pci_disable_device(pdev);
1450
1451 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1452
1453 return 0;
1454}
1455
1456static void ixgbe_shutdown(struct pci_dev *pdev)
1457{
1458 ixgbe_suspend(pdev, PMSG_SUSPEND);
1459}
1460
1461/**
1462 * ixgbe_clean - NAPI Rx polling callback
1463 * @adapter: board private structure
1464 **/
1465static int ixgbe_clean(struct napi_struct *napi, int budget)
1466{
1467 struct ixgbe_adapter *adapter = container_of(napi,
1468 struct ixgbe_adapter, napi);
1469 struct net_device *netdev = adapter->netdev;
1470 int tx_cleaned = 0, work_done = 0;
1471
1472 /* Keep link state information with original netdev */
1473 if (!netif_carrier_ok(adapter->netdev))
1474 goto quit_polling;
1475
1476 /* In non-MSIX case, there is no multi-Tx/Rx queue */
1477 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
1478 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1479 budget);
1480
1481 /* If no Tx and not enough Rx work done, exit the polling mode */
1482 if ((!tx_cleaned && (work_done < budget)) ||
1483 !netif_running(adapter->netdev)) {
1484quit_polling:
1485 netif_rx_complete(netdev, napi);
1486 ixgbe_irq_enable(adapter);
1487 }
1488
1489 return work_done;
1490}
1491
1492/**
1493 * ixgbe_tx_timeout - Respond to a Tx Hang
1494 * @netdev: network interface device structure
1495 **/
1496static void ixgbe_tx_timeout(struct net_device *netdev)
1497{
1498 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1499
1500 /* Do the reset outside of interrupt context */
1501 schedule_work(&adapter->reset_task);
1502}
1503
1504static void ixgbe_reset_task(struct work_struct *work)
1505{
1506 struct ixgbe_adapter *adapter;
1507 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1508
1509 adapter->tx_timeout_count++;
1510
1511 ixgbe_down(adapter);
1512 ixgbe_up(adapter);
1513}
1514
1515/**
1516 * ixgbe_alloc_queues - Allocate memory for all rings
1517 * @adapter: board private structure to initialize
1518 *
1519 * We allocate one ring per queue at run-time since we don't know the
1520 * number of queues at compile-time. The polling_netdev array is
1521 * intended for Multiqueue, but should work fine with a single queue.
1522 **/
1523static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1524{
1525 int i;
1526
1527 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1528 sizeof(struct ixgbe_ring), GFP_KERNEL);
1529 if (!adapter->tx_ring)
1530 return -ENOMEM;
1531
1532 for (i = 0; i < adapter->num_tx_queues; i++)
1533 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1534
1535 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1536 sizeof(struct ixgbe_ring), GFP_KERNEL);
1537 if (!adapter->rx_ring) {
1538 kfree(adapter->tx_ring);
1539 return -ENOMEM;
1540 }
1541
1542 for (i = 0; i < adapter->num_rx_queues; i++) {
1543 adapter->rx_ring[i].adapter = adapter;
1544 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1545 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1546 }
1547
1548 return 0;
1549}
1550
1551/**
1552 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1553 * @adapter: board private structure to initialize
1554 *
1555 * ixgbe_sw_init initializes the Adapter private data structure.
1556 * Fields are initialized based on PCI device information and
1557 * OS network device settings (MTU size).
1558 **/
1559static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1560{
1561 struct ixgbe_hw *hw = &adapter->hw;
1562 struct pci_dev *pdev = adapter->pdev;
1563
1564 /* default flow control settings */
1565 hw->fc.original_type = ixgbe_fc_full;
1566 hw->fc.type = ixgbe_fc_full;
1567
1568 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1569 if (hw->mac.ops.reset(hw)) {
1570 dev_err(&pdev->dev, "HW Init failed\n");
1571 return -EIO;
1572 }
1573 if (hw->phy.ops.setup_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1574 false)) {
1575 dev_err(&pdev->dev, "Link Speed setup failed\n");
1576 return -EIO;
1577 }
1578
1579 /* initialize eeprom parameters */
1580 if (ixgbe_init_eeprom(hw)) {
1581 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1582 return -EIO;
1583 }
1584
1585 /* Set the default values */
1586 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1587 adapter->num_tx_queues = 1;
1588 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1589
1590 if (ixgbe_alloc_queues(adapter)) {
1591 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1592 return -ENOMEM;
1593 }
1594
1595 atomic_set(&adapter->irq_sem, 1);
1596 set_bit(__IXGBE_DOWN, &adapter->state);
1597
1598 return 0;
1599}
1600
1601/**
1602 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1603 * @adapter: board private structure
1604 * @txdr: tx descriptor ring (for a specific queue) to setup
1605 *
1606 * Return 0 on success, negative on failure
1607 **/
1608int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1609 struct ixgbe_ring *txdr)
1610{
1611 struct pci_dev *pdev = adapter->pdev;
1612 int size;
1613
1614 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1615 txdr->tx_buffer_info = vmalloc(size);
1616 if (!txdr->tx_buffer_info) {
1617 DPRINTK(PROBE, ERR,
1618 "Unable to allocate memory for the transmit descriptor ring\n");
1619 return -ENOMEM;
1620 }
1621 memset(txdr->tx_buffer_info, 0, size);
1622
1623 /* round up to nearest 4K */
1624 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1625 txdr->size = ALIGN(txdr->size, 4096);
1626
1627 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1628 if (!txdr->desc) {
1629 vfree(txdr->tx_buffer_info);
1630 DPRINTK(PROBE, ERR,
1631 "Memory allocation failed for the tx desc ring\n");
1632 return -ENOMEM;
1633 }
1634
1635 txdr->adapter = adapter;
1636 txdr->next_to_use = 0;
1637 txdr->next_to_clean = 0;
1638 txdr->work_limit = txdr->count;
1639 spin_lock_init(&txdr->tx_lock);
1640
1641 return 0;
1642}
1643
1644/**
1645 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1646 * @adapter: board private structure
1647 * @rxdr: rx descriptor ring (for a specific queue) to setup
1648 *
1649 * Returns 0 on success, negative on failure
1650 **/
1651int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1652 struct ixgbe_ring *rxdr)
1653{
1654 struct pci_dev *pdev = adapter->pdev;
1655 int size, desc_len;
1656
1657 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1658 rxdr->rx_buffer_info = vmalloc(size);
1659 if (!rxdr->rx_buffer_info) {
1660 DPRINTK(PROBE, ERR,
1661 "vmalloc allocation failed for the rx desc ring\n");
1662 return -ENOMEM;
1663 }
1664 memset(rxdr->rx_buffer_info, 0, size);
1665
1666 desc_len = sizeof(union ixgbe_adv_rx_desc);
1667
1668 /* Round up to nearest 4K */
1669 rxdr->size = rxdr->count * desc_len;
1670 rxdr->size = ALIGN(rxdr->size, 4096);
1671
1672 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1673
1674 if (!rxdr->desc) {
1675 DPRINTK(PROBE, ERR,
1676 "Memory allocation failed for the rx desc ring\n");
1677 vfree(rxdr->rx_buffer_info);
1678 return -ENOMEM;
1679 }
1680
1681 rxdr->next_to_clean = 0;
1682 rxdr->next_to_use = 0;
1683 rxdr->adapter = adapter;
1684
1685 return 0;
1686}
1687
1688/**
1689 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1690 * @adapter: board private structure
1691 * @tx_ring: Tx descriptor ring for a specific queue
1692 *
1693 * Free all transmit software resources
1694 **/
1695static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1696 struct ixgbe_ring *tx_ring)
1697{
1698 struct pci_dev *pdev = adapter->pdev;
1699
1700 ixgbe_clean_tx_ring(adapter, tx_ring);
1701
1702 vfree(tx_ring->tx_buffer_info);
1703 tx_ring->tx_buffer_info = NULL;
1704
1705 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1706
1707 tx_ring->desc = NULL;
1708}
1709
1710/**
1711 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1712 * @adapter: board private structure
1713 *
1714 * Free all transmit software resources
1715 **/
1716static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1717{
1718 int i;
1719
1720 for (i = 0; i < adapter->num_tx_queues; i++)
1721 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1722}
1723
1724/**
1725 * ixgbe_free_rx_resources - Free Rx Resources
1726 * @adapter: board private structure
1727 * @rx_ring: ring to clean the resources from
1728 *
1729 * Free all receive software resources
1730 **/
1731static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1732 struct ixgbe_ring *rx_ring)
1733{
1734 struct pci_dev *pdev = adapter->pdev;
1735
1736 ixgbe_clean_rx_ring(adapter, rx_ring);
1737
1738 vfree(rx_ring->rx_buffer_info);
1739 rx_ring->rx_buffer_info = NULL;
1740
1741 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1742
1743 rx_ring->desc = NULL;
1744}
1745
1746/**
1747 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1748 * @adapter: board private structure
1749 *
1750 * Free all receive software resources
1751 **/
1752static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1753{
1754 int i;
1755
1756 for (i = 0; i < adapter->num_rx_queues; i++)
1757 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1758}
1759
1760/**
1761 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1762 * (Descriptors) for all queues
1763 * @adapter: board private structure
1764 *
1765 * If this function returns with an error, then it's possible one or
1766 * more of the rings is populated (while the rest are not). It is the
1767 * callers duty to clean those orphaned rings.
1768 *
1769 * Return 0 on success, negative on failure
1770 **/
1771static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1772{
1773 int i, err = 0;
1774
1775 for (i = 0; i < adapter->num_tx_queues; i++) {
1776 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1777 if (err) {
1778 DPRINTK(PROBE, ERR,
1779 "Allocation for Tx Queue %u failed\n", i);
1780 break;
1781 }
1782 }
1783
1784 return err;
1785}
1786
1787/**
1788 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1789 * (Descriptors) for all queues
1790 * @adapter: board private structure
1791 *
1792 * If this function returns with an error, then it's possible one or
1793 * more of the rings is populated (while the rest are not). It is the
1794 * callers duty to clean those orphaned rings.
1795 *
1796 * Return 0 on success, negative on failure
1797 **/
1798
1799static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1800{
1801 int i, err = 0;
1802
1803 for (i = 0; i < adapter->num_rx_queues; i++) {
1804 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1805 if (err) {
1806 DPRINTK(PROBE, ERR,
1807 "Allocation for Rx Queue %u failed\n", i);
1808 break;
1809 }
1810 }
1811
1812 return err;
1813}
1814
1815/**
1816 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1817 * @netdev: network interface device structure
1818 * @new_mtu: new value for maximum frame size
1819 *
1820 * Returns 0 on success, negative on failure
1821 **/
1822static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1823{
1824 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1825 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1826
1827 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1828 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1829 return -EINVAL;
1830
1831 netdev->mtu = new_mtu;
1832
1833 if (netif_running(netdev)) {
1834 ixgbe_down(adapter);
1835 ixgbe_up(adapter);
1836 }
1837
1838 return 0;
1839}
1840
1841/**
1842 * ixgbe_open - Called when a network interface is made active
1843 * @netdev: network interface device structure
1844 *
1845 * Returns 0 on success, negative value on failure
1846 *
1847 * The open entry point is called when a network interface is made
1848 * active by the system (IFF_UP). At this point all resources needed
1849 * for transmit and receive operations are allocated, the interrupt
1850 * handler is registered with the OS, the watchdog timer is started,
1851 * and the stack is notified that the interface is ready.
1852 **/
1853static int ixgbe_open(struct net_device *netdev)
1854{
1855 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1856 int err;
1857 u32 ctrl_ext;
1858 u32 num_rx_queues = adapter->num_rx_queues;
1859
1860 /* Let firmware know the driver has taken over */
1861 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1862 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1863 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
1864
1865try_intr_reinit:
1866 /* allocate transmit descriptors */
1867 err = ixgbe_setup_all_tx_resources(adapter);
1868 if (err)
1869 goto err_setup_tx;
1870
1871 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1872 num_rx_queues = 1;
1873 adapter->num_rx_queues = num_rx_queues;
1874 }
1875
1876 /* allocate receive descriptors */
1877 err = ixgbe_setup_all_rx_resources(adapter);
1878 if (err)
1879 goto err_setup_rx;
1880
1881 ixgbe_configure(adapter);
1882
1883 err = ixgbe_request_irq(adapter, &num_rx_queues);
1884 if (err)
1885 goto err_req_irq;
1886
1887 /* ixgbe_request might have reduced num_rx_queues */
1888 if (num_rx_queues < adapter->num_rx_queues) {
1889 /* We didn't get MSI-X, so we need to release everything,
1890 * set our Rx queue count to num_rx_queues, and redo the
1891 * whole init process.
1892 */
1893 ixgbe_free_irq(adapter);
1894 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1895 pci_disable_msi(adapter->pdev);
1896 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1897 }
1898 ixgbe_free_all_rx_resources(adapter);
1899 ixgbe_free_all_tx_resources(adapter);
1900 adapter->num_rx_queues = num_rx_queues;
1901
1902 /* Reset the hardware, and start over. */
1903 ixgbe_reset(adapter);
1904
1905 goto try_intr_reinit;
1906 }
1907
1908 err = ixgbe_up_complete(adapter);
1909 if (err)
1910 goto err_up;
1911
1912 return 0;
1913
1914err_up:
1915 ixgbe_free_irq(adapter);
1916err_req_irq:
1917 ixgbe_free_all_rx_resources(adapter);
1918err_setup_rx:
1919 ixgbe_free_all_tx_resources(adapter);
1920err_setup_tx:
1921 ixgbe_reset(adapter);
1922
1923 return err;
1924}
1925
1926/**
1927 * ixgbe_close - Disables a network interface
1928 * @netdev: network interface device structure
1929 *
1930 * Returns 0, this is not allowed to fail
1931 *
1932 * The close entry point is called when an interface is de-activated
1933 * by the OS. The hardware is still under the drivers control, but
1934 * needs to be disabled. A global MAC reset is issued to stop the
1935 * hardware, and all transmit and receive resources are freed.
1936 **/
1937static int ixgbe_close(struct net_device *netdev)
1938{
1939 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1940 u32 ctrl_ext;
1941
1942 ixgbe_down(adapter);
1943 ixgbe_free_irq(adapter);
1944
1945 ixgbe_free_all_tx_resources(adapter);
1946 ixgbe_free_all_rx_resources(adapter);
1947
1948 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1949 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1950 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
1951
1952 return 0;
1953}
1954
1955/**
1956 * ixgbe_update_stats - Update the board statistics counters.
1957 * @adapter: board private structure
1958 **/
1959void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1960{
1961 struct ixgbe_hw *hw = &adapter->hw;
1962 u64 good_rx, missed_rx, bprc;
1963
1964 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1965 good_rx = IXGBE_READ_REG(hw, IXGBE_GPRC);
1966 missed_rx = IXGBE_READ_REG(hw, IXGBE_MPC(0));
1967 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(1));
1968 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(2));
1969 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(3));
1970 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(4));
1971 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(5));
1972 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(6));
1973 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(7));
1974 adapter->stats.gprc += (good_rx - missed_rx);
1975
1976 adapter->stats.mpc[0] += missed_rx;
1977 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
1978 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1979 adapter->stats.bprc += bprc;
1980 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
1981 adapter->stats.mprc -= bprc;
1982 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
1983 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
1984 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
1985 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
1986 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
1987 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1988 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1989
1990 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
1991 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1992 adapter->stats.lxontxc += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1993 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1994 adapter->stats.lxofftxc += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1995 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1996 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
1997 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
1998 adapter->stats.rnbc[0] += IXGBE_READ_REG(hw, IXGBE_RNBC(0));
1999 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2000 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2001 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2002 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2003 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2004 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2005 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2006 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2007 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2008 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2009 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2010 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2011 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2012
2013 /* Fill out the OS statistics structure */
2014 adapter->net_stats.rx_packets = adapter->stats.gprc;
2015 adapter->net_stats.tx_packets = adapter->stats.gptc;
2016 adapter->net_stats.rx_bytes = adapter->stats.gorc;
2017 adapter->net_stats.tx_bytes = adapter->stats.gotc;
2018 adapter->net_stats.multicast = adapter->stats.mprc;
2019
2020 /* Rx Errors */
2021 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2022 adapter->stats.rlec;
2023 adapter->net_stats.rx_dropped = 0;
2024 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2025 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2026 adapter->net_stats.rx_missed_errors = adapter->stats.mpc[0];
2027
2028}
2029
2030/**
2031 * ixgbe_watchdog - Timer Call-back
2032 * @data: pointer to adapter cast into an unsigned long
2033 **/
2034static void ixgbe_watchdog(unsigned long data)
2035{
2036 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2037 struct net_device *netdev = adapter->netdev;
2038 bool link_up;
2039 u32 link_speed = 0;
2040
2041 adapter->hw.phy.ops.check(&adapter->hw, &(link_speed), &link_up);
2042
2043 if (link_up) {
2044 if (!netif_carrier_ok(netdev)) {
2045 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2046 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2047#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2048#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2049 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2050 "Flow Control: %s\n",
2051 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2052 "10 Gbps" :
2053 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2054 "1 Gpbs" : "unknown speed")),
2055 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2056 (FLOW_RX ? "RX" :
2057 (FLOW_TX ? "TX" : "None"))));
2058
2059 netif_carrier_on(netdev);
2060 netif_wake_queue(netdev);
2061 } else {
2062 /* Force detection of hung controller */
2063 adapter->detect_tx_hung = true;
2064 }
2065 } else {
2066 if (netif_carrier_ok(netdev)) {
2067 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2068 netif_carrier_off(netdev);
2069 netif_stop_queue(netdev);
2070 }
2071 }
2072
2073 ixgbe_update_stats(adapter);
2074
2075 /* Reset the timer */
2076 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2077 mod_timer(&adapter->watchdog_timer,
2078 round_jiffies(jiffies + 2 * HZ));
2079}
2080
2081#define IXGBE_MAX_TXD_PWR 14
2082#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
2083
2084/* Tx Descriptors needed, worst case */
2085#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
2086 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
2087#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
2088 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
2089
2090static int ixgbe_tso(struct ixgbe_adapter *adapter,
2091 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2092 u32 tx_flags, u8 *hdr_len)
2093{
2094 struct ixgbe_adv_tx_context_desc *context_desc;
2095 unsigned int i;
2096 int err;
2097 struct ixgbe_tx_buffer *tx_buffer_info;
2098 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2099 u32 mss_l4len_idx = 0, l4len;
2100 *hdr_len = 0;
2101
2102 if (skb_is_gso(skb)) {
2103 if (skb_header_cloned(skb)) {
2104 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2105 if (err)
2106 return err;
2107 }
2108 l4len = tcp_hdrlen(skb);
2109 *hdr_len += l4len;
2110
2111 if (skb->protocol == ntohs(ETH_P_IP)) {
2112 struct iphdr *iph = ip_hdr(skb);
2113 iph->tot_len = 0;
2114 iph->check = 0;
2115 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2116 iph->daddr, 0,
2117 IPPROTO_TCP,
2118 0);
2119 adapter->hw_tso_ctxt++;
2120 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2121 ipv6_hdr(skb)->payload_len = 0;
2122 tcp_hdr(skb)->check =
2123 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2124 &ipv6_hdr(skb)->daddr,
2125 0, IPPROTO_TCP, 0);
2126 adapter->hw_tso6_ctxt++;
2127 }
2128
2129 i = tx_ring->next_to_use;
2130
2131 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2132 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2133
2134 /* VLAN MACLEN IPLEN */
2135 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2136 vlan_macip_lens |=
2137 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2138 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2139 IXGBE_ADVTXD_MACLEN_SHIFT);
2140 *hdr_len += skb_network_offset(skb);
2141 vlan_macip_lens |=
2142 (skb_transport_header(skb) - skb_network_header(skb));
2143 *hdr_len +=
2144 (skb_transport_header(skb) - skb_network_header(skb));
2145 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2146 context_desc->seqnum_seed = 0;
2147
2148 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2149 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2150 IXGBE_ADVTXD_DTYP_CTXT);
2151
2152 if (skb->protocol == ntohs(ETH_P_IP))
2153 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2154 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2155 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2156
2157 /* MSS L4LEN IDX */
2158 mss_l4len_idx |=
2159 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2160 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2161 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2162
2163 tx_buffer_info->time_stamp = jiffies;
2164 tx_buffer_info->next_to_watch = i;
2165
2166 i++;
2167 if (i == tx_ring->count)
2168 i = 0;
2169 tx_ring->next_to_use = i;
2170
2171 return true;
2172 }
2173 return false;
2174}
2175
2176static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2177 struct ixgbe_ring *tx_ring,
2178 struct sk_buff *skb, u32 tx_flags)
2179{
2180 struct ixgbe_adv_tx_context_desc *context_desc;
2181 unsigned int i;
2182 struct ixgbe_tx_buffer *tx_buffer_info;
2183 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2184
2185 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2186 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2187 i = tx_ring->next_to_use;
2188 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2189 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2190
2191 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2192 vlan_macip_lens |=
2193 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2194 vlan_macip_lens |= (skb_network_offset(skb) <<
2195 IXGBE_ADVTXD_MACLEN_SHIFT);
2196 if (skb->ip_summed == CHECKSUM_PARTIAL)
2197 vlan_macip_lens |= (skb_transport_header(skb) -
2198 skb_network_header(skb));
2199
2200 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2201 context_desc->seqnum_seed = 0;
2202
2203 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2204 IXGBE_ADVTXD_DTYP_CTXT);
2205
2206 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2207 if (skb->protocol == ntohs(ETH_P_IP))
2208 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2209
2210 if (skb->sk->sk_protocol == IPPROTO_TCP)
2211 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2212 }
2213
2214 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2215 context_desc->mss_l4len_idx = 0;
2216
2217 tx_buffer_info->time_stamp = jiffies;
2218 tx_buffer_info->next_to_watch = i;
2219 adapter->hw_csum_tx_good++;
2220 i++;
2221 if (i == tx_ring->count)
2222 i = 0;
2223 tx_ring->next_to_use = i;
2224
2225 return true;
2226 }
2227 return false;
2228}
2229
2230static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2231 struct ixgbe_ring *tx_ring,
2232 struct sk_buff *skb, unsigned int first)
2233{
2234 struct ixgbe_tx_buffer *tx_buffer_info;
2235 unsigned int len = skb->len;
2236 unsigned int offset = 0, size, count = 0, i;
2237 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2238 unsigned int f;
2239
2240 len -= skb->data_len;
2241
2242 i = tx_ring->next_to_use;
2243
2244 while (len) {
2245 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2246 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2247
2248 tx_buffer_info->length = size;
2249 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2250 skb->data + offset,
2251 size, PCI_DMA_TODEVICE);
2252 tx_buffer_info->time_stamp = jiffies;
2253 tx_buffer_info->next_to_watch = i;
2254
2255 len -= size;
2256 offset += size;
2257 count++;
2258 i++;
2259 if (i == tx_ring->count)
2260 i = 0;
2261 }
2262
2263 for (f = 0; f < nr_frags; f++) {
2264 struct skb_frag_struct *frag;
2265
2266 frag = &skb_shinfo(skb)->frags[f];
2267 len = frag->size;
2268 offset = frag->page_offset;
2269
2270 while (len) {
2271 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2272 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2273
2274 tx_buffer_info->length = size;
2275 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2276 frag->page,
2277 offset,
2278 size, PCI_DMA_TODEVICE);
2279 tx_buffer_info->time_stamp = jiffies;
2280 tx_buffer_info->next_to_watch = i;
2281
2282 len -= size;
2283 offset += size;
2284 count++;
2285 i++;
2286 if (i == tx_ring->count)
2287 i = 0;
2288 }
2289 }
2290 if (i == 0)
2291 i = tx_ring->count - 1;
2292 else
2293 i = i - 1;
2294 tx_ring->tx_buffer_info[i].skb = skb;
2295 tx_ring->tx_buffer_info[first].next_to_watch = i;
2296
2297 return count;
2298}
2299
2300static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2301 struct ixgbe_ring *tx_ring,
2302 int tx_flags, int count, u32 paylen, u8 hdr_len)
2303{
2304 union ixgbe_adv_tx_desc *tx_desc = NULL;
2305 struct ixgbe_tx_buffer *tx_buffer_info;
2306 u32 olinfo_status = 0, cmd_type_len = 0;
2307 unsigned int i;
2308 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2309
2310 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2311
2312 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2313
2314 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2315 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2316
2317 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2318 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2319
2320 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2321 IXGBE_ADVTXD_POPTS_SHIFT;
2322
2323 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2324 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2325 IXGBE_ADVTXD_POPTS_SHIFT;
2326
2327 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2328 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2329 IXGBE_ADVTXD_POPTS_SHIFT;
2330
2331 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2332
2333 i = tx_ring->next_to_use;
2334 while (count--) {
2335 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2336 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2337 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2338 tx_desc->read.cmd_type_len =
2339 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2340 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2341
2342 i++;
2343 if (i == tx_ring->count)
2344 i = 0;
2345 }
2346
2347 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2348
2349 /*
2350 * Force memory writes to complete before letting h/w
2351 * know there are new descriptors to fetch. (Only
2352 * applicable for weak-ordered memory model archs,
2353 * such as IA-64).
2354 */
2355 wmb();
2356
2357 tx_ring->next_to_use = i;
2358 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2359}
2360
2361static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2362{
2363 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2364 struct ixgbe_ring *tx_ring;
2365 unsigned int len = skb->len;
2366 unsigned int first;
2367 unsigned int tx_flags = 0;
2368 unsigned long flags = 0;
2369 u8 hdr_len;
2370 int tso;
2371 unsigned int mss = 0;
2372 int count = 0;
2373 unsigned int f;
2374 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2375 len -= skb->data_len;
2376
2377 tx_ring = adapter->tx_ring;
2378
2379 if (skb->len <= 0) {
2380 dev_kfree_skb(skb);
2381 return NETDEV_TX_OK;
2382 }
2383 mss = skb_shinfo(skb)->gso_size;
2384
2385 if (mss)
2386 count++;
2387 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2388 count++;
2389
2390 count += TXD_USE_COUNT(len);
2391 for (f = 0; f < nr_frags; f++)
2392 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2393
2394 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2395 if (IXGBE_DESC_UNUSED(tx_ring) < (count + 2)) {
2396 adapter->tx_busy++;
2397 netif_stop_queue(netdev);
2398 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2399 return NETDEV_TX_BUSY;
2400 }
2401 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2402 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2403 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2404 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2405 }
2406
2407 if (skb->protocol == ntohs(ETH_P_IP))
2408 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2409 first = tx_ring->next_to_use;
2410 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2411 if (tso < 0) {
2412 dev_kfree_skb_any(skb);
2413 return NETDEV_TX_OK;
2414 }
2415
2416 if (tso)
2417 tx_flags |= IXGBE_TX_FLAGS_TSO;
2418 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2419 (skb->ip_summed == CHECKSUM_PARTIAL))
2420 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2421
2422 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2423 ixgbe_tx_map(adapter, tx_ring, skb, first),
2424 skb->len, hdr_len);
2425
2426 netdev->trans_start = jiffies;
2427
2428 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2429 /* Make sure there is space in the ring for the next send. */
2430 if (IXGBE_DESC_UNUSED(tx_ring) < DESC_NEEDED)
2431 netif_stop_queue(netdev);
2432 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2433
2434 return NETDEV_TX_OK;
2435}
2436
2437/**
2438 * ixgbe_get_stats - Get System Network Statistics
2439 * @netdev: network interface device structure
2440 *
2441 * Returns the address of the device statistics structure.
2442 * The statistics are actually updated from the timer callback.
2443 **/
2444static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2445{
2446 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2447
2448 /* only return the current stats */
2449 return &adapter->net_stats;
2450}
2451
2452/**
2453 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2454 * @netdev: network interface device structure
2455 * @p: pointer to an address structure
2456 *
2457 * Returns 0 on success, negative on failure
2458 **/
2459static int ixgbe_set_mac(struct net_device *netdev, void *p)
2460{
2461 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2462 struct sockaddr *addr = p;
2463
2464 if (!is_valid_ether_addr(addr->sa_data))
2465 return -EADDRNOTAVAIL;
2466
2467 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2468 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2469
2470 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2471
2472 return 0;
2473}
2474
2475#ifdef CONFIG_NET_POLL_CONTROLLER
2476/*
2477 * Polling 'interrupt' - used by things like netconsole to send skbs
2478 * without having to re-enable interrupts. It's not called while
2479 * the interrupt routine is executing.
2480 */
2481static void ixgbe_netpoll(struct net_device *netdev)
2482{
2483 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2484
2485 disable_irq(adapter->pdev->irq);
2486 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2487 ixgbe_intr(adapter->pdev->irq, netdev);
2488 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2489 enable_irq(adapter->pdev->irq);
2490}
2491#endif
2492
2493/**
2494 * ixgbe_probe - Device Initialization Routine
2495 * @pdev: PCI device information struct
2496 * @ent: entry in ixgbe_pci_tbl
2497 *
2498 * Returns 0 on success, negative on failure
2499 *
2500 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2501 * The OS initialization, configuring of the adapter private structure,
2502 * and a hardware reset occur.
2503 **/
2504static int __devinit ixgbe_probe(struct pci_dev *pdev,
2505 const struct pci_device_id *ent)
2506{
2507 struct net_device *netdev;
2508 struct ixgbe_adapter *adapter = NULL;
2509 struct ixgbe_hw *hw;
2510 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2511 unsigned long mmio_start, mmio_len;
2512 static int cards_found;
2513 int i, err, pci_using_dac;
2514 u16 link_status, link_speed, link_width;
2515 u32 part_num;
2516
2517 err = pci_enable_device(pdev);
2518 if (err)
2519 return err;
2520
2521 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2522 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2523 pci_using_dac = 1;
2524 } else {
2525 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2526 if (err) {
2527 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2528 if (err) {
2529 dev_err(&pdev->dev, "No usable DMA "
2530 "configuration, aborting\n");
2531 goto err_dma;
2532 }
2533 }
2534 pci_using_dac = 0;
2535 }
2536
2537 err = pci_request_regions(pdev, ixgbe_driver_name);
2538 if (err) {
2539 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2540 goto err_pci_reg;
2541 }
2542
2543 pci_set_master(pdev);
2544
2545 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2546 if (!netdev) {
2547 err = -ENOMEM;
2548 goto err_alloc_etherdev;
2549 }
2550
2551 SET_MODULE_OWNER(netdev);
2552 SET_NETDEV_DEV(netdev, &pdev->dev);
2553
2554 pci_set_drvdata(pdev, netdev);
2555 adapter = netdev_priv(netdev);
2556
2557 adapter->netdev = netdev;
2558 adapter->pdev = pdev;
2559 hw = &adapter->hw;
2560 hw->back = adapter;
2561 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2562
2563 mmio_start = pci_resource_start(pdev, 0);
2564 mmio_len = pci_resource_len(pdev, 0);
2565
2566 hw->hw_addr = ioremap(mmio_start, mmio_len);
2567 if (!hw->hw_addr) {
2568 err = -EIO;
2569 goto err_ioremap;
2570 }
2571
2572 for (i = 1; i <= 5; i++) {
2573 if (pci_resource_len(pdev, i) == 0)
2574 continue;
2575 }
2576
2577 netdev->open = &ixgbe_open;
2578 netdev->stop = &ixgbe_close;
2579 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2580 netdev->get_stats = &ixgbe_get_stats;
2581 netdev->set_multicast_list = &ixgbe_set_multi;
2582 netdev->set_mac_address = &ixgbe_set_mac;
2583 netdev->change_mtu = &ixgbe_change_mtu;
2584 ixgbe_set_ethtool_ops(netdev);
2585 netdev->tx_timeout = &ixgbe_tx_timeout;
2586 netdev->watchdog_timeo = 5 * HZ;
2587 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2588 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2589 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2590 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2591#ifdef CONFIG_NET_POLL_CONTROLLER
2592 netdev->poll_controller = ixgbe_netpoll;
2593#endif
2594 strcpy(netdev->name, pci_name(pdev));
2595
2596 netdev->mem_start = mmio_start;
2597 netdev->mem_end = mmio_start + mmio_len;
2598
2599 adapter->bd_number = cards_found;
2600
2601 /* PCI config space info */
2602 hw->vendor_id = pdev->vendor;
2603 hw->device_id = pdev->device;
2604 hw->revision_id = pdev->revision;
2605 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2606 hw->subsystem_device_id = pdev->subsystem_device;
2607
2608 /* Setup hw api */
2609 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2610 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
2611
2612 err = ii->get_invariants(hw);
2613 if (err)
2614 goto err_hw_init;
2615
2616 /* setup the private structure */
2617 err = ixgbe_sw_init(adapter);
2618 if (err)
2619 goto err_sw_init;
2620
2621 netdev->features = NETIF_F_SG |
2622 NETIF_F_HW_CSUM |
2623 NETIF_F_HW_VLAN_TX |
2624 NETIF_F_HW_VLAN_RX |
2625 NETIF_F_HW_VLAN_FILTER;
2626
2627 netdev->features |= NETIF_F_TSO;
2628
2629 netdev->features |= NETIF_F_TSO6;
2630 if (pci_using_dac)
2631 netdev->features |= NETIF_F_HIGHDMA;
2632
2633
2634 /* make sure the EEPROM is good */
2635 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2636 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2637 err = -EIO;
2638 goto err_eeprom;
2639 }
2640
2641 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2642 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2643
2644 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2645 err = -EIO;
2646 goto err_eeprom;
2647 }
2648
2649 init_timer(&adapter->watchdog_timer);
2650 adapter->watchdog_timer.function = &ixgbe_watchdog;
2651 adapter->watchdog_timer.data = (unsigned long)adapter;
2652
2653 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2654
2655 /* initialize default flow control settings */
2656 hw->fc.original_type = ixgbe_fc_full;
2657 hw->fc.type = ixgbe_fc_full;
2658 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2659 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2660 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2661
2662 /* Interrupt Throttle Rate */
2663 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2664 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2665
2666 /* print bus type/speed/width info */
2667 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2668 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2669 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2670 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2671 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2672 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2673 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2674 "Unknown"),
2675 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2676 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2677 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2678 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2679 "Unknown"),
2680 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2681 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2682 ixgbe_read_part_num(hw, &part_num);
2683 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2684 hw->mac.type, hw->phy.type,
2685 (part_num >> 8), (part_num & 0xff));
2686
2687 /* reset the hardware with the new settings */
2688 ixgbe_start_hw(hw);
2689
2690 netif_carrier_off(netdev);
2691 netif_stop_queue(netdev);
2692
2693 strcpy(netdev->name, "eth%d");
2694 err = register_netdev(netdev);
2695 if (err)
2696 goto err_register;
2697
2698
2699 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2700 cards_found++;
2701 return 0;
2702
2703err_register:
2704err_hw_init:
2705err_sw_init:
2706err_eeprom:
2707 iounmap(hw->hw_addr);
2708err_ioremap:
2709 free_netdev(netdev);
2710err_alloc_etherdev:
2711 pci_release_regions(pdev);
2712err_pci_reg:
2713err_dma:
2714 pci_disable_device(pdev);
2715 return err;
2716}
2717
2718/**
2719 * ixgbe_remove - Device Removal Routine
2720 * @pdev: PCI device information struct
2721 *
2722 * ixgbe_remove is called by the PCI subsystem to alert the driver
2723 * that it should release a PCI device. The could be caused by a
2724 * Hot-Plug event, or because the driver is going to be removed from
2725 * memory.
2726 **/
2727static void __devexit ixgbe_remove(struct pci_dev *pdev)
2728{
2729 struct net_device *netdev = pci_get_drvdata(pdev);
2730 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2731
2732 set_bit(__IXGBE_DOWN, &adapter->state);
2733 del_timer_sync(&adapter->watchdog_timer);
2734
2735 flush_scheduled_work();
2736
2737 unregister_netdev(netdev);
2738
2739 kfree(adapter->tx_ring);
2740 kfree(adapter->rx_ring);
2741
2742 iounmap(adapter->hw.hw_addr);
2743 pci_release_regions(pdev);
2744
2745 free_netdev(netdev);
2746
2747 pci_disable_device(pdev);
2748}
2749
2750/**
2751 * ixgbe_io_error_detected - called when PCI error is detected
2752 * @pdev: Pointer to PCI device
2753 * @state: The current pci connection state
2754 *
2755 * This function is called after a PCI bus error affecting
2756 * this device has been detected.
2757 */
2758static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2759 pci_channel_state_t state)
2760{
2761 struct net_device *netdev = pci_get_drvdata(pdev);
2762 struct ixgbe_adapter *adapter = netdev->priv;
2763
2764 netif_device_detach(netdev);
2765
2766 if (netif_running(netdev))
2767 ixgbe_down(adapter);
2768 pci_disable_device(pdev);
2769
2770 /* Request a slot slot reset. */
2771 return PCI_ERS_RESULT_NEED_RESET;
2772}
2773
2774/**
2775 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2776 * @pdev: Pointer to PCI device
2777 *
2778 * Restart the card from scratch, as if from a cold-boot.
2779 */
2780static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2781{
2782 struct net_device *netdev = pci_get_drvdata(pdev);
2783 struct ixgbe_adapter *adapter = netdev->priv;
2784
2785 if (pci_enable_device(pdev)) {
2786 DPRINTK(PROBE, ERR,
2787 "Cannot re-enable PCI device after reset.\n");
2788 return PCI_ERS_RESULT_DISCONNECT;
2789 }
2790 pci_set_master(pdev);
2791
2792 pci_enable_wake(pdev, PCI_D3hot, 0);
2793 pci_enable_wake(pdev, PCI_D3cold, 0);
2794
2795 ixgbe_reset(adapter);
2796
2797 return PCI_ERS_RESULT_RECOVERED;
2798}
2799
2800/**
2801 * ixgbe_io_resume - called when traffic can start flowing again.
2802 * @pdev: Pointer to PCI device
2803 *
2804 * This callback is called when the error recovery driver tells us that
2805 * its OK to resume normal operation.
2806 */
2807static void ixgbe_io_resume(struct pci_dev *pdev)
2808{
2809 struct net_device *netdev = pci_get_drvdata(pdev);
2810 struct ixgbe_adapter *adapter = netdev->priv;
2811
2812 if (netif_running(netdev)) {
2813 if (ixgbe_up(adapter)) {
2814 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2815 return;
2816 }
2817 }
2818
2819 netif_device_attach(netdev);
2820
2821}
2822
2823static struct pci_error_handlers ixgbe_err_handler = {
2824 .error_detected = ixgbe_io_error_detected,
2825 .slot_reset = ixgbe_io_slot_reset,
2826 .resume = ixgbe_io_resume,
2827};
2828
2829static struct pci_driver ixgbe_driver = {
2830 .name = ixgbe_driver_name,
2831 .id_table = ixgbe_pci_tbl,
2832 .probe = ixgbe_probe,
2833 .remove = __devexit_p(ixgbe_remove),
2834#ifdef CONFIG_PM
2835 .suspend = ixgbe_suspend,
2836 .resume = ixgbe_resume,
2837#endif
2838 .shutdown = ixgbe_shutdown,
2839 .err_handler = &ixgbe_err_handler
2840};
2841
2842/**
2843 * ixgbe_init_module - Driver Registration Routine
2844 *
2845 * ixgbe_init_module is the first routine called when the driver is
2846 * loaded. All it does is register with the PCI subsystem.
2847 **/
2848static int __init ixgbe_init_module(void)
2849{
2850 int ret;
2851 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2852 ixgbe_driver_string, ixgbe_driver_version);
2853
2854 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2855
2856 ret = pci_register_driver(&ixgbe_driver);
2857 return ret;
2858}
2859module_init(ixgbe_init_module);
2860
2861/**
2862 * ixgbe_exit_module - Driver Exit Cleanup Routine
2863 *
2864 * ixgbe_exit_module is called just before the driver is removed
2865 * from memory.
2866 **/
2867static void __exit ixgbe_exit_module(void)
2868{
2869 pci_unregister_driver(&ixgbe_driver);
2870}
2871module_exit(ixgbe_exit_module);
2872
2873/* ixgbe_main.c */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-12 17:17:35 -0500