ixgbe: Make queue pairs on single MSI-X interrupts

This patch pairs similar-numbered Rx and Tx queues onto a single
MSI-X vector.  For example, Tx queue 0 and Rx queue 0's interrupt
with be ethX-RxTx-0.  This allows for more efficient cleanup, since
fewer interrupts will be firing during device operation.  It also
helps with a cleaner CPU affinity for IRQ affinity.

Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 04892863ef02..884152d1085e 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3626,10 +3626,10 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
          * It's easy to be greedy for MSI-X vectors, but it really
          * doesn't do us much good if we have a lot more vectors
          * than CPU's.  So let's be conservative and only ask for
-         * (roughly) twice the number of vectors as there are CPU's.
+         * (roughly) the same number of vectors as there are CPU's.
          */
         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
-                       (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
+                       (int)num_online_cpus()) + NON_Q_VECTORS;
 
         /*
          * At the same time, hardware can only support a maximum of