aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ixgbe/ixgbe_main.c
diff options
context:
space:
mode:
authorPJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>2009-03-13 18:15:10 -0400
committerDavid S. Miller <davem@davemloft.net>2009-03-14 15:41:13 -0400
commit885125399e2c72b6466cfd2fbcb755be499b53a2 (patch)
tree4cd3c1f734c45cea3f16ac3e60655c9c4952d7b2 /drivers/net/ixgbe/ixgbe_main.c
parent9891ca7cdc42354ec48c0f76256fdcc9808ffc7e (diff)
ixgbe: Two small fixes for 82599 when bringing the device down and for WoL
The Tx DMA unit should be disabled when bringing the device down. Also, the KX4 device with 82599 supports WoL, so we should clear the Wake Up Status (WUS) after a PCIe slot reset. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Acked-by: Mallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 892195f2ad9b..3e981a1b0cd6 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -2558,6 +2558,11 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
2558 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), 2558 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2559 (txdctl & ~IXGBE_TXDCTL_ENABLE)); 2559 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2560 } 2560 }
2561 /* Disable the Tx DMA engine on 82599 */
2562 if (hw->mac.type == ixgbe_mac_82599EB)
2563 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
2564 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
2565 ~IXGBE_DMATXCTL_TE));
2561 2566
2562 netif_carrier_off(netdev); 2567 netif_carrier_off(netdev);
2563 2568
@@ -4794,7 +4799,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4794 pci_enable_wake(pdev, PCI_D3cold, 0); 4799 pci_enable_wake(pdev, PCI_D3cold, 0);
4795 4800
4796 ixgbe_reset(adapter); 4801 ixgbe_reset(adapter);
4797 4802 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4798 result = PCI_ERS_RESULT_RECOVERED; 4803 result = PCI_ERS_RESULT_RECOVERED;
4799 } 4804 }
4800 4805