diff options
author | Alexander Duyck <alexander.h.duyck@intel.com> | 2010-11-16 22:26:55 -0500 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2010-11-16 22:26:55 -0500 |
commit | 33cf09c9586a0dce472ecd2aac13e8140c9ed1a1 (patch) | |
tree | add9e26fdac5fc681b785f56c88cb4b609bc0d90 /drivers/net/ixgbe/ixgbe_main.c | |
parent | c60fbb00f0400792adf873dbacd431885653b77d (diff) |
ixgbe: move CPU variable from ring into q_vector, add ring->q_vector
This is the start of work to sort out what belongs in the rings and what
belongs in the q_vector. Items like the CPU variable for make much more
sense in the q_vector since the CPU is a per-interrupt thing rather than a
per ring thing.
I also added a back-pointer from the ring to the q_vector.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 174 |
1 files changed, 107 insertions, 67 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 75e25bc91a99..dc78736d3052 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -810,63 +810,98 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, | |||
810 | 810 | ||
811 | #ifdef CONFIG_IXGBE_DCA | 811 | #ifdef CONFIG_IXGBE_DCA |
812 | static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, | 812 | static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, |
813 | struct ixgbe_ring *rx_ring) | 813 | struct ixgbe_ring *rx_ring, |
814 | int cpu) | ||
814 | { | 815 | { |
816 | struct ixgbe_hw *hw = &adapter->hw; | ||
815 | u32 rxctrl; | 817 | u32 rxctrl; |
816 | int cpu = get_cpu(); | 818 | u8 reg_idx = rx_ring->reg_idx; |
817 | int q = rx_ring->reg_idx; | ||
818 | 819 | ||
819 | if (rx_ring->cpu != cpu) { | 820 | rxctrl = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(reg_idx)); |
820 | rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q)); | 821 | switch (hw->mac.type) { |
821 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | 822 | case ixgbe_mac_82598EB: |
822 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK; | 823 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK; |
823 | rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | 824 | rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); |
824 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 825 | break; |
825 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599; | 826 | case ixgbe_mac_82599EB: |
826 | rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | 827 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599; |
827 | IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599); | 828 | rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << |
828 | } | 829 | IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599); |
829 | rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN; | 830 | break; |
830 | rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN; | 831 | default: |
831 | rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN); | 832 | break; |
832 | rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN | | ||
833 | IXGBE_DCA_RXCTRL_DESC_HSRO_EN); | ||
834 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl); | ||
835 | rx_ring->cpu = cpu; | ||
836 | } | 833 | } |
837 | put_cpu(); | 834 | rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN; |
835 | rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN; | ||
836 | rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN); | ||
837 | rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN | | ||
838 | IXGBE_DCA_RXCTRL_DESC_HSRO_EN); | ||
839 | IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl); | ||
838 | } | 840 | } |
839 | 841 | ||
840 | static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, | 842 | static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, |
841 | struct ixgbe_ring *tx_ring) | 843 | struct ixgbe_ring *tx_ring, |
844 | int cpu) | ||
842 | { | 845 | { |
846 | struct ixgbe_hw *hw = &adapter->hw; | ||
843 | u32 txctrl; | 847 | u32 txctrl; |
848 | u8 reg_idx = tx_ring->reg_idx; | ||
849 | |||
850 | switch (hw->mac.type) { | ||
851 | case ixgbe_mac_82598EB: | ||
852 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(reg_idx)); | ||
853 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; | ||
854 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | ||
855 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
856 | txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; | ||
857 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(reg_idx), txctrl); | ||
858 | break; | ||
859 | case ixgbe_mac_82599EB: | ||
860 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx)); | ||
861 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; | ||
862 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | ||
863 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); | ||
864 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
865 | txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; | ||
866 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx), txctrl); | ||
867 | break; | ||
868 | default: | ||
869 | break; | ||
870 | } | ||
871 | } | ||
872 | |||
873 | static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector) | ||
874 | { | ||
875 | struct ixgbe_adapter *adapter = q_vector->adapter; | ||
844 | int cpu = get_cpu(); | 876 | int cpu = get_cpu(); |
845 | int q = tx_ring->reg_idx; | 877 | long r_idx; |
846 | struct ixgbe_hw *hw = &adapter->hw; | 878 | int i; |
847 | 879 | ||
848 | if (tx_ring->cpu != cpu) { | 880 | if (q_vector->cpu == cpu) |
849 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | 881 | goto out_no_update; |
850 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q)); | 882 | |
851 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; | 883 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); |
852 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | 884 | for (i = 0; i < q_vector->txr_count; i++) { |
853 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | 885 | ixgbe_update_tx_dca(adapter, adapter->tx_ring[r_idx], cpu); |
854 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl); | 886 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, |
855 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 887 | r_idx + 1); |
856 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q)); | ||
857 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; | ||
858 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | ||
859 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); | ||
860 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
861 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl); | ||
862 | } | ||
863 | tx_ring->cpu = cpu; | ||
864 | } | 888 | } |
889 | |||
890 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | ||
891 | for (i = 0; i < q_vector->rxr_count; i++) { | ||
892 | ixgbe_update_rx_dca(adapter, adapter->rx_ring[r_idx], cpu); | ||
893 | r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, | ||
894 | r_idx + 1); | ||
895 | } | ||
896 | |||
897 | q_vector->cpu = cpu; | ||
898 | out_no_update: | ||
865 | put_cpu(); | 899 | put_cpu(); |
866 | } | 900 | } |
867 | 901 | ||
868 | static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) | 902 | static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) |
869 | { | 903 | { |
904 | int num_q_vectors; | ||
870 | int i; | 905 | int i; |
871 | 906 | ||
872 | if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED)) | 907 | if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED)) |
@@ -875,13 +910,14 @@ static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) | |||
875 | /* always use CB2 mode, difference is masked in the CB driver */ | 910 | /* always use CB2 mode, difference is masked in the CB driver */ |
876 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2); | 911 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2); |
877 | 912 | ||
878 | for (i = 0; i < adapter->num_tx_queues; i++) { | 913 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) |
879 | adapter->tx_ring[i]->cpu = -1; | 914 | num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
880 | ixgbe_update_tx_dca(adapter, adapter->tx_ring[i]); | 915 | else |
881 | } | 916 | num_q_vectors = 1; |
882 | for (i = 0; i < adapter->num_rx_queues; i++) { | 917 | |
883 | adapter->rx_ring[i]->cpu = -1; | 918 | for (i = 0; i < num_q_vectors; i++) { |
884 | ixgbe_update_rx_dca(adapter, adapter->rx_ring[i]); | 919 | adapter->q_vector[i]->cpu = -1; |
920 | ixgbe_update_dca(adapter->q_vector[i]); | ||
885 | } | 921 | } |
886 | } | 922 | } |
887 | 923 | ||
@@ -890,6 +926,9 @@ static int __ixgbe_notify_dca(struct device *dev, void *data) | |||
890 | struct ixgbe_adapter *adapter = dev_get_drvdata(dev); | 926 | struct ixgbe_adapter *adapter = dev_get_drvdata(dev); |
891 | unsigned long event = *(unsigned long *)data; | 927 | unsigned long event = *(unsigned long *)data; |
892 | 928 | ||
929 | if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED)) | ||
930 | return 0; | ||
931 | |||
893 | switch (event) { | 932 | switch (event) { |
894 | case DCA_PROVIDER_ADD: | 933 | case DCA_PROVIDER_ADD: |
895 | /* if we're already enabled, don't do it again */ | 934 | /* if we're already enabled, don't do it again */ |
@@ -1827,8 +1866,13 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data) | |||
1827 | int r_idx; | 1866 | int r_idx; |
1828 | int i; | 1867 | int i; |
1829 | 1868 | ||
1869 | #ifdef CONFIG_IXGBE_DCA | ||
1870 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | ||
1871 | ixgbe_update_dca(q_vector); | ||
1872 | #endif | ||
1873 | |||
1830 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | 1874 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); |
1831 | for (i = 0; i < q_vector->rxr_count; i++) { | 1875 | for (i = 0; i < q_vector->rxr_count; i++) { |
1832 | rx_ring = adapter->rx_ring[r_idx]; | 1876 | rx_ring = adapter->rx_ring[r_idx]; |
1833 | rx_ring->total_bytes = 0; | 1877 | rx_ring->total_bytes = 0; |
1834 | rx_ring->total_packets = 0; | 1878 | rx_ring->total_packets = 0; |
@@ -1839,7 +1883,6 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data) | |||
1839 | if (!q_vector->rxr_count) | 1883 | if (!q_vector->rxr_count) |
1840 | return IRQ_HANDLED; | 1884 | return IRQ_HANDLED; |
1841 | 1885 | ||
1842 | /* disable interrupts on this vector only */ | ||
1843 | /* EIAM disabled interrupts (on this vector) for us */ | 1886 | /* EIAM disabled interrupts (on this vector) for us */ |
1844 | napi_schedule(&q_vector->napi); | 1887 | napi_schedule(&q_vector->napi); |
1845 | 1888 | ||
@@ -1898,13 +1941,14 @@ static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget) | |||
1898 | int work_done = 0; | 1941 | int work_done = 0; |
1899 | long r_idx; | 1942 | long r_idx; |
1900 | 1943 | ||
1901 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | ||
1902 | rx_ring = adapter->rx_ring[r_idx]; | ||
1903 | #ifdef CONFIG_IXGBE_DCA | 1944 | #ifdef CONFIG_IXGBE_DCA |
1904 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | 1945 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) |
1905 | ixgbe_update_rx_dca(adapter, rx_ring); | 1946 | ixgbe_update_dca(q_vector); |
1906 | #endif | 1947 | #endif |
1907 | 1948 | ||
1949 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | ||
1950 | rx_ring = adapter->rx_ring[r_idx]; | ||
1951 | |||
1908 | ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget); | 1952 | ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget); |
1909 | 1953 | ||
1910 | /* If all Rx work done, exit the polling mode */ | 1954 | /* If all Rx work done, exit the polling mode */ |
@@ -1938,13 +1982,14 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget) | |||
1938 | long r_idx; | 1982 | long r_idx; |
1939 | bool tx_clean_complete = true; | 1983 | bool tx_clean_complete = true; |
1940 | 1984 | ||
1985 | #ifdef CONFIG_IXGBE_DCA | ||
1986 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | ||
1987 | ixgbe_update_dca(q_vector); | ||
1988 | #endif | ||
1989 | |||
1941 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | 1990 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); |
1942 | for (i = 0; i < q_vector->txr_count; i++) { | 1991 | for (i = 0; i < q_vector->txr_count; i++) { |
1943 | ring = adapter->tx_ring[r_idx]; | 1992 | ring = adapter->tx_ring[r_idx]; |
1944 | #ifdef CONFIG_IXGBE_DCA | ||
1945 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | ||
1946 | ixgbe_update_tx_dca(adapter, ring); | ||
1947 | #endif | ||
1948 | tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring); | 1993 | tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring); |
1949 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, | 1994 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, |
1950 | r_idx + 1); | 1995 | r_idx + 1); |
@@ -1957,10 +2002,6 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget) | |||
1957 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | 2002 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); |
1958 | for (i = 0; i < q_vector->rxr_count; i++) { | 2003 | for (i = 0; i < q_vector->rxr_count; i++) { |
1959 | ring = adapter->rx_ring[r_idx]; | 2004 | ring = adapter->rx_ring[r_idx]; |
1960 | #ifdef CONFIG_IXGBE_DCA | ||
1961 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | ||
1962 | ixgbe_update_rx_dca(adapter, ring); | ||
1963 | #endif | ||
1964 | ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget); | 2005 | ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget); |
1965 | r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, | 2006 | r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, |
1966 | r_idx + 1); | 2007 | r_idx + 1); |
@@ -1999,13 +2040,14 @@ static int ixgbe_clean_txonly(struct napi_struct *napi, int budget) | |||
1999 | int work_done = 0; | 2040 | int work_done = 0; |
2000 | long r_idx; | 2041 | long r_idx; |
2001 | 2042 | ||
2002 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | ||
2003 | tx_ring = adapter->tx_ring[r_idx]; | ||
2004 | #ifdef CONFIG_IXGBE_DCA | 2043 | #ifdef CONFIG_IXGBE_DCA |
2005 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | 2044 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) |
2006 | ixgbe_update_tx_dca(adapter, tx_ring); | 2045 | ixgbe_update_dca(q_vector); |
2007 | #endif | 2046 | #endif |
2008 | 2047 | ||
2048 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | ||
2049 | tx_ring = adapter->tx_ring[r_idx]; | ||
2050 | |||
2009 | if (!ixgbe_clean_tx_irq(q_vector, tx_ring)) | 2051 | if (!ixgbe_clean_tx_irq(q_vector, tx_ring)) |
2010 | work_done = budget; | 2052 | work_done = budget; |
2011 | 2053 | ||
@@ -3880,10 +3922,8 @@ static int ixgbe_poll(struct napi_struct *napi, int budget) | |||
3880 | int tx_clean_complete, work_done = 0; | 3922 | int tx_clean_complete, work_done = 0; |
3881 | 3923 | ||
3882 | #ifdef CONFIG_IXGBE_DCA | 3924 | #ifdef CONFIG_IXGBE_DCA |
3883 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { | 3925 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) |
3884 | ixgbe_update_tx_dca(adapter, adapter->tx_ring[0]); | 3926 | ixgbe_update_dca(q_vector); |
3885 | ixgbe_update_rx_dca(adapter, adapter->rx_ring[0]); | ||
3886 | } | ||
3887 | #endif | 3927 | #endif |
3888 | 3928 | ||
3889 | tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]); | 3929 | tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]); |