diff options
author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2008-08-26 07:27:27 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-09-03 10:03:34 -0400 |
commit | cc41ac7c0011703460dd4d4674bb7cbf73bb883d (patch) | |
tree | 9277eac7f33a3d44907b5321cbc1ba13835e12b7 /drivers/net/ixgbe/ixgbe_main.c | |
parent | e9990a9cd76a14905a8bf2348444ff775b24a92f (diff) |
ixgbe: fix dca hints going to wrong processor
hardware was configured incorrectly which led all hints to be
sent to queue[0]'s DCA configuration.
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 90 |
1 files changed, 65 insertions, 25 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 6b96c41687df..28d3321b0dd2 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -1410,10 +1410,51 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) | |||
1410 | } | 1410 | } |
1411 | } | 1411 | } |
1412 | 1412 | ||
1413 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ | 1413 | #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 |
1414 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | 1414 | |
1415 | static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) | ||
1416 | { | ||
1417 | struct ixgbe_ring *rx_ring; | ||
1418 | u32 srrctl; | ||
1419 | int queue0; | ||
1420 | unsigned long *mask, maskval = 1; | ||
1421 | long shift, len; | ||
1422 | |||
1423 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { | ||
1424 | mask = (unsigned long *) &adapter->ring_feature[RING_F_RSS].mask; | ||
1425 | len = sizeof(adapter->ring_feature[RING_F_RSS].mask) * 8; | ||
1426 | } else { | ||
1427 | mask = &maskval; | ||
1428 | len = 1; | ||
1429 | } | ||
1430 | shift = find_first_bit(mask, len); | ||
1431 | queue0 = index << shift; | ||
1432 | rx_ring = &adapter->rx_ring[queue0]; | ||
1433 | |||
1434 | srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index)); | ||
1435 | |||
1436 | srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; | ||
1437 | srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; | ||
1438 | |||
1439 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | ||
1440 | srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1441 | srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; | ||
1442 | srrctl |= ((IXGBE_RX_HDR_SIZE << | ||
1443 | IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & | ||
1444 | IXGBE_SRRCTL_BSIZEHDR_MASK); | ||
1445 | } else { | ||
1446 | srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; | ||
1447 | |||
1448 | if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) | ||
1449 | srrctl |= IXGBE_RXBUFFER_2048 >> | ||
1450 | IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1451 | else | ||
1452 | srrctl |= rx_ring->rx_buf_len >> | ||
1453 | IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1454 | } | ||
1455 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl); | ||
1456 | } | ||
1415 | 1457 | ||
1416 | #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 | ||
1417 | /** | 1458 | /** |
1418 | * ixgbe_get_skb_hdr - helper function for LRO header processing | 1459 | * ixgbe_get_skb_hdr - helper function for LRO header processing |
1419 | * @skb: pointer to sk_buff to be added to LRO packet | 1460 | * @skb: pointer to sk_buff to be added to LRO packet |
@@ -1441,6 +1482,9 @@ static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph, | |||
1441 | return 0; | 1482 | return 0; |
1442 | } | 1483 | } |
1443 | 1484 | ||
1485 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ | ||
1486 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | ||
1487 | |||
1444 | /** | 1488 | /** |
1445 | * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset | 1489 | * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset |
1446 | * @adapter: board private structure | 1490 | * @adapter: board private structure |
@@ -1460,7 +1504,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1460 | 0x6A3E67EA, 0x14364D17, 0x3BED200D}; | 1504 | 0x6A3E67EA, 0x14364D17, 0x3BED200D}; |
1461 | u32 fctrl, hlreg0; | 1505 | u32 fctrl, hlreg0; |
1462 | u32 pages; | 1506 | u32 pages; |
1463 | u32 reta = 0, mrqc, srrctl; | 1507 | u32 reta = 0, mrqc; |
1508 | u32 rdrxctl; | ||
1464 | int rx_buf_len; | 1509 | int rx_buf_len; |
1465 | 1510 | ||
1466 | /* Decide whether to use packet split mode or not */ | 1511 | /* Decide whether to use packet split mode or not */ |
@@ -1493,27 +1538,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1493 | 1538 | ||
1494 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); | 1539 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1495 | 1540 | ||
1496 | srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0)); | ||
1497 | srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; | ||
1498 | srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; | ||
1499 | |||
1500 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | ||
1501 | srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1502 | srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; | ||
1503 | srrctl |= ((IXGBE_RX_HDR_SIZE << | ||
1504 | IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & | ||
1505 | IXGBE_SRRCTL_BSIZEHDR_MASK); | ||
1506 | } else { | ||
1507 | srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; | ||
1508 | |||
1509 | if (rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) | ||
1510 | srrctl |= | ||
1511 | IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1512 | else | ||
1513 | srrctl |= rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | ||
1514 | } | ||
1515 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl); | ||
1516 | |||
1517 | rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); | 1541 | rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); |
1518 | /* disable receives while setting up the descriptors */ | 1542 | /* disable receives while setting up the descriptors */ |
1519 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | 1543 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); |
@@ -1542,8 +1566,24 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
1542 | adapter->rx_ring[i].lro_mgr.dev = adapter->netdev; | 1566 | adapter->rx_ring[i].lro_mgr.dev = adapter->netdev; |
1543 | adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; | 1567 | adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; |
1544 | adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; | 1568 | adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; |
1569 | |||
1570 | ixgbe_configure_srrctl(adapter, j); | ||
1545 | } | 1571 | } |
1546 | 1572 | ||
1573 | /* | ||
1574 | * For VMDq support of different descriptor types or | ||
1575 | * buffer sizes through the use of multiple SRRCTL | ||
1576 | * registers, RDRXCTL.MVMEN must be set to 1 | ||
1577 | * | ||
1578 | * also, the manual doesn't mention it clearly but DCA hints | ||
1579 | * will only use queue 0's tags unless this bit is set. Side | ||
1580 | * effects of setting this bit are only that SRRCTL must be | ||
1581 | * fully programmed [0..15] | ||
1582 | */ | ||
1583 | rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); | ||
1584 | rdrxctl |= IXGBE_RDRXCTL_MVMEN; | ||
1585 | IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); | ||
1586 | |||
1547 | 1587 | ||
1548 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { | 1588 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { |
1549 | /* Fill out redirection table */ | 1589 | /* Fill out redirection table */ |