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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-14 20:31:54 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-14 20:31:54 -0400
commit6dc6472581f693b5fc95aebedf67b4960fb85cf0 (patch)
tree06a5a9a08519950575505273eabced331ed51405 /drivers/net/ixgbe/ixgbe_main.c
parentee673eaa72d8d185012b1027a05e25aba18c267f (diff)
parent8acd3a60bcca17c6d89c73cee3ad6057eb83ba1e (diff)
Merge commit 'origin'
Manual fixup of conflicts on: arch/powerpc/include/asm/dcr-regs.h drivers/net/ibm_newemac/core.h
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c1938
1 files changed, 1107 insertions, 831 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index a417be7f8be5..ca17af4349d0 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation. 4 Copyright(c) 1999 - 2008 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -20,7 +20,6 @@
20 the file called "COPYING". 20 the file called "COPYING".
21 21
22 Contact Information: 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 25
@@ -46,15 +45,14 @@
46 45
47char ixgbe_driver_name[] = "ixgbe"; 46char ixgbe_driver_name[] = "ixgbe";
48static const char ixgbe_driver_string[] = 47static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver"; 48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 49
51#define DRV_VERSION "1.3.18-k4" 50#define DRV_VERSION "1.3.30-k2"
52const char ixgbe_driver_version[] = DRV_VERSION; 51const char ixgbe_driver_version[] = DRV_VERSION;
53static const char ixgbe_copyright[] = 52static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
54 "Copyright (c) 1999-2007 Intel Corporation.";
55 53
56static const struct ixgbe_info *ixgbe_info_tbl[] = { 54static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info, 55 [board_82598] = &ixgbe_82598_info,
58}; 56};
59 57
60/* ixgbe_pci_tbl - PCI Device ID Table 58/* ixgbe_pci_tbl - PCI Device ID Table
@@ -74,15 +72,17 @@ static struct pci_device_id ixgbe_pci_tbl[] = {
74 board_82598 }, 72 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
76 board_82598 }, 74 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
76 board_82598 },
77 77
78 /* required last entry */ 78 /* required last entry */
79 {0, } 79 {0, }
80}; 80};
81MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); 81MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82 82
83#ifdef CONFIG_DCA 83#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
84static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, 84static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
85 void *p); 85 void *p);
86static struct notifier_block dca_notifier = { 86static struct notifier_block dca_notifier = {
87 .notifier_call = ixgbe_notify_dca, 87 .notifier_call = ixgbe_notify_dca,
88 .next = NULL, 88 .next = NULL,
@@ -104,7 +104,7 @@ static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
104 /* Let firmware take over control of h/w */ 104 /* Let firmware take over control of h/w */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD); 107 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
108} 108}
109 109
110static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter) 110static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
@@ -114,24 +114,11 @@ static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
114 /* Let firmware know the driver has taken over */ 114 /* Let firmware know the driver has taken over */
115 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 115 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, 116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
117 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD); 117 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
118}
119
120#ifdef DEBUG
121/**
122 * ixgbe_get_hw_dev_name - return device name string
123 * used by hardware layer to print debugging information
124 **/
125char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
126{
127 struct ixgbe_adapter *adapter = hw->back;
128 struct net_device *netdev = adapter->netdev;
129 return netdev->name;
130} 118}
131#endif
132 119
133static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry, 120static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
134 u8 msix_vector) 121 u8 msix_vector)
135{ 122{
136 u32 ivar, index; 123 u32 ivar, index;
137 124
@@ -144,13 +131,12 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
144} 131}
145 132
146static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter, 133static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
147 struct ixgbe_tx_buffer 134 struct ixgbe_tx_buffer
148 *tx_buffer_info) 135 *tx_buffer_info)
149{ 136{
150 if (tx_buffer_info->dma) { 137 if (tx_buffer_info->dma) {
151 pci_unmap_page(adapter->pdev, 138 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
152 tx_buffer_info->dma, 139 tx_buffer_info->length, PCI_DMA_TODEVICE);
153 tx_buffer_info->length, PCI_DMA_TODEVICE);
154 tx_buffer_info->dma = 0; 140 tx_buffer_info->dma = 0;
155 } 141 }
156 if (tx_buffer_info->skb) { 142 if (tx_buffer_info->skb) {
@@ -161,107 +147,120 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
161} 147}
162 148
163static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, 149static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
164 struct ixgbe_ring *tx_ring, 150 struct ixgbe_ring *tx_ring,
165 unsigned int eop, 151 unsigned int eop)
166 union ixgbe_adv_tx_desc *eop_desc)
167{ 152{
153 struct ixgbe_hw *hw = &adapter->hw;
154 u32 head, tail;
155
168 /* Detect a transmit hang in hardware, this serializes the 156 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of i */ 157 * check with the clearing of time_stamp and movement of eop */
158 head = IXGBE_READ_REG(hw, tx_ring->head);
159 tail = IXGBE_READ_REG(hw, tx_ring->tail);
170 adapter->detect_tx_hung = false; 160 adapter->detect_tx_hung = false;
171 if (tx_ring->tx_buffer_info[eop].dma && 161 if ((head != tail) &&
162 tx_ring->tx_buffer_info[eop].time_stamp &&
172 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && 163 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
173 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { 164 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
174 /* detected Tx unit hang */ 165 /* detected Tx unit hang */
166 union ixgbe_adv_tx_desc *tx_desc;
167 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
175 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" 168 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
176 " TDH <%x>\n" 169 " Tx Queue <%d>\n"
177 " TDT <%x>\n" 170 " TDH, TDT <%x>, <%x>\n"
178 " next_to_use <%x>\n" 171 " next_to_use <%x>\n"
179 " next_to_clean <%x>\n" 172 " next_to_clean <%x>\n"
180 "tx_buffer_info[next_to_clean]\n" 173 "tx_buffer_info[next_to_clean]\n"
181 " time_stamp <%lx>\n" 174 " time_stamp <%lx>\n"
182 " next_to_watch <%x>\n" 175 " jiffies <%lx>\n",
183 " jiffies <%lx>\n" 176 tx_ring->queue_index,
184 " next_to_watch.status <%x>\n", 177 head, tail,
185 readl(adapter->hw.hw_addr + tx_ring->head), 178 tx_ring->next_to_use, eop,
186 readl(adapter->hw.hw_addr + tx_ring->tail), 179 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
187 tx_ring->next_to_use,
188 tx_ring->next_to_clean,
189 tx_ring->tx_buffer_info[eop].time_stamp,
190 eop, jiffies, eop_desc->wb.status);
191 return true; 180 return true;
192 } 181 }
193 182
194 return false; 183 return false;
195} 184}
196 185
197#define IXGBE_MAX_TXD_PWR 14 186#define IXGBE_MAX_TXD_PWR 14
198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) 187#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
199 188
200/* Tx Descriptors needed, worst case */ 189/* Tx Descriptors needed, worst case */
201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \ 190#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) 191 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \ 192#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */ 193 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
194
195#define GET_TX_HEAD_FROM_RING(ring) (\
196 *(volatile u32 *) \
197 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
198static void ixgbe_tx_timeout(struct net_device *netdev);
205 199
206/** 200/**
207 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes 201 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
208 * @adapter: board private structure 202 * @adapter: board private structure
203 * @tx_ring: tx ring to clean
209 **/ 204 **/
210static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter, 205static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
211 struct ixgbe_ring *tx_ring) 206 struct ixgbe_ring *tx_ring)
212{ 207{
213 struct net_device *netdev = adapter->netdev; 208 union ixgbe_adv_tx_desc *tx_desc;
214 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
215 struct ixgbe_tx_buffer *tx_buffer_info; 209 struct ixgbe_tx_buffer *tx_buffer_info;
216 unsigned int i, eop; 210 struct net_device *netdev = adapter->netdev;
217 bool cleaned = false; 211 struct sk_buff *skb;
218 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 212 unsigned int i;
213 u32 head, oldhead;
214 unsigned int count = 0;
215 unsigned int total_bytes = 0, total_packets = 0;
219 216
217 rmb();
218 head = GET_TX_HEAD_FROM_RING(tx_ring);
219 head = le32_to_cpu(head);
220 i = tx_ring->next_to_clean; 220 i = tx_ring->next_to_clean;
221 eop = tx_ring->tx_buffer_info[i].next_to_watch; 221 while (1) {
222 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 222 while (i != head) {
223 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
224 cleaned = false;
225 while (!cleaned) {
226 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 223 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
227 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 224 tx_buffer_info = &tx_ring->tx_buffer_info[i];
228 cleaned = (i == eop); 225 skb = tx_buffer_info->skb;
229 226
230 tx_ring->stats.bytes += tx_buffer_info->length; 227 if (skb) {
231 if (cleaned) {
232 struct sk_buff *skb = tx_buffer_info->skb;
233 unsigned int segs, bytecount; 228 unsigned int segs, bytecount;
229
230 /* gso_segs is currently only valid for tcp */
234 segs = skb_shinfo(skb)->gso_segs ?: 1; 231 segs = skb_shinfo(skb)->gso_segs ?: 1;
235 /* multiply data chunks by size of headers */ 232 /* multiply data chunks by size of headers */
236 bytecount = ((segs - 1) * skb_headlen(skb)) + 233 bytecount = ((segs - 1) * skb_headlen(skb)) +
237 skb->len; 234 skb->len;
238 total_tx_packets += segs; 235 total_packets += segs;
239 total_tx_bytes += bytecount; 236 total_bytes += bytecount;
240 } 237 }
238
241 ixgbe_unmap_and_free_tx_resource(adapter, 239 ixgbe_unmap_and_free_tx_resource(adapter,
242 tx_buffer_info); 240 tx_buffer_info);
243 tx_desc->wb.status = 0;
244 241
245 i++; 242 i++;
246 if (i == tx_ring->count) 243 if (i == tx_ring->count)
247 i = 0; 244 i = 0;
248 }
249
250 tx_ring->stats.packets++;
251
252 eop = tx_ring->tx_buffer_info[i].next_to_watch;
253 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
254
255 /* weight of a sort for tx, avoid endless transmit cleanup */
256 if (total_tx_packets >= tx_ring->work_limit)
257 break;
258 }
259 245
246 count++;
247 if (count == tx_ring->count)
248 goto done_cleaning;
249 }
250 oldhead = head;
251 rmb();
252 head = GET_TX_HEAD_FROM_RING(tx_ring);
253 head = le32_to_cpu(head);
254 if (head == oldhead)
255 goto done_cleaning;
256 } /* while (1) */
257
258done_cleaning:
260 tx_ring->next_to_clean = i; 259 tx_ring->next_to_clean = i;
261 260
262#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 261#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
263 if (total_tx_packets && netif_carrier_ok(netdev) && 262 if (unlikely(count && netif_carrier_ok(netdev) &&
264 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { 263 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
265 /* Make sure that anybody stopping the queue after this 264 /* Make sure that anybody stopping the queue after this
266 * sees the new next_to_clean. 265 * sees the new next_to_clean.
267 */ 266 */
@@ -269,59 +268,68 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
269 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && 268 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
270 !test_bit(__IXGBE_DOWN, &adapter->state)) { 269 !test_bit(__IXGBE_DOWN, &adapter->state)) {
271 netif_wake_subqueue(netdev, tx_ring->queue_index); 270 netif_wake_subqueue(netdev, tx_ring->queue_index);
272 adapter->restart_queue++; 271 ++adapter->restart_queue;
273 } 272 }
274 } 273 }
275 274
276 if (adapter->detect_tx_hung) 275 if (adapter->detect_tx_hung) {
277 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc)) 276 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
278 netif_stop_subqueue(netdev, tx_ring->queue_index); 277 /* schedule immediate reset if we believe we hung */
279 278 DPRINTK(PROBE, INFO,
280 if (total_tx_packets >= tx_ring->work_limit) 279 "tx hang %d detected, resetting adapter\n",
281 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value); 280 adapter->tx_timeout_count + 1);
281 ixgbe_tx_timeout(adapter->netdev);
282 }
283 }
282 284
283 tx_ring->total_bytes += total_tx_bytes; 285 /* re-arm the interrupt */
284 tx_ring->total_packets += total_tx_packets; 286 if ((total_packets >= tx_ring->work_limit) ||
285 adapter->net_stats.tx_bytes += total_tx_bytes; 287 (count == tx_ring->count))
286 adapter->net_stats.tx_packets += total_tx_packets; 288 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
287 cleaned = total_tx_packets ? true : false; 289
288 return cleaned; 290 tx_ring->total_bytes += total_bytes;
291 tx_ring->total_packets += total_packets;
292 tx_ring->stats.bytes += total_bytes;
293 tx_ring->stats.packets += total_packets;
294 adapter->net_stats.tx_bytes += total_bytes;
295 adapter->net_stats.tx_packets += total_packets;
296 return (total_packets ? true : false);
289} 297}
290 298
291#ifdef CONFIG_DCA 299#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
292static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, 300static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
293 struct ixgbe_ring *rxr) 301 struct ixgbe_ring *rx_ring)
294{ 302{
295 u32 rxctrl; 303 u32 rxctrl;
296 int cpu = get_cpu(); 304 int cpu = get_cpu();
297 int q = rxr - adapter->rx_ring; 305 int q = rx_ring - adapter->rx_ring;
298 306
299 if (rxr->cpu != cpu) { 307 if (rx_ring->cpu != cpu) {
300 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q)); 308 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
301 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK; 309 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
302 rxctrl |= dca_get_tag(cpu); 310 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
303 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN; 311 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
304 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN; 312 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
305 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl); 313 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
306 rxr->cpu = cpu; 314 rx_ring->cpu = cpu;
307 } 315 }
308 put_cpu(); 316 put_cpu();
309} 317}
310 318
311static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, 319static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
312 struct ixgbe_ring *txr) 320 struct ixgbe_ring *tx_ring)
313{ 321{
314 u32 txctrl; 322 u32 txctrl;
315 int cpu = get_cpu(); 323 int cpu = get_cpu();
316 int q = txr - adapter->tx_ring; 324 int q = tx_ring - adapter->tx_ring;
317 325
318 if (txr->cpu != cpu) { 326 if (tx_ring->cpu != cpu) {
319 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q)); 327 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
320 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; 328 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
321 txctrl |= dca_get_tag(cpu); 329 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
322 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; 330 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
323 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl); 331 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
324 txr->cpu = cpu; 332 tx_ring->cpu = cpu;
325 } 333 }
326 put_cpu(); 334 put_cpu();
327} 335}
@@ -351,11 +359,14 @@ static int __ixgbe_notify_dca(struct device *dev, void *data)
351 359
352 switch (event) { 360 switch (event) {
353 case DCA_PROVIDER_ADD: 361 case DCA_PROVIDER_ADD:
354 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 362 /* if we're already enabled, don't do it again */
363 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
364 break;
355 /* Always use CB2 mode, difference is masked 365 /* Always use CB2 mode, difference is masked
356 * in the CB driver. */ 366 * in the CB driver. */
357 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2); 367 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
358 if (dca_add_requester(dev) == 0) { 368 if (dca_add_requester(dev) == 0) {
369 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
359 ixgbe_setup_dca(adapter); 370 ixgbe_setup_dca(adapter);
360 break; 371 break;
361 } 372 }
@@ -372,7 +383,7 @@ static int __ixgbe_notify_dca(struct device *dev, void *data)
372 return 0; 383 return 0;
373} 384}
374 385
375#endif /* CONFIG_DCA */ 386#endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
376/** 387/**
377 * ixgbe_receive_skb - Send a completed packet up the stack 388 * ixgbe_receive_skb - Send a completed packet up the stack
378 * @adapter: board private structure 389 * @adapter: board private structure
@@ -382,8 +393,8 @@ static int __ixgbe_notify_dca(struct device *dev, void *data)
382 * @rx_desc: rx descriptor 393 * @rx_desc: rx descriptor
383 **/ 394 **/
384static void ixgbe_receive_skb(struct ixgbe_adapter *adapter, 395static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
385 struct sk_buff *skb, u8 status, 396 struct sk_buff *skb, u8 status,
386 struct ixgbe_ring *ring, 397 struct ixgbe_ring *ring,
387 union ixgbe_adv_rx_desc *rx_desc) 398 union ixgbe_adv_rx_desc *rx_desc)
388{ 399{
389 bool is_vlan = (status & IXGBE_RXD_STAT_VP); 400 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
@@ -420,14 +431,12 @@ static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
420 * @skb: skb currently being received and modified 431 * @skb: skb currently being received and modified
421 **/ 432 **/
422static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter, 433static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
423 u32 status_err, 434 u32 status_err, struct sk_buff *skb)
424 struct sk_buff *skb)
425{ 435{
426 skb->ip_summed = CHECKSUM_NONE; 436 skb->ip_summed = CHECKSUM_NONE;
427 437
428 /* Ignore Checksum bit is set, or rx csum disabled */ 438 /* Rx csum disabled */
429 if ((status_err & IXGBE_RXD_STAT_IXSM) || 439 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
430 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
431 return; 440 return;
432 441
433 /* if IP and error */ 442 /* if IP and error */
@@ -455,37 +464,44 @@ static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
455 * @adapter: address of board private structure 464 * @adapter: address of board private structure
456 **/ 465 **/
457static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter, 466static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
458 struct ixgbe_ring *rx_ring, 467 struct ixgbe_ring *rx_ring,
459 int cleaned_count) 468 int cleaned_count)
460{ 469{
461 struct net_device *netdev = adapter->netdev;
462 struct pci_dev *pdev = adapter->pdev; 470 struct pci_dev *pdev = adapter->pdev;
463 union ixgbe_adv_rx_desc *rx_desc; 471 union ixgbe_adv_rx_desc *rx_desc;
464 struct ixgbe_rx_buffer *rx_buffer_info; 472 struct ixgbe_rx_buffer *bi;
465 struct sk_buff *skb;
466 unsigned int i; 473 unsigned int i;
467 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN; 474 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
468 475
469 i = rx_ring->next_to_use; 476 i = rx_ring->next_to_use;
470 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 477 bi = &rx_ring->rx_buffer_info[i];
471 478
472 while (cleaned_count--) { 479 while (cleaned_count--) {
473 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 480 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
474 481
475 if (!rx_buffer_info->page && 482 if (!bi->page_dma &&
476 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) { 483 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
477 rx_buffer_info->page = alloc_page(GFP_ATOMIC); 484 if (!bi->page) {
478 if (!rx_buffer_info->page) { 485 bi->page = alloc_page(GFP_ATOMIC);
479 adapter->alloc_rx_page_failed++; 486 if (!bi->page) {
480 goto no_buffers; 487 adapter->alloc_rx_page_failed++;
488 goto no_buffers;
489 }
490 bi->page_offset = 0;
491 } else {
492 /* use a half page if we're re-using */
493 bi->page_offset ^= (PAGE_SIZE / 2);
481 } 494 }
482 rx_buffer_info->page_dma = 495
483 pci_map_page(pdev, rx_buffer_info->page, 496 bi->page_dma = pci_map_page(pdev, bi->page,
484 0, PAGE_SIZE, PCI_DMA_FROMDEVICE); 497 bi->page_offset,
498 (PAGE_SIZE / 2),
499 PCI_DMA_FROMDEVICE);
485 } 500 }
486 501
487 if (!rx_buffer_info->skb) { 502 if (!bi->skb) {
488 skb = netdev_alloc_skb(netdev, bufsz); 503 struct sk_buff *skb = netdev_alloc_skb(adapter->netdev,
504 bufsz);
489 505
490 if (!skb) { 506 if (!skb) {
491 adapter->alloc_rx_buff_failed++; 507 adapter->alloc_rx_buff_failed++;
@@ -499,28 +515,25 @@ static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
499 */ 515 */
500 skb_reserve(skb, NET_IP_ALIGN); 516 skb_reserve(skb, NET_IP_ALIGN);
501 517
502 rx_buffer_info->skb = skb; 518 bi->skb = skb;
503 rx_buffer_info->dma = pci_map_single(pdev, skb->data, 519 bi->dma = pci_map_single(pdev, skb->data, bufsz,
504 bufsz, 520 PCI_DMA_FROMDEVICE);
505 PCI_DMA_FROMDEVICE);
506 } 521 }
507 /* Refresh the desc even if buffer_addrs didn't change because 522 /* Refresh the desc even if buffer_addrs didn't change because
508 * each write-back erases this info. */ 523 * each write-back erases this info. */
509 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 524 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
510 rx_desc->read.pkt_addr = 525 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
511 cpu_to_le64(rx_buffer_info->page_dma); 526 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
512 rx_desc->read.hdr_addr =
513 cpu_to_le64(rx_buffer_info->dma);
514 } else { 527 } else {
515 rx_desc->read.pkt_addr = 528 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
516 cpu_to_le64(rx_buffer_info->dma);
517 } 529 }
518 530
519 i++; 531 i++;
520 if (i == rx_ring->count) 532 if (i == rx_ring->count)
521 i = 0; 533 i = 0;
522 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 534 bi = &rx_ring->rx_buffer_info[i];
523 } 535 }
536
524no_buffers: 537no_buffers:
525 if (rx_ring->next_to_use != i) { 538 if (rx_ring->next_to_use != i) {
526 rx_ring->next_to_use = i; 539 rx_ring->next_to_use = i;
@@ -538,46 +551,54 @@ no_buffers:
538 } 551 }
539} 552}
540 553
554static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
555{
556 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
557}
558
559static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
560{
561 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
562}
563
541static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter, 564static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
542 struct ixgbe_ring *rx_ring, 565 struct ixgbe_ring *rx_ring,
543 int *work_done, int work_to_do) 566 int *work_done, int work_to_do)
544{ 567{
545 struct net_device *netdev = adapter->netdev;
546 struct pci_dev *pdev = adapter->pdev; 568 struct pci_dev *pdev = adapter->pdev;
547 union ixgbe_adv_rx_desc *rx_desc, *next_rxd; 569 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
548 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer; 570 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
549 struct sk_buff *skb; 571 struct sk_buff *skb;
550 unsigned int i; 572 unsigned int i;
551 u32 upper_len, len, staterr; 573 u32 len, staterr;
552 u16 hdr_info; 574 u16 hdr_info;
553 bool cleaned = false; 575 bool cleaned = false;
554 int cleaned_count = 0; 576 int cleaned_count = 0;
555 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 577 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
556 578
557 i = rx_ring->next_to_clean; 579 i = rx_ring->next_to_clean;
558 upper_len = 0;
559 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 580 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
560 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 581 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
561 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 582 rx_buffer_info = &rx_ring->rx_buffer_info[i];
562 583
563 while (staterr & IXGBE_RXD_STAT_DD) { 584 while (staterr & IXGBE_RXD_STAT_DD) {
585 u32 upper_len = 0;
564 if (*work_done >= work_to_do) 586 if (*work_done >= work_to_do)
565 break; 587 break;
566 (*work_done)++; 588 (*work_done)++;
567 589
568 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 590 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
569 hdr_info = 591 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
570 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info); 592 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
571 len = 593 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
572 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
573 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
574 if (hdr_info & IXGBE_RXDADV_SPH) 594 if (hdr_info & IXGBE_RXDADV_SPH)
575 adapter->rx_hdr_split++; 595 adapter->rx_hdr_split++;
576 if (len > IXGBE_RX_HDR_SIZE) 596 if (len > IXGBE_RX_HDR_SIZE)
577 len = IXGBE_RX_HDR_SIZE; 597 len = IXGBE_RX_HDR_SIZE;
578 upper_len = le16_to_cpu(rx_desc->wb.upper.length); 598 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
579 } else 599 } else {
580 len = le16_to_cpu(rx_desc->wb.upper.length); 600 len = le16_to_cpu(rx_desc->wb.upper.length);
601 }
581 602
582 cleaned = true; 603 cleaned = true;
583 skb = rx_buffer_info->skb; 604 skb = rx_buffer_info->skb;
@@ -586,18 +607,25 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
586 607
587 if (len && !skb_shinfo(skb)->nr_frags) { 608 if (len && !skb_shinfo(skb)->nr_frags) {
588 pci_unmap_single(pdev, rx_buffer_info->dma, 609 pci_unmap_single(pdev, rx_buffer_info->dma,
589 adapter->rx_buf_len + NET_IP_ALIGN, 610 rx_ring->rx_buf_len + NET_IP_ALIGN,
590 PCI_DMA_FROMDEVICE); 611 PCI_DMA_FROMDEVICE);
591 skb_put(skb, len); 612 skb_put(skb, len);
592 } 613 }
593 614
594 if (upper_len) { 615 if (upper_len) {
595 pci_unmap_page(pdev, rx_buffer_info->page_dma, 616 pci_unmap_page(pdev, rx_buffer_info->page_dma,
596 PAGE_SIZE, PCI_DMA_FROMDEVICE); 617 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
597 rx_buffer_info->page_dma = 0; 618 rx_buffer_info->page_dma = 0;
598 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, 619 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
599 rx_buffer_info->page, 0, upper_len); 620 rx_buffer_info->page,
600 rx_buffer_info->page = NULL; 621 rx_buffer_info->page_offset,
622 upper_len);
623
624 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
625 (page_count(rx_buffer_info->page) != 1))
626 rx_buffer_info->page = NULL;
627 else
628 get_page(rx_buffer_info->page);
601 629
602 skb->len += upper_len; 630 skb->len += upper_len;
603 skb->data_len += upper_len; 631 skb->data_len += upper_len;
@@ -620,6 +648,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
620 rx_buffer_info->skb = next_buffer->skb; 648 rx_buffer_info->skb = next_buffer->skb;
621 rx_buffer_info->dma = next_buffer->dma; 649 rx_buffer_info->dma = next_buffer->dma;
622 next_buffer->skb = skb; 650 next_buffer->skb = skb;
651 next_buffer->dma = 0;
623 adapter->non_eop_descs++; 652 adapter->non_eop_descs++;
624 goto next_desc; 653 goto next_desc;
625 } 654 }
@@ -635,9 +664,9 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
635 total_rx_bytes += skb->len; 664 total_rx_bytes += skb->len;
636 total_rx_packets++; 665 total_rx_packets++;
637 666
638 skb->protocol = eth_type_trans(skb, netdev); 667 skb->protocol = eth_type_trans(skb, adapter->netdev);
639 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc); 668 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
640 netdev->last_rx = jiffies; 669 adapter->netdev->last_rx = jiffies;
641 670
642next_desc: 671next_desc:
643 rx_desc->wb.upper.status_error = 0; 672 rx_desc->wb.upper.status_error = 0;
@@ -666,9 +695,6 @@ next_desc:
666 if (cleaned_count) 695 if (cleaned_count)
667 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count); 696 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
668 697
669 adapter->net_stats.rx_bytes += total_rx_bytes;
670 adapter->net_stats.rx_packets += total_rx_packets;
671
672 rx_ring->total_packets += total_rx_packets; 698 rx_ring->total_packets += total_rx_packets;
673 rx_ring->total_bytes += total_rx_bytes; 699 rx_ring->total_bytes += total_rx_bytes;
674 adapter->net_stats.rx_bytes += total_rx_bytes; 700 adapter->net_stats.rx_bytes += total_rx_bytes;
@@ -700,43 +726,43 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
700 q_vector = &adapter->q_vector[v_idx]; 726 q_vector = &adapter->q_vector[v_idx];
701 /* XXX for_each_bit(...) */ 727 /* XXX for_each_bit(...) */
702 r_idx = find_first_bit(q_vector->rxr_idx, 728 r_idx = find_first_bit(q_vector->rxr_idx,
703 adapter->num_rx_queues); 729 adapter->num_rx_queues);
704 730
705 for (i = 0; i < q_vector->rxr_count; i++) { 731 for (i = 0; i < q_vector->rxr_count; i++) {
706 j = adapter->rx_ring[r_idx].reg_idx; 732 j = adapter->rx_ring[r_idx].reg_idx;
707 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx); 733 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
708 r_idx = find_next_bit(q_vector->rxr_idx, 734 r_idx = find_next_bit(q_vector->rxr_idx,
709 adapter->num_rx_queues, 735 adapter->num_rx_queues,
710 r_idx + 1); 736 r_idx + 1);
711 } 737 }
712 r_idx = find_first_bit(q_vector->txr_idx, 738 r_idx = find_first_bit(q_vector->txr_idx,
713 adapter->num_tx_queues); 739 adapter->num_tx_queues);
714 740
715 for (i = 0; i < q_vector->txr_count; i++) { 741 for (i = 0; i < q_vector->txr_count; i++) {
716 j = adapter->tx_ring[r_idx].reg_idx; 742 j = adapter->tx_ring[r_idx].reg_idx;
717 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx); 743 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
718 r_idx = find_next_bit(q_vector->txr_idx, 744 r_idx = find_next_bit(q_vector->txr_idx,
719 adapter->num_tx_queues, 745 adapter->num_tx_queues,
720 r_idx + 1); 746 r_idx + 1);
721 } 747 }
722 748
723 /* if this is a tx only vector use half the irq (tx) rate */ 749 /* if this is a tx only vector halve the interrupt rate */
724 if (q_vector->txr_count && !q_vector->rxr_count) 750 if (q_vector->txr_count && !q_vector->rxr_count)
725 q_vector->eitr = adapter->tx_eitr; 751 q_vector->eitr = (adapter->eitr_param >> 1);
726 else 752 else
727 /* rx only or mixed */ 753 /* rx only */
728 q_vector->eitr = adapter->rx_eitr; 754 q_vector->eitr = adapter->eitr_param;
729 755
730 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 756 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
731 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); 757 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
732 } 758 }
733 759
734 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx); 760 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
735 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950); 761 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
736 762
737 /* set up to autoclear timer, lsc, and the vectors */ 763 /* set up to autoclear timer, and the vectors */
738 mask = IXGBE_EIMS_ENABLE_MASK; 764 mask = IXGBE_EIMS_ENABLE_MASK;
739 mask &= ~IXGBE_EIMS_OTHER; 765 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
740 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); 766 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
741} 767}
742 768
@@ -766,8 +792,8 @@ enum latency_range {
766 * parameter (see ixgbe_param.c) 792 * parameter (see ixgbe_param.c)
767 **/ 793 **/
768static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter, 794static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
769 u32 eitr, u8 itr_setting, 795 u32 eitr, u8 itr_setting,
770 int packets, int bytes) 796 int packets, int bytes)
771{ 797{
772 unsigned int retval = itr_setting; 798 unsigned int retval = itr_setting;
773 u32 timepassed_us; 799 u32 timepassed_us;
@@ -814,40 +840,40 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
814 u32 new_itr; 840 u32 new_itr;
815 u8 current_itr, ret_itr; 841 u8 current_itr, ret_itr;
816 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) / 842 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
817 sizeof(struct ixgbe_q_vector); 843 sizeof(struct ixgbe_q_vector);
818 struct ixgbe_ring *rx_ring, *tx_ring; 844 struct ixgbe_ring *rx_ring, *tx_ring;
819 845
820 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 846 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
821 for (i = 0; i < q_vector->txr_count; i++) { 847 for (i = 0; i < q_vector->txr_count; i++) {
822 tx_ring = &(adapter->tx_ring[r_idx]); 848 tx_ring = &(adapter->tx_ring[r_idx]);
823 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr, 849 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
824 q_vector->tx_eitr, 850 q_vector->tx_itr,
825 tx_ring->total_packets, 851 tx_ring->total_packets,
826 tx_ring->total_bytes); 852 tx_ring->total_bytes);
827 /* if the result for this queue would decrease interrupt 853 /* if the result for this queue would decrease interrupt
828 * rate for this vector then use that result */ 854 * rate for this vector then use that result */
829 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ? 855 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
830 q_vector->tx_eitr - 1 : ret_itr); 856 q_vector->tx_itr - 1 : ret_itr);
831 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 857 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
832 r_idx + 1); 858 r_idx + 1);
833 } 859 }
834 860
835 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 861 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
836 for (i = 0; i < q_vector->rxr_count; i++) { 862 for (i = 0; i < q_vector->rxr_count; i++) {
837 rx_ring = &(adapter->rx_ring[r_idx]); 863 rx_ring = &(adapter->rx_ring[r_idx]);
838 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr, 864 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
839 q_vector->rx_eitr, 865 q_vector->rx_itr,
840 rx_ring->total_packets, 866 rx_ring->total_packets,
841 rx_ring->total_bytes); 867 rx_ring->total_bytes);
842 /* if the result for this queue would decrease interrupt 868 /* if the result for this queue would decrease interrupt
843 * rate for this vector then use that result */ 869 * rate for this vector then use that result */
844 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ? 870 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
845 q_vector->rx_eitr - 1 : ret_itr); 871 q_vector->rx_itr - 1 : ret_itr);
846 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 872 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
847 r_idx + 1); 873 r_idx + 1);
848 } 874 }
849 875
850 current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr); 876 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
851 877
852 switch (current_itr) { 878 switch (current_itr) {
853 /* counts and packets in update_itr are dependent on these numbers */ 879 /* counts and packets in update_itr are dependent on these numbers */
@@ -871,13 +897,27 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
871 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); 897 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
872 /* must write high and low 16 bits to reset counter */ 898 /* must write high and low 16 bits to reset counter */
873 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx, 899 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
874 itr_reg); 900 itr_reg);
875 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16); 901 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
876 } 902 }
877 903
878 return; 904 return;
879} 905}
880 906
907
908static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
909{
910 struct ixgbe_hw *hw = &adapter->hw;
911
912 adapter->lsc_int++;
913 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
914 adapter->link_check_timeout = jiffies;
915 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
916 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
917 schedule_work(&adapter->watchdog_task);
918 }
919}
920
881static irqreturn_t ixgbe_msix_lsc(int irq, void *data) 921static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
882{ 922{
883 struct net_device *netdev = data; 923 struct net_device *netdev = data;
@@ -885,11 +925,8 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
885 struct ixgbe_hw *hw = &adapter->hw; 925 struct ixgbe_hw *hw = &adapter->hw;
886 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 926 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
887 927
888 if (eicr & IXGBE_EICR_LSC) { 928 if (eicr & IXGBE_EICR_LSC)
889 adapter->lsc_int++; 929 ixgbe_check_lsc(adapter);
890 if (!test_bit(__IXGBE_DOWN, &adapter->state))
891 mod_timer(&adapter->watchdog_timer, jiffies);
892 }
893 930
894 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 931 if (!test_bit(__IXGBE_DOWN, &adapter->state))
895 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); 932 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
@@ -901,7 +938,7 @@ static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
901{ 938{
902 struct ixgbe_q_vector *q_vector = data; 939 struct ixgbe_q_vector *q_vector = data;
903 struct ixgbe_adapter *adapter = q_vector->adapter; 940 struct ixgbe_adapter *adapter = q_vector->adapter;
904 struct ixgbe_ring *txr; 941 struct ixgbe_ring *tx_ring;
905 int i, r_idx; 942 int i, r_idx;
906 943
907 if (!q_vector->txr_count) 944 if (!q_vector->txr_count)
@@ -909,16 +946,16 @@ static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
909 946
910 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 947 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
911 for (i = 0; i < q_vector->txr_count; i++) { 948 for (i = 0; i < q_vector->txr_count; i++) {
912 txr = &(adapter->tx_ring[r_idx]); 949 tx_ring = &(adapter->tx_ring[r_idx]);
913#ifdef CONFIG_DCA 950#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
914 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 951 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
915 ixgbe_update_tx_dca(adapter, txr); 952 ixgbe_update_tx_dca(adapter, tx_ring);
916#endif 953#endif
917 txr->total_bytes = 0; 954 tx_ring->total_bytes = 0;
918 txr->total_packets = 0; 955 tx_ring->total_packets = 0;
919 ixgbe_clean_tx_irq(adapter, txr); 956 ixgbe_clean_tx_irq(adapter, tx_ring);
920 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 957 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
921 r_idx + 1); 958 r_idx + 1);
922 } 959 }
923 960
924 return IRQ_HANDLED; 961 return IRQ_HANDLED;
@@ -933,18 +970,26 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
933{ 970{
934 struct ixgbe_q_vector *q_vector = data; 971 struct ixgbe_q_vector *q_vector = data;
935 struct ixgbe_adapter *adapter = q_vector->adapter; 972 struct ixgbe_adapter *adapter = q_vector->adapter;
936 struct ixgbe_ring *rxr; 973 struct ixgbe_ring *rx_ring;
937 int r_idx; 974 int r_idx;
975 int i;
938 976
939 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 977 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
978 for (i = 0; i < q_vector->rxr_count; i++) {
979 rx_ring = &(adapter->rx_ring[r_idx]);
980 rx_ring->total_bytes = 0;
981 rx_ring->total_packets = 0;
982 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
983 r_idx + 1);
984 }
985
940 if (!q_vector->rxr_count) 986 if (!q_vector->rxr_count)
941 return IRQ_HANDLED; 987 return IRQ_HANDLED;
942 988
943 rxr = &(adapter->rx_ring[r_idx]); 989 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
990 rx_ring = &(adapter->rx_ring[r_idx]);
944 /* disable interrupts on this vector only */ 991 /* disable interrupts on this vector only */
945 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->v_idx); 992 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
946 rxr->total_bytes = 0;
947 rxr->total_packets = 0;
948 netif_rx_schedule(adapter->netdev, &q_vector->napi); 993 netif_rx_schedule(adapter->netdev, &q_vector->napi);
949 994
950 return IRQ_HANDLED; 995 return IRQ_HANDLED;
@@ -963,39 +1008,90 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
963 * @napi: napi struct with our devices info in it 1008 * @napi: napi struct with our devices info in it
964 * @budget: amount of work driver is allowed to do this pass, in packets 1009 * @budget: amount of work driver is allowed to do this pass, in packets
965 * 1010 *
1011 * This function is optimized for cleaning one queue only on a single
1012 * q_vector!!!
966 **/ 1013 **/
967static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget) 1014static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
968{ 1015{
969 struct ixgbe_q_vector *q_vector = 1016 struct ixgbe_q_vector *q_vector =
970 container_of(napi, struct ixgbe_q_vector, napi); 1017 container_of(napi, struct ixgbe_q_vector, napi);
971 struct ixgbe_adapter *adapter = q_vector->adapter; 1018 struct ixgbe_adapter *adapter = q_vector->adapter;
972 struct ixgbe_ring *rxr; 1019 struct ixgbe_ring *rx_ring = NULL;
973 int work_done = 0; 1020 int work_done = 0;
974 long r_idx; 1021 long r_idx;
975 1022
976 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1023 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
977 rxr = &(adapter->rx_ring[r_idx]); 1024 rx_ring = &(adapter->rx_ring[r_idx]);
978#ifdef CONFIG_DCA 1025#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
979 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 1026 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
980 ixgbe_update_rx_dca(adapter, rxr); 1027 ixgbe_update_rx_dca(adapter, rx_ring);
981#endif 1028#endif
982 1029
983 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget); 1030 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
984 1031
985 /* If all Rx work done, exit the polling mode */ 1032 /* If all Rx work done, exit the polling mode */
986 if (work_done < budget) { 1033 if (work_done < budget) {
987 netif_rx_complete(adapter->netdev, napi); 1034 netif_rx_complete(adapter->netdev, napi);
988 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS) 1035 if (adapter->itr_setting & 3)
989 ixgbe_set_itr_msix(q_vector); 1036 ixgbe_set_itr_msix(q_vector);
990 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 1037 if (!test_bit(__IXGBE_DOWN, &adapter->state))
991 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rxr->v_idx); 1038 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
992 } 1039 }
993 1040
994 return work_done; 1041 return work_done;
995} 1042}
996 1043
1044/**
1045 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1046 * @napi: napi struct with our devices info in it
1047 * @budget: amount of work driver is allowed to do this pass, in packets
1048 *
1049 * This function will clean more than one rx queue associated with a
1050 * q_vector.
1051 **/
1052static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1053{
1054 struct ixgbe_q_vector *q_vector =
1055 container_of(napi, struct ixgbe_q_vector, napi);
1056 struct ixgbe_adapter *adapter = q_vector->adapter;
1057 struct ixgbe_ring *rx_ring = NULL;
1058 int work_done = 0, i;
1059 long r_idx;
1060 u16 enable_mask = 0;
1061
1062 /* attempt to distribute budget to each queue fairly, but don't allow
1063 * the budget to go below 1 because we'll exit polling */
1064 budget /= (q_vector->rxr_count ?: 1);
1065 budget = max(budget, 1);
1066 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1067 for (i = 0; i < q_vector->rxr_count; i++) {
1068 rx_ring = &(adapter->rx_ring[r_idx]);
1069#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1070 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1071 ixgbe_update_rx_dca(adapter, rx_ring);
1072#endif
1073 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1074 enable_mask |= rx_ring->v_idx;
1075 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1076 r_idx + 1);
1077 }
1078
1079 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1080 rx_ring = &(adapter->rx_ring[r_idx]);
1081 /* If all Rx work done, exit the polling mode */
1082 if (work_done < budget) {
1083 netif_rx_complete(adapter->netdev, napi);
1084 if (adapter->itr_setting & 3)
1085 ixgbe_set_itr_msix(q_vector);
1086 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1087 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1088 return 0;
1089 }
1090
1091 return work_done;
1092}
997static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx, 1093static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
998 int r_idx) 1094 int r_idx)
999{ 1095{
1000 a->q_vector[v_idx].adapter = a; 1096 a->q_vector[v_idx].adapter = a;
1001 set_bit(r_idx, a->q_vector[v_idx].rxr_idx); 1097 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
@@ -1004,7 +1100,7 @@ static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1004} 1100}
1005 1101
1006static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx, 1102static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1007 int r_idx) 1103 int r_idx)
1008{ 1104{
1009 a->q_vector[v_idx].adapter = a; 1105 a->q_vector[v_idx].adapter = a;
1010 set_bit(r_idx, a->q_vector[v_idx].txr_idx); 1106 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
@@ -1024,7 +1120,7 @@ static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1024 * mapping configurations in here. 1120 * mapping configurations in here.
1025 **/ 1121 **/
1026static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter, 1122static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1027 int vectors) 1123 int vectors)
1028{ 1124{
1029 int v_start = 0; 1125 int v_start = 0;
1030 int rxr_idx = 0, txr_idx = 0; 1126 int rxr_idx = 0, txr_idx = 0;
@@ -1101,28 +1197,28 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1101 goto out; 1197 goto out;
1102 1198
1103#define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \ 1199#define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1104 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \ 1200 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1105 &ixgbe_msix_clean_many) 1201 &ixgbe_msix_clean_many)
1106 for (vector = 0; vector < q_vectors; vector++) { 1202 for (vector = 0; vector < q_vectors; vector++) {
1107 handler = SET_HANDLER(&adapter->q_vector[vector]); 1203 handler = SET_HANDLER(&adapter->q_vector[vector]);
1108 sprintf(adapter->name[vector], "%s:v%d-%s", 1204 sprintf(adapter->name[vector], "%s:v%d-%s",
1109 netdev->name, vector, 1205 netdev->name, vector,
1110 (handler == &ixgbe_msix_clean_rx) ? "Rx" : 1206 (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1111 ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx")); 1207 ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1112 err = request_irq(adapter->msix_entries[vector].vector, 1208 err = request_irq(adapter->msix_entries[vector].vector,
1113 handler, 0, adapter->name[vector], 1209 handler, 0, adapter->name[vector],
1114 &(adapter->q_vector[vector])); 1210 &(adapter->q_vector[vector]));
1115 if (err) { 1211 if (err) {
1116 DPRINTK(PROBE, ERR, 1212 DPRINTK(PROBE, ERR,
1117 "request_irq failed for MSIX interrupt " 1213 "request_irq failed for MSIX interrupt "
1118 "Error: %d\n", err); 1214 "Error: %d\n", err);
1119 goto free_queue_irqs; 1215 goto free_queue_irqs;
1120 } 1216 }
1121 } 1217 }
1122 1218
1123 sprintf(adapter->name[vector], "%s:lsc", netdev->name); 1219 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1124 err = request_irq(adapter->msix_entries[vector].vector, 1220 err = request_irq(adapter->msix_entries[vector].vector,
1125 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev); 1221 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1126 if (err) { 1222 if (err) {
1127 DPRINTK(PROBE, ERR, 1223 DPRINTK(PROBE, ERR,
1128 "request_irq for msix_lsc failed: %d\n", err); 1224 "request_irq for msix_lsc failed: %d\n", err);
@@ -1134,7 +1230,7 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1134free_queue_irqs: 1230free_queue_irqs:
1135 for (i = vector - 1; i >= 0; i--) 1231 for (i = vector - 1; i >= 0; i--)
1136 free_irq(adapter->msix_entries[--vector].vector, 1232 free_irq(adapter->msix_entries[--vector].vector,
1137 &(adapter->q_vector[i])); 1233 &(adapter->q_vector[i]));
1138 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; 1234 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1139 pci_disable_msix(adapter->pdev); 1235 pci_disable_msix(adapter->pdev);
1140 kfree(adapter->msix_entries); 1236 kfree(adapter->msix_entries);
@@ -1152,16 +1248,16 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1152 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0]; 1248 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1153 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0]; 1249 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1154 1250
1155 q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr, 1251 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1156 q_vector->tx_eitr, 1252 q_vector->tx_itr,
1157 tx_ring->total_packets, 1253 tx_ring->total_packets,
1158 tx_ring->total_bytes); 1254 tx_ring->total_bytes);
1159 q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr, 1255 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1160 q_vector->rx_eitr, 1256 q_vector->rx_itr,
1161 rx_ring->total_packets, 1257 rx_ring->total_packets,
1162 rx_ring->total_bytes); 1258 rx_ring->total_bytes);
1163 1259
1164 current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr); 1260 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1165 1261
1166 switch (current_itr) { 1262 switch (current_itr) {
1167 /* counts and packets in update_itr are dependent on these numbers */ 1263 /* counts and packets in update_itr are dependent on these numbers */
@@ -1206,19 +1302,19 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
1206 struct ixgbe_hw *hw = &adapter->hw; 1302 struct ixgbe_hw *hw = &adapter->hw;
1207 u32 eicr; 1303 u32 eicr;
1208 1304
1209
1210 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read 1305 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1211 * therefore no explict interrupt disable is necessary */ 1306 * therefore no explict interrupt disable is necessary */
1212 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 1307 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1213 if (!eicr) 1308 if (!eicr) {
1309 /* shared interrupt alert!
1310 * make sure interrupts are enabled because the read will
1311 * have disabled interrupts due to EIAM */
1312 ixgbe_irq_enable(adapter);
1214 return IRQ_NONE; /* Not our interrupt */ 1313 return IRQ_NONE; /* Not our interrupt */
1215
1216 if (eicr & IXGBE_EICR_LSC) {
1217 adapter->lsc_int++;
1218 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1219 mod_timer(&adapter->watchdog_timer, jiffies);
1220 } 1314 }
1221 1315
1316 if (eicr & IXGBE_EICR_LSC)
1317 ixgbe_check_lsc(adapter);
1222 1318
1223 if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) { 1319 if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1224 adapter->tx_ring[0].total_packets = 0; 1320 adapter->tx_ring[0].total_packets = 0;
@@ -1261,10 +1357,10 @@ static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1261 err = ixgbe_request_msix_irqs(adapter); 1357 err = ixgbe_request_msix_irqs(adapter);
1262 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1358 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1263 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0, 1359 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1264 netdev->name, netdev); 1360 netdev->name, netdev);
1265 } else { 1361 } else {
1266 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED, 1362 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1267 netdev->name, netdev); 1363 netdev->name, netdev);
1268 } 1364 }
1269 1365
1270 if (err) 1366 if (err)
@@ -1288,7 +1384,7 @@ static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1288 i--; 1384 i--;
1289 for (; i >= 0; i--) { 1385 for (; i >= 0; i--) {
1290 free_irq(adapter->msix_entries[i].vector, 1386 free_irq(adapter->msix_entries[i].vector,
1291 &(adapter->q_vector[i])); 1387 &(adapter->q_vector[i]));
1292 } 1388 }
1293 1389
1294 ixgbe_reset_q_vectors(adapter); 1390 ixgbe_reset_q_vectors(adapter);
@@ -1335,7 +1431,7 @@ static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1335 struct ixgbe_hw *hw = &adapter->hw; 1431 struct ixgbe_hw *hw = &adapter->hw;
1336 1432
1337 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), 1433 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1338 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr)); 1434 EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1339 1435
1340 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0); 1436 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1341 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0); 1437 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
@@ -1347,26 +1443,31 @@ static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1347} 1443}
1348 1444
1349/** 1445/**
1350 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset 1446 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1351 * @adapter: board private structure 1447 * @adapter: board private structure
1352 * 1448 *
1353 * Configure the Tx unit of the MAC after a reset. 1449 * Configure the Tx unit of the MAC after a reset.
1354 **/ 1450 **/
1355static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) 1451static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1356{ 1452{
1357 u64 tdba; 1453 u64 tdba, tdwba;
1358 struct ixgbe_hw *hw = &adapter->hw; 1454 struct ixgbe_hw *hw = &adapter->hw;
1359 u32 i, j, tdlen, txctrl; 1455 u32 i, j, tdlen, txctrl;
1360 1456
1361 /* Setup the HW Tx Head and Tail descriptor pointers */ 1457 /* Setup the HW Tx Head and Tail descriptor pointers */
1362 for (i = 0; i < adapter->num_tx_queues; i++) { 1458 for (i = 0; i < adapter->num_tx_queues; i++) {
1363 j = adapter->tx_ring[i].reg_idx; 1459 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1364 tdba = adapter->tx_ring[i].dma; 1460 j = ring->reg_idx;
1365 tdlen = adapter->tx_ring[i].count * 1461 tdba = ring->dma;
1366 sizeof(union ixgbe_adv_tx_desc); 1462 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1367 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 1463 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1368 (tdba & DMA_32BIT_MASK)); 1464 (tdba & DMA_32BIT_MASK));
1369 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 1465 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1466 tdwba = ring->dma +
1467 (ring->count * sizeof(union ixgbe_adv_tx_desc));
1468 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1469 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1470 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1370 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen); 1471 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1371 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 1472 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1372 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 1473 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
@@ -1375,20 +1476,66 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1375 /* Disable Tx Head Writeback RO bit, since this hoses 1476 /* Disable Tx Head Writeback RO bit, since this hoses
1376 * bookkeeping if things aren't delivered in order. 1477 * bookkeeping if things aren't delivered in order.
1377 */ 1478 */
1378 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 1479 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1379 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; 1480 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1380 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl); 1481 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1381 } 1482 }
1382} 1483}
1383 1484
1384#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 1485#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1385 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 1486
1487static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1488{
1489 struct ixgbe_ring *rx_ring;
1490 u32 srrctl;
1491 int queue0;
1492 unsigned long mask;
1493
1494 /* program one srrctl register per VMDq index */
1495 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1496 long shift, len;
1497 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1498 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1499 shift = find_first_bit(&mask, len);
1500 queue0 = index & mask;
1501 index = (index & mask) >> shift;
1502 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1503 } else {
1504 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1505 queue0 = index & mask;
1506 index = index & mask;
1507 }
1508
1509 rx_ring = &adapter->rx_ring[queue0];
1510
1511 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1512
1513 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1514 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1515
1516 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1517 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1518 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1519 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1520 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1521 IXGBE_SRRCTL_BSIZEHDR_MASK);
1522 } else {
1523 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1524
1525 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1526 srrctl |= IXGBE_RXBUFFER_2048 >>
1527 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1528 else
1529 srrctl |= rx_ring->rx_buf_len >>
1530 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1531 }
1532 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1533}
1386 1534
1387#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1388/** 1535/**
1389 * ixgbe_get_skb_hdr - helper function for LRO header processing 1536 * ixgbe_get_skb_hdr - helper function for LRO header processing
1390 * @skb: pointer to sk_buff to be added to LRO packet 1537 * @skb: pointer to sk_buff to be added to LRO packet
1391 * @iphdr: pointer to tcp header structure 1538 * @iphdr: pointer to ip header structure
1392 * @tcph: pointer to tcp header structure 1539 * @tcph: pointer to tcp header structure
1393 * @hdr_flags: pointer to header flags 1540 * @hdr_flags: pointer to header flags
1394 * @priv: private data 1541 * @priv: private data
@@ -1399,8 +1546,8 @@ static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1399 union ixgbe_adv_rx_desc *rx_desc = priv; 1546 union ixgbe_adv_rx_desc *rx_desc = priv;
1400 1547
1401 /* Verify that this is a valid IPv4 TCP packet */ 1548 /* Verify that this is a valid IPv4 TCP packet */
1402 if (!(rx_desc->wb.lower.lo_dword.pkt_info & 1549 if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1403 (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP))) 1550 (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1404 return -1; 1551 return -1;
1405 1552
1406 /* Set network headers */ 1553 /* Set network headers */
@@ -1412,8 +1559,11 @@ static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1412 return 0; 1559 return 0;
1413} 1560}
1414 1561
1562#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1563 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1564
1415/** 1565/**
1416 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset 1566 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1417 * @adapter: board private structure 1567 * @adapter: board private structure
1418 * 1568 *
1419 * Configure the Rx unit of the MAC after a reset. 1569 * Configure the Rx unit of the MAC after a reset.
@@ -1426,25 +1576,26 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1426 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1576 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1427 int i, j; 1577 int i, j;
1428 u32 rdlen, rxctrl, rxcsum; 1578 u32 rdlen, rxctrl, rxcsum;
1429 u32 random[10]; 1579 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1580 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1581 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1430 u32 fctrl, hlreg0; 1582 u32 fctrl, hlreg0;
1431 u32 pages; 1583 u32 pages;
1432 u32 reta = 0, mrqc, srrctl; 1584 u32 reta = 0, mrqc;
1585 u32 rdrxctl;
1586 int rx_buf_len;
1433 1587
1434 /* Decide whether to use packet split mode or not */ 1588 /* Decide whether to use packet split mode or not */
1435 if (netdev->mtu > ETH_DATA_LEN) 1589 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1436 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1437 else
1438 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1439 1590
1440 /* Set the RX buffer length according to the mode */ 1591 /* Set the RX buffer length according to the mode */
1441 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1592 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1442 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE; 1593 rx_buf_len = IXGBE_RX_HDR_SIZE;
1443 } else { 1594 } else {
1444 if (netdev->mtu <= ETH_DATA_LEN) 1595 if (netdev->mtu <= ETH_DATA_LEN)
1445 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1596 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1446 else 1597 else
1447 adapter->rx_buf_len = ALIGN(max_frame, 1024); 1598 rx_buf_len = ALIGN(max_frame, 1024);
1448 } 1599 }
1449 1600
1450 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 1601 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
@@ -1461,28 +1612,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1461 1612
1462 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 1613 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1463 1614
1464 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1465 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1466 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1467
1468 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1469 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1470 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1471 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1472 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1473 IXGBE_SRRCTL_BSIZEHDR_MASK);
1474 } else {
1475 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1476
1477 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1478 srrctl |=
1479 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1480 else
1481 srrctl |=
1482 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1483 }
1484 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1485
1486 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); 1615 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1487 /* disable receives while setting up the descriptors */ 1616 /* disable receives while setting up the descriptors */
1488 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1617 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
@@ -1492,25 +1621,43 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1492 * the Base and Length of the Rx Descriptor Ring */ 1621 * the Base and Length of the Rx Descriptor Ring */
1493 for (i = 0; i < adapter->num_rx_queues; i++) { 1622 for (i = 0; i < adapter->num_rx_queues; i++) {
1494 rdba = adapter->rx_ring[i].dma; 1623 rdba = adapter->rx_ring[i].dma;
1495 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK)); 1624 j = adapter->rx_ring[i].reg_idx;
1496 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32)); 1625 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1497 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen); 1626 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1498 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0); 1627 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1499 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0); 1628 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1500 adapter->rx_ring[i].head = IXGBE_RDH(i); 1629 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1501 adapter->rx_ring[i].tail = IXGBE_RDT(i); 1630 adapter->rx_ring[i].head = IXGBE_RDH(j);
1502 } 1631 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1503 1632 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1504 /* Intitial LRO Settings */ 1633 /* Intitial LRO Settings */
1505 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE; 1634 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1506 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS; 1635 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1507 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr; 1636 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1508 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID; 1637 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1509 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) 1638 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1510 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI; 1639 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1511 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev; 1640 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1512 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; 1641 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1513 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; 1642 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1643
1644 ixgbe_configure_srrctl(adapter, j);
1645 }
1646
1647 /*
1648 * For VMDq support of different descriptor types or
1649 * buffer sizes through the use of multiple SRRCTL
1650 * registers, RDRXCTL.MVMEN must be set to 1
1651 *
1652 * also, the manual doesn't mention it clearly but DCA hints
1653 * will only use queue 0's tags unless this bit is set. Side
1654 * effects of setting this bit are only that SRRCTL must be
1655 * fully programmed [0..15]
1656 */
1657 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1658 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1659 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1660
1514 1661
1515 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { 1662 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1516 /* Fill out redirection table */ 1663 /* Fill out redirection table */
@@ -1525,22 +1672,20 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1525 } 1672 }
1526 1673
1527 /* Fill out hash function seeds */ 1674 /* Fill out hash function seeds */
1528 /* XXX use a random constant here to glue certain flows */
1529 get_random_bytes(&random[0], 40);
1530 for (i = 0; i < 10; i++) 1675 for (i = 0; i < 10; i++)
1531 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]); 1676 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1532 1677
1533 mrqc = IXGBE_MRQC_RSSEN 1678 mrqc = IXGBE_MRQC_RSSEN
1534 /* Perform hash on these packet types */ 1679 /* Perform hash on these packet types */
1535 | IXGBE_MRQC_RSS_FIELD_IPV4 1680 | IXGBE_MRQC_RSS_FIELD_IPV4
1536 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 1681 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1537 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP 1682 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1538 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 1683 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1539 | IXGBE_MRQC_RSS_FIELD_IPV6_EX 1684 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1540 | IXGBE_MRQC_RSS_FIELD_IPV6 1685 | IXGBE_MRQC_RSS_FIELD_IPV6
1541 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP 1686 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1542 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP 1687 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1543 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 1688 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1544 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 1689 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1545 } 1690 }
1546 1691
@@ -1562,7 +1707,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1562} 1707}
1563 1708
1564static void ixgbe_vlan_rx_register(struct net_device *netdev, 1709static void ixgbe_vlan_rx_register(struct net_device *netdev,
1565 struct vlan_group *grp) 1710 struct vlan_group *grp)
1566{ 1711{
1567 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1712 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1568 u32 ctrl; 1713 u32 ctrl;
@@ -1586,14 +1731,16 @@ static void ixgbe_vlan_rx_register(struct net_device *netdev,
1586static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1731static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1587{ 1732{
1588 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1733 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1734 struct ixgbe_hw *hw = &adapter->hw;
1589 1735
1590 /* add VID to filter table */ 1736 /* add VID to filter table */
1591 ixgbe_set_vfta(&adapter->hw, vid, 0, true); 1737 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1592} 1738}
1593 1739
1594static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1740static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1595{ 1741{
1596 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1742 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1743 struct ixgbe_hw *hw = &adapter->hw;
1597 1744
1598 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 1745 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1599 ixgbe_irq_disable(adapter); 1746 ixgbe_irq_disable(adapter);
@@ -1604,7 +1751,7 @@ static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1604 ixgbe_irq_enable(adapter); 1751 ixgbe_irq_enable(adapter);
1605 1752
1606 /* remove VID from filter table */ 1753 /* remove VID from filter table */
1607 ixgbe_set_vfta(&adapter->hw, vid, 0, false); 1754 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1608} 1755}
1609 1756
1610static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) 1757static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
@@ -1621,23 +1768,37 @@ static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1621 } 1768 }
1622} 1769}
1623 1770
1771static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1772{
1773 struct dev_mc_list *mc_ptr;
1774 u8 *addr = *mc_addr_ptr;
1775 *vmdq = 0;
1776
1777 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1778 if (mc_ptr->next)
1779 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1780 else
1781 *mc_addr_ptr = NULL;
1782
1783 return addr;
1784}
1785
1624/** 1786/**
1625 * ixgbe_set_multi - Multicast and Promiscuous mode set 1787 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1626 * @netdev: network interface device structure 1788 * @netdev: network interface device structure
1627 * 1789 *
1628 * The set_multi entry point is called whenever the multicast address 1790 * The set_rx_method entry point is called whenever the unicast/multicast
1629 * list or the network interface flags are updated. This routine is 1791 * address list or the network interface flags are updated. This routine is
1630 * responsible for configuring the hardware for proper multicast, 1792 * responsible for configuring the hardware for proper unicast, multicast and
1631 * promiscuous mode, and all-multi behavior. 1793 * promiscuous mode.
1632 **/ 1794 **/
1633static void ixgbe_set_multi(struct net_device *netdev) 1795static void ixgbe_set_rx_mode(struct net_device *netdev)
1634{ 1796{
1635 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1797 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1636 struct ixgbe_hw *hw = &adapter->hw; 1798 struct ixgbe_hw *hw = &adapter->hw;
1637 struct dev_mc_list *mc_ptr;
1638 u8 *mta_list;
1639 u32 fctrl, vlnctrl; 1799 u32 fctrl, vlnctrl;
1640 int i; 1800 u8 *addr_list = NULL;
1801 int addr_count = 0;
1641 1802
1642 /* Check for Promiscuous and All Multicast modes */ 1803 /* Check for Promiscuous and All Multicast modes */
1643 1804
@@ -1645,6 +1806,7 @@ static void ixgbe_set_multi(struct net_device *netdev)
1645 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 1806 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1646 1807
1647 if (netdev->flags & IFF_PROMISC) { 1808 if (netdev->flags & IFF_PROMISC) {
1809 hw->addr_ctrl.user_set_promisc = 1;
1648 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 1810 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1649 vlnctrl &= ~IXGBE_VLNCTRL_VFE; 1811 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1650 } else { 1812 } else {
@@ -1655,33 +1817,25 @@ static void ixgbe_set_multi(struct net_device *netdev)
1655 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 1817 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1656 } 1818 }
1657 vlnctrl |= IXGBE_VLNCTRL_VFE; 1819 vlnctrl |= IXGBE_VLNCTRL_VFE;
1820 hw->addr_ctrl.user_set_promisc = 0;
1658 } 1821 }
1659 1822
1660 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 1823 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1661 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 1824 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1662 1825
1663 if (netdev->mc_count) { 1826 /* reprogram secondary unicast list */
1664 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC); 1827 addr_count = netdev->uc_count;
1665 if (!mta_list) 1828 if (addr_count)
1666 return; 1829 addr_list = netdev->uc_list->dmi_addr;
1667 1830 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1668 /* Shared function expects packed array of only addresses. */ 1831 ixgbe_addr_list_itr);
1669 mc_ptr = netdev->mc_list; 1832
1670 1833 /* reprogram multicast list */
1671 for (i = 0; i < netdev->mc_count; i++) { 1834 addr_count = netdev->mc_count;
1672 if (!mc_ptr) 1835 if (addr_count)
1673 break; 1836 addr_list = netdev->mc_list->dmi_addr;
1674 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr, 1837 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1675 ETH_ALEN); 1838 ixgbe_addr_list_itr);
1676 mc_ptr = mc_ptr->next;
1677 }
1678
1679 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1680 kfree(mta_list);
1681 } else {
1682 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1683 }
1684
1685} 1839}
1686 1840
1687static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) 1841static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
@@ -1695,10 +1849,16 @@ static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1695 q_vectors = 1; 1849 q_vectors = 1;
1696 1850
1697 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1851 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1852 struct napi_struct *napi;
1698 q_vector = &adapter->q_vector[q_idx]; 1853 q_vector = &adapter->q_vector[q_idx];
1699 if (!q_vector->rxr_count) 1854 if (!q_vector->rxr_count)
1700 continue; 1855 continue;
1701 napi_enable(&q_vector->napi); 1856 napi = &q_vector->napi;
1857 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1858 (q_vector->rxr_count > 1))
1859 napi->poll = &ixgbe_clean_rxonly_many;
1860
1861 napi_enable(napi);
1702 } 1862 }
1703} 1863}
1704 1864
@@ -1725,7 +1885,7 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
1725 struct net_device *netdev = adapter->netdev; 1885 struct net_device *netdev = adapter->netdev;
1726 int i; 1886 int i;
1727 1887
1728 ixgbe_set_multi(netdev); 1888 ixgbe_set_rx_mode(netdev);
1729 1889
1730 ixgbe_restore_vlan(adapter); 1890 ixgbe_restore_vlan(adapter);
1731 1891
@@ -1733,7 +1893,7 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
1733 ixgbe_configure_rx(adapter); 1893 ixgbe_configure_rx(adapter);
1734 for (i = 0; i < adapter->num_rx_queues; i++) 1894 for (i = 0; i < adapter->num_rx_queues; i++)
1735 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i], 1895 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1736 (adapter->rx_ring[i].count - 1)); 1896 (adapter->rx_ring[i].count - 1));
1737} 1897}
1738 1898
1739static int ixgbe_up_complete(struct ixgbe_adapter *adapter) 1899static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
@@ -1751,7 +1911,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1751 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) { 1911 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1752 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 1912 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1753 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME | 1913 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1754 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD); 1914 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1755 } else { 1915 } else {
1756 /* MSI only */ 1916 /* MSI only */
1757 gpie = 0; 1917 gpie = 0;
@@ -1778,6 +1938,8 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1778 for (i = 0; i < adapter->num_tx_queues; i++) { 1938 for (i = 0; i < adapter->num_tx_queues; i++) {
1779 j = adapter->tx_ring[i].reg_idx; 1939 j = adapter->tx_ring[i].reg_idx;
1780 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j)); 1940 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1941 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1942 txdctl |= (8 << 16);
1781 txdctl |= IXGBE_TXDCTL_ENABLE; 1943 txdctl |= IXGBE_TXDCTL_ENABLE;
1782 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl); 1944 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1783 } 1945 }
@@ -1812,6 +1974,8 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1812 1974
1813 /* bring the link up in the watchdog, this could race with our first 1975 /* bring the link up in the watchdog, this could race with our first
1814 * link up interrupt but shouldn't be a problem */ 1976 * link up interrupt but shouldn't be a problem */
1977 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1978 adapter->link_check_timeout = jiffies;
1815 mod_timer(&adapter->watchdog_timer, jiffies); 1979 mod_timer(&adapter->watchdog_timer, jiffies);
1816 return 0; 1980 return 0;
1817} 1981}
@@ -1836,58 +2000,22 @@ int ixgbe_up(struct ixgbe_adapter *adapter)
1836 2000
1837void ixgbe_reset(struct ixgbe_adapter *adapter) 2001void ixgbe_reset(struct ixgbe_adapter *adapter)
1838{ 2002{
1839 if (ixgbe_init_hw(&adapter->hw)) 2003 struct ixgbe_hw *hw = &adapter->hw;
1840 DPRINTK(PROBE, ERR, "Hardware Error\n"); 2004 if (hw->mac.ops.init_hw(hw))
2005 dev_err(&adapter->pdev->dev, "Hardware Error\n");
1841 2006
1842 /* reprogram the RAR[0] in case user changed it. */ 2007 /* reprogram the RAR[0] in case user changed it. */
1843 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 2008 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
1844 2009
1845} 2010}
1846 2011
1847#ifdef CONFIG_PM
1848static int ixgbe_resume(struct pci_dev *pdev)
1849{
1850 struct net_device *netdev = pci_get_drvdata(pdev);
1851 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1852 u32 err;
1853
1854 pci_set_power_state(pdev, PCI_D0);
1855 pci_restore_state(pdev);
1856 err = pci_enable_device(pdev);
1857 if (err) {
1858 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1859 "suspend\n");
1860 return err;
1861 }
1862 pci_set_master(pdev);
1863
1864 pci_enable_wake(pdev, PCI_D3hot, 0);
1865 pci_enable_wake(pdev, PCI_D3cold, 0);
1866
1867 if (netif_running(netdev)) {
1868 err = ixgbe_request_irq(adapter);
1869 if (err)
1870 return err;
1871 }
1872
1873 ixgbe_reset(adapter);
1874
1875 if (netif_running(netdev))
1876 ixgbe_up(adapter);
1877
1878 netif_device_attach(netdev);
1879
1880 return 0;
1881}
1882#endif
1883
1884/** 2012/**
1885 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue 2013 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1886 * @adapter: board private structure 2014 * @adapter: board private structure
1887 * @rx_ring: ring to free buffers from 2015 * @rx_ring: ring to free buffers from
1888 **/ 2016 **/
1889static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter, 2017static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1890 struct ixgbe_ring *rx_ring) 2018 struct ixgbe_ring *rx_ring)
1891{ 2019{
1892 struct pci_dev *pdev = adapter->pdev; 2020 struct pci_dev *pdev = adapter->pdev;
1893 unsigned long size; 2021 unsigned long size;
@@ -1901,8 +2029,8 @@ static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1901 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 2029 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1902 if (rx_buffer_info->dma) { 2030 if (rx_buffer_info->dma) {
1903 pci_unmap_single(pdev, rx_buffer_info->dma, 2031 pci_unmap_single(pdev, rx_buffer_info->dma,
1904 adapter->rx_buf_len, 2032 rx_ring->rx_buf_len,
1905 PCI_DMA_FROMDEVICE); 2033 PCI_DMA_FROMDEVICE);
1906 rx_buffer_info->dma = 0; 2034 rx_buffer_info->dma = 0;
1907 } 2035 }
1908 if (rx_buffer_info->skb) { 2036 if (rx_buffer_info->skb) {
@@ -1911,12 +2039,12 @@ static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1911 } 2039 }
1912 if (!rx_buffer_info->page) 2040 if (!rx_buffer_info->page)
1913 continue; 2041 continue;
1914 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE, 2042 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
1915 PCI_DMA_FROMDEVICE); 2043 PCI_DMA_FROMDEVICE);
1916 rx_buffer_info->page_dma = 0; 2044 rx_buffer_info->page_dma = 0;
1917
1918 put_page(rx_buffer_info->page); 2045 put_page(rx_buffer_info->page);
1919 rx_buffer_info->page = NULL; 2046 rx_buffer_info->page = NULL;
2047 rx_buffer_info->page_offset = 0;
1920 } 2048 }
1921 2049
1922 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count; 2050 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
@@ -1938,7 +2066,7 @@ static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1938 * @tx_ring: ring to be cleaned 2066 * @tx_ring: ring to be cleaned
1939 **/ 2067 **/
1940static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter, 2068static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1941 struct ixgbe_ring *tx_ring) 2069 struct ixgbe_ring *tx_ring)
1942{ 2070{
1943 struct ixgbe_tx_buffer *tx_buffer_info; 2071 struct ixgbe_tx_buffer *tx_buffer_info;
1944 unsigned long size; 2072 unsigned long size;
@@ -1991,75 +2119,64 @@ static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1991void ixgbe_down(struct ixgbe_adapter *adapter) 2119void ixgbe_down(struct ixgbe_adapter *adapter)
1992{ 2120{
1993 struct net_device *netdev = adapter->netdev; 2121 struct net_device *netdev = adapter->netdev;
2122 struct ixgbe_hw *hw = &adapter->hw;
1994 u32 rxctrl; 2123 u32 rxctrl;
2124 u32 txdctl;
2125 int i, j;
1995 2126
1996 /* signal that we are down to the interrupt handler */ 2127 /* signal that we are down to the interrupt handler */
1997 set_bit(__IXGBE_DOWN, &adapter->state); 2128 set_bit(__IXGBE_DOWN, &adapter->state);
1998 2129
1999 /* disable receives */ 2130 /* disable receives */
2000 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 2131 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2001 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, 2132 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2002 rxctrl & ~IXGBE_RXCTRL_RXEN);
2003 2133
2004 netif_tx_disable(netdev); 2134 netif_tx_disable(netdev);
2005 2135
2006 /* disable transmits in the hardware */ 2136 IXGBE_WRITE_FLUSH(hw);
2007
2008 /* flush both disables */
2009 IXGBE_WRITE_FLUSH(&adapter->hw);
2010 msleep(10); 2137 msleep(10);
2011 2138
2139 netif_tx_stop_all_queues(netdev);
2140
2012 ixgbe_irq_disable(adapter); 2141 ixgbe_irq_disable(adapter);
2013 2142
2014 ixgbe_napi_disable_all(adapter); 2143 ixgbe_napi_disable_all(adapter);
2144
2015 del_timer_sync(&adapter->watchdog_timer); 2145 del_timer_sync(&adapter->watchdog_timer);
2146 cancel_work_sync(&adapter->watchdog_task);
2147
2148 /* disable transmits in the hardware now that interrupts are off */
2149 for (i = 0; i < adapter->num_tx_queues; i++) {
2150 j = adapter->tx_ring[i].reg_idx;
2151 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2152 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2153 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2154 }
2016 2155
2017 netif_carrier_off(netdev); 2156 netif_carrier_off(netdev);
2018 netif_tx_stop_all_queues(netdev);
2019 2157
2158#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2159 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2160 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2161 dca_remove_requester(&adapter->pdev->dev);
2162 }
2163
2164#endif
2020 if (!pci_channel_offline(adapter->pdev)) 2165 if (!pci_channel_offline(adapter->pdev))
2021 ixgbe_reset(adapter); 2166 ixgbe_reset(adapter);
2022 ixgbe_clean_all_tx_rings(adapter); 2167 ixgbe_clean_all_tx_rings(adapter);
2023 ixgbe_clean_all_rx_rings(adapter); 2168 ixgbe_clean_all_rx_rings(adapter);
2024 2169
2025} 2170#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2026 2171 /* since we reset the hardware DCA settings were cleared */
2027static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state) 2172 if (dca_add_requester(&adapter->pdev->dev) == 0) {
2028{ 2173 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2029 struct net_device *netdev = pci_get_drvdata(pdev); 2174 /* always use CB2 mode, difference is masked
2030 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2175 * in the CB driver */
2031#ifdef CONFIG_PM 2176 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2032 int retval = 0; 2177 ixgbe_setup_dca(adapter);
2033#endif
2034
2035 netif_device_detach(netdev);
2036
2037 if (netif_running(netdev)) {
2038 ixgbe_down(adapter);
2039 ixgbe_free_irq(adapter);
2040 } 2178 }
2041
2042#ifdef CONFIG_PM
2043 retval = pci_save_state(pdev);
2044 if (retval)
2045 return retval;
2046#endif 2179#endif
2047
2048 pci_enable_wake(pdev, PCI_D3hot, 0);
2049 pci_enable_wake(pdev, PCI_D3cold, 0);
2050
2051 ixgbe_release_hw_control(adapter);
2052
2053 pci_disable_device(pdev);
2054
2055 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2056
2057 return 0;
2058}
2059
2060static void ixgbe_shutdown(struct pci_dev *pdev)
2061{
2062 ixgbe_suspend(pdev, PMSG_SUSPEND);
2063} 2180}
2064 2181
2065/** 2182/**
@@ -2072,11 +2189,11 @@ static void ixgbe_shutdown(struct pci_dev *pdev)
2072static int ixgbe_poll(struct napi_struct *napi, int budget) 2189static int ixgbe_poll(struct napi_struct *napi, int budget)
2073{ 2190{
2074 struct ixgbe_q_vector *q_vector = container_of(napi, 2191 struct ixgbe_q_vector *q_vector = container_of(napi,
2075 struct ixgbe_q_vector, napi); 2192 struct ixgbe_q_vector, napi);
2076 struct ixgbe_adapter *adapter = q_vector->adapter; 2193 struct ixgbe_adapter *adapter = q_vector->adapter;
2077 int tx_cleaned = 0, work_done = 0; 2194 int tx_cleaned, work_done = 0;
2078 2195
2079#ifdef CONFIG_DCA 2196#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2080 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 2197 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2081 ixgbe_update_tx_dca(adapter, adapter->tx_ring); 2198 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2082 ixgbe_update_rx_dca(adapter, adapter->rx_ring); 2199 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
@@ -2092,12 +2209,11 @@ static int ixgbe_poll(struct napi_struct *napi, int budget)
2092 /* If budget not fully consumed, exit the polling mode */ 2209 /* If budget not fully consumed, exit the polling mode */
2093 if (work_done < budget) { 2210 if (work_done < budget) {
2094 netif_rx_complete(adapter->netdev, napi); 2211 netif_rx_complete(adapter->netdev, napi);
2095 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS) 2212 if (adapter->itr_setting & 3)
2096 ixgbe_set_itr(adapter); 2213 ixgbe_set_itr(adapter);
2097 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 2214 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2098 ixgbe_irq_enable(adapter); 2215 ixgbe_irq_enable(adapter);
2099 } 2216 }
2100
2101 return work_done; 2217 return work_done;
2102} 2218}
2103 2219
@@ -2123,8 +2239,48 @@ static void ixgbe_reset_task(struct work_struct *work)
2123 ixgbe_reinit_locked(adapter); 2239 ixgbe_reinit_locked(adapter);
2124} 2240}
2125 2241
2242static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2243{
2244 int nrq = 1, ntq = 1;
2245 int feature_mask = 0, rss_i, rss_m;
2246
2247 /* Number of supported queues */
2248 switch (adapter->hw.mac.type) {
2249 case ixgbe_mac_82598EB:
2250 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2251 rss_m = 0;
2252 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2253
2254 switch (adapter->flags & feature_mask) {
2255 case (IXGBE_FLAG_RSS_ENABLED):
2256 rss_m = 0xF;
2257 nrq = rss_i;
2258 ntq = rss_i;
2259 break;
2260 case 0:
2261 default:
2262 rss_i = 0;
2263 rss_m = 0;
2264 nrq = 1;
2265 ntq = 1;
2266 break;
2267 }
2268
2269 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2270 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2271 break;
2272 default:
2273 nrq = 1;
2274 ntq = 1;
2275 break;
2276 }
2277
2278 adapter->num_rx_queues = nrq;
2279 adapter->num_tx_queues = ntq;
2280}
2281
2126static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, 2282static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2127 int vectors) 2283 int vectors)
2128{ 2284{
2129 int err, vector_threshold; 2285 int err, vector_threshold;
2130 2286
@@ -2143,7 +2299,7 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2143 */ 2299 */
2144 while (vectors >= vector_threshold) { 2300 while (vectors >= vector_threshold) {
2145 err = pci_enable_msix(adapter->pdev, adapter->msix_entries, 2301 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2146 vectors); 2302 vectors);
2147 if (!err) /* Success in acquiring all requested vectors. */ 2303 if (!err) /* Success in acquiring all requested vectors. */
2148 break; 2304 break;
2149 else if (err < 0) 2305 else if (err < 0)
@@ -2162,54 +2318,13 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2162 kfree(adapter->msix_entries); 2318 kfree(adapter->msix_entries);
2163 adapter->msix_entries = NULL; 2319 adapter->msix_entries = NULL;
2164 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; 2320 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2165 adapter->num_tx_queues = 1; 2321 ixgbe_set_num_queues(adapter);
2166 adapter->num_rx_queues = 1;
2167 } else { 2322 } else {
2168 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */ 2323 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2169 adapter->num_msix_vectors = vectors; 2324 adapter->num_msix_vectors = vectors;
2170 } 2325 }
2171} 2326}
2172 2327
2173static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2174{
2175 int nrq, ntq;
2176 int feature_mask = 0, rss_i, rss_m;
2177
2178 /* Number of supported queues */
2179 switch (adapter->hw.mac.type) {
2180 case ixgbe_mac_82598EB:
2181 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2182 rss_m = 0;
2183 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2184
2185 switch (adapter->flags & feature_mask) {
2186 case (IXGBE_FLAG_RSS_ENABLED):
2187 rss_m = 0xF;
2188 nrq = rss_i;
2189 ntq = rss_i;
2190 break;
2191 case 0:
2192 default:
2193 rss_i = 0;
2194 rss_m = 0;
2195 nrq = 1;
2196 ntq = 1;
2197 break;
2198 }
2199
2200 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2201 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2202 break;
2203 default:
2204 nrq = 1;
2205 ntq = 1;
2206 break;
2207 }
2208
2209 adapter->num_rx_queues = nrq;
2210 adapter->num_tx_queues = ntq;
2211}
2212
2213/** 2328/**
2214 * ixgbe_cache_ring_register - Descriptor ring to register mapping 2329 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2215 * @adapter: board private structure to initialize 2330 * @adapter: board private structure to initialize
@@ -2219,9 +2334,6 @@ static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2219 **/ 2334 **/
2220static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter) 2335static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2221{ 2336{
2222 /* TODO: Remove all uses of the indices in the cases where multiple
2223 * features are OR'd together, if the feature set makes sense.
2224 */
2225 int feature_mask = 0, rss_i; 2337 int feature_mask = 0, rss_i;
2226 int i, txr_idx, rxr_idx; 2338 int i, txr_idx, rxr_idx;
2227 2339
@@ -2262,21 +2374,22 @@ static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2262 int i; 2374 int i;
2263 2375
2264 adapter->tx_ring = kcalloc(adapter->num_tx_queues, 2376 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2265 sizeof(struct ixgbe_ring), GFP_KERNEL); 2377 sizeof(struct ixgbe_ring), GFP_KERNEL);
2266 if (!adapter->tx_ring) 2378 if (!adapter->tx_ring)
2267 goto err_tx_ring_allocation; 2379 goto err_tx_ring_allocation;
2268 2380
2269 adapter->rx_ring = kcalloc(adapter->num_rx_queues, 2381 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2270 sizeof(struct ixgbe_ring), GFP_KERNEL); 2382 sizeof(struct ixgbe_ring), GFP_KERNEL);
2271 if (!adapter->rx_ring) 2383 if (!adapter->rx_ring)
2272 goto err_rx_ring_allocation; 2384 goto err_rx_ring_allocation;
2273 2385
2274 for (i = 0; i < adapter->num_tx_queues; i++) { 2386 for (i = 0; i < adapter->num_tx_queues; i++) {
2275 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD; 2387 adapter->tx_ring[i].count = adapter->tx_ring_count;
2276 adapter->tx_ring[i].queue_index = i; 2388 adapter->tx_ring[i].queue_index = i;
2277 } 2389 }
2390
2278 for (i = 0; i < adapter->num_rx_queues; i++) { 2391 for (i = 0; i < adapter->num_rx_queues; i++) {
2279 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD; 2392 adapter->rx_ring[i].count = adapter->rx_ring_count;
2280 adapter->rx_ring[i].queue_index = i; 2393 adapter->rx_ring[i].queue_index = i;
2281 } 2394 }
2282 2395
@@ -2298,25 +2411,19 @@ err_tx_ring_allocation:
2298 * capabilities of the hardware and the kernel. 2411 * capabilities of the hardware and the kernel.
2299 **/ 2412 **/
2300static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter 2413static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2301 *adapter) 2414 *adapter)
2302{ 2415{
2303 int err = 0; 2416 int err = 0;
2304 int vector, v_budget; 2417 int vector, v_budget;
2305 2418
2306 /* 2419 /*
2307 * Set the default interrupt throttle rate.
2308 */
2309 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2310 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2311
2312 /*
2313 * It's easy to be greedy for MSI-X vectors, but it really 2420 * It's easy to be greedy for MSI-X vectors, but it really
2314 * doesn't do us much good if we have a lot more vectors 2421 * doesn't do us much good if we have a lot more vectors
2315 * than CPU's. So let's be conservative and only ask for 2422 * than CPU's. So let's be conservative and only ask for
2316 * (roughly) twice the number of vectors as there are CPU's. 2423 * (roughly) twice the number of vectors as there are CPU's.
2317 */ 2424 */
2318 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues, 2425 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2319 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS; 2426 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2320 2427
2321 /* 2428 /*
2322 * At the same time, hardware can only support a maximum of 2429 * At the same time, hardware can only support a maximum of
@@ -2330,7 +2437,7 @@ static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2330 /* A failure in MSI-X entry allocation isn't fatal, but it does 2437 /* A failure in MSI-X entry allocation isn't fatal, but it does
2331 * mean we disable MSI-X capabilities of the adapter. */ 2438 * mean we disable MSI-X capabilities of the adapter. */
2332 adapter->msix_entries = kcalloc(v_budget, 2439 adapter->msix_entries = kcalloc(v_budget,
2333 sizeof(struct msix_entry), GFP_KERNEL); 2440 sizeof(struct msix_entry), GFP_KERNEL);
2334 if (!adapter->msix_entries) { 2441 if (!adapter->msix_entries) {
2335 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; 2442 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2336 ixgbe_set_num_queues(adapter); 2443 ixgbe_set_num_queues(adapter);
@@ -2339,7 +2446,7 @@ static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2339 err = ixgbe_alloc_queues(adapter); 2446 err = ixgbe_alloc_queues(adapter);
2340 if (err) { 2447 if (err) {
2341 DPRINTK(PROBE, ERR, "Unable to allocate memory " 2448 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2342 "for queues\n"); 2449 "for queues\n");
2343 goto out; 2450 goto out;
2344 } 2451 }
2345 2452
@@ -2360,7 +2467,7 @@ try_msi:
2360 adapter->flags |= IXGBE_FLAG_MSI_ENABLED; 2467 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2361 } else { 2468 } else {
2362 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, " 2469 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2363 "falling back to legacy. Error: %d\n", err); 2470 "falling back to legacy. Error: %d\n", err);
2364 /* reset err */ 2471 /* reset err */
2365 err = 0; 2472 err = 0;
2366 } 2473 }
@@ -2416,9 +2523,9 @@ static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2416 } 2523 }
2417 2524
2418 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, " 2525 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2419 "Tx Queue count = %u\n", 2526 "Tx Queue count = %u\n",
2420 (adapter->num_rx_queues > 1) ? "Enabled" : 2527 (adapter->num_rx_queues > 1) ? "Enabled" :
2421 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); 2528 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2422 2529
2423 set_bit(__IXGBE_DOWN, &adapter->state); 2530 set_bit(__IXGBE_DOWN, &adapter->state);
2424 2531
@@ -2445,33 +2552,44 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2445 struct pci_dev *pdev = adapter->pdev; 2552 struct pci_dev *pdev = adapter->pdev;
2446 unsigned int rss; 2553 unsigned int rss;
2447 2554
2555 /* PCI config space info */
2556
2557 hw->vendor_id = pdev->vendor;
2558 hw->device_id = pdev->device;
2559 hw->revision_id = pdev->revision;
2560 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2561 hw->subsystem_device_id = pdev->subsystem_device;
2562
2448 /* Set capability flags */ 2563 /* Set capability flags */
2449 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus()); 2564 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2450 adapter->ring_feature[RING_F_RSS].indices = rss; 2565 adapter->ring_feature[RING_F_RSS].indices = rss;
2451 adapter->flags |= IXGBE_FLAG_RSS_ENABLED; 2566 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2452 2567
2453 /* Enable Dynamic interrupt throttling by default */
2454 adapter->rx_eitr = 1;
2455 adapter->tx_eitr = 1;
2456
2457 /* default flow control settings */ 2568 /* default flow control settings */
2458 hw->fc.original_type = ixgbe_fc_full; 2569 hw->fc.original_type = ixgbe_fc_none;
2459 hw->fc.type = ixgbe_fc_full; 2570 hw->fc.type = ixgbe_fc_none;
2571 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2572 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2573 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2574 hw->fc.send_xon = true;
2460 2575
2461 /* select 10G link by default */ 2576 /* select 10G link by default */
2462 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN; 2577 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2463 if (hw->mac.ops.reset(hw)) { 2578
2464 dev_err(&pdev->dev, "HW Init failed\n"); 2579 /* enable itr by default in dynamic mode */
2465 return -EIO; 2580 adapter->itr_setting = 1;
2466 } 2581 adapter->eitr_param = 20000;
2467 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true, 2582
2468 false)) { 2583 /* set defaults for eitr in MegaBytes */
2469 dev_err(&pdev->dev, "Link Speed setup failed\n"); 2584 adapter->eitr_low = 10;
2470 return -EIO; 2585 adapter->eitr_high = 20;
2471 } 2586
2587 /* set default ring sizes */
2588 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2589 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2472 2590
2473 /* initialize eeprom parameters */ 2591 /* initialize eeprom parameters */
2474 if (ixgbe_init_eeprom(hw)) { 2592 if (ixgbe_init_eeprom_params_generic(hw)) {
2475 dev_err(&pdev->dev, "EEPROM initialization failed\n"); 2593 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2476 return -EIO; 2594 return -EIO;
2477 } 2595 }
@@ -2487,105 +2605,157 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2487/** 2605/**
2488 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors) 2606 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2489 * @adapter: board private structure 2607 * @adapter: board private structure
2490 * @txdr: tx descriptor ring (for a specific queue) to setup 2608 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2491 * 2609 *
2492 * Return 0 on success, negative on failure 2610 * Return 0 on success, negative on failure
2493 **/ 2611 **/
2494int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter, 2612int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2495 struct ixgbe_ring *txdr) 2613 struct ixgbe_ring *tx_ring)
2496{ 2614{
2497 struct pci_dev *pdev = adapter->pdev; 2615 struct pci_dev *pdev = adapter->pdev;
2498 int size; 2616 int size;
2499 2617
2500 size = sizeof(struct ixgbe_tx_buffer) * txdr->count; 2618 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2501 txdr->tx_buffer_info = vmalloc(size); 2619 tx_ring->tx_buffer_info = vmalloc(size);
2502 if (!txdr->tx_buffer_info) { 2620 if (!tx_ring->tx_buffer_info)
2503 DPRINTK(PROBE, ERR, 2621 goto err;
2504 "Unable to allocate memory for the transmit descriptor ring\n"); 2622 memset(tx_ring->tx_buffer_info, 0, size);
2505 return -ENOMEM;
2506 }
2507 memset(txdr->tx_buffer_info, 0, size);
2508 2623
2509 /* round up to nearest 4K */ 2624 /* round up to nearest 4K */
2510 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc); 2625 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2511 txdr->size = ALIGN(txdr->size, 4096); 2626 sizeof(u32);
2512 2627 tx_ring->size = ALIGN(tx_ring->size, 4096);
2513 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2514 if (!txdr->desc) {
2515 vfree(txdr->tx_buffer_info);
2516 DPRINTK(PROBE, ERR,
2517 "Memory allocation failed for the tx desc ring\n");
2518 return -ENOMEM;
2519 }
2520 2628
2521 txdr->next_to_use = 0; 2629 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2522 txdr->next_to_clean = 0; 2630 &tx_ring->dma);
2523 txdr->work_limit = txdr->count; 2631 if (!tx_ring->desc)
2632 goto err;
2524 2633
2634 tx_ring->next_to_use = 0;
2635 tx_ring->next_to_clean = 0;
2636 tx_ring->work_limit = tx_ring->count;
2525 return 0; 2637 return 0;
2638
2639err:
2640 vfree(tx_ring->tx_buffer_info);
2641 tx_ring->tx_buffer_info = NULL;
2642 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2643 "descriptor ring\n");
2644 return -ENOMEM;
2645}
2646
2647/**
2648 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2649 * @adapter: board private structure
2650 *
2651 * If this function returns with an error, then it's possible one or
2652 * more of the rings is populated (while the rest are not). It is the
2653 * callers duty to clean those orphaned rings.
2654 *
2655 * Return 0 on success, negative on failure
2656 **/
2657static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2658{
2659 int i, err = 0;
2660
2661 for (i = 0; i < adapter->num_tx_queues; i++) {
2662 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2663 if (!err)
2664 continue;
2665 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2666 break;
2667 }
2668
2669 return err;
2526} 2670}
2527 2671
2528/** 2672/**
2529 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors) 2673 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2530 * @adapter: board private structure 2674 * @adapter: board private structure
2531 * @rxdr: rx descriptor ring (for a specific queue) to setup 2675 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2532 * 2676 *
2533 * Returns 0 on success, negative on failure 2677 * Returns 0 on success, negative on failure
2534 **/ 2678 **/
2535int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, 2679int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2536 struct ixgbe_ring *rxdr) 2680 struct ixgbe_ring *rx_ring)
2537{ 2681{
2538 struct pci_dev *pdev = adapter->pdev; 2682 struct pci_dev *pdev = adapter->pdev;
2539 int size; 2683 int size;
2540 2684
2541 size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS; 2685 size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2542 rxdr->lro_mgr.lro_arr = vmalloc(size); 2686 rx_ring->lro_mgr.lro_arr = vmalloc(size);
2543 if (!rxdr->lro_mgr.lro_arr) 2687 if (!rx_ring->lro_mgr.lro_arr)
2544 return -ENOMEM; 2688 return -ENOMEM;
2545 memset(rxdr->lro_mgr.lro_arr, 0, size); 2689 memset(rx_ring->lro_mgr.lro_arr, 0, size);
2546 2690
2547 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count; 2691 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2548 rxdr->rx_buffer_info = vmalloc(size); 2692 rx_ring->rx_buffer_info = vmalloc(size);
2549 if (!rxdr->rx_buffer_info) { 2693 if (!rx_ring->rx_buffer_info) {
2550 DPRINTK(PROBE, ERR, 2694 DPRINTK(PROBE, ERR,
2551 "vmalloc allocation failed for the rx desc ring\n"); 2695 "vmalloc allocation failed for the rx desc ring\n");
2552 goto alloc_failed; 2696 goto alloc_failed;
2553 } 2697 }
2554 memset(rxdr->rx_buffer_info, 0, size); 2698 memset(rx_ring->rx_buffer_info, 0, size);
2555 2699
2556 /* Round up to nearest 4K */ 2700 /* Round up to nearest 4K */
2557 rxdr->size = rxdr->count * sizeof(union ixgbe_adv_rx_desc); 2701 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2558 rxdr->size = ALIGN(rxdr->size, 4096); 2702 rx_ring->size = ALIGN(rx_ring->size, 4096);
2559 2703
2560 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); 2704 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2561 2705
2562 if (!rxdr->desc) { 2706 if (!rx_ring->desc) {
2563 DPRINTK(PROBE, ERR, 2707 DPRINTK(PROBE, ERR,
2564 "Memory allocation failed for the rx desc ring\n"); 2708 "Memory allocation failed for the rx desc ring\n");
2565 vfree(rxdr->rx_buffer_info); 2709 vfree(rx_ring->rx_buffer_info);
2566 goto alloc_failed; 2710 goto alloc_failed;
2567 } 2711 }
2568 2712
2569 rxdr->next_to_clean = 0; 2713 rx_ring->next_to_clean = 0;
2570 rxdr->next_to_use = 0; 2714 rx_ring->next_to_use = 0;
2571 2715
2572 return 0; 2716 return 0;
2573 2717
2574alloc_failed: 2718alloc_failed:
2575 vfree(rxdr->lro_mgr.lro_arr); 2719 vfree(rx_ring->lro_mgr.lro_arr);
2576 rxdr->lro_mgr.lro_arr = NULL; 2720 rx_ring->lro_mgr.lro_arr = NULL;
2577 return -ENOMEM; 2721 return -ENOMEM;
2578} 2722}
2579 2723
2580/** 2724/**
2725 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2726 * @adapter: board private structure
2727 *
2728 * If this function returns with an error, then it's possible one or
2729 * more of the rings is populated (while the rest are not). It is the
2730 * callers duty to clean those orphaned rings.
2731 *
2732 * Return 0 on success, negative on failure
2733 **/
2734
2735static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2736{
2737 int i, err = 0;
2738
2739 for (i = 0; i < adapter->num_rx_queues; i++) {
2740 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2741 if (!err)
2742 continue;
2743 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2744 break;
2745 }
2746
2747 return err;
2748}
2749
2750/**
2581 * ixgbe_free_tx_resources - Free Tx Resources per Queue 2751 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2582 * @adapter: board private structure 2752 * @adapter: board private structure
2583 * @tx_ring: Tx descriptor ring for a specific queue 2753 * @tx_ring: Tx descriptor ring for a specific queue
2584 * 2754 *
2585 * Free all transmit software resources 2755 * Free all transmit software resources
2586 **/ 2756 **/
2587static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter, 2757void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2588 struct ixgbe_ring *tx_ring) 2758 struct ixgbe_ring *tx_ring)
2589{ 2759{
2590 struct pci_dev *pdev = adapter->pdev; 2760 struct pci_dev *pdev = adapter->pdev;
2591 2761
@@ -2620,8 +2790,8 @@ static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2620 * 2790 *
2621 * Free all receive software resources 2791 * Free all receive software resources
2622 **/ 2792 **/
2623static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter, 2793void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2624 struct ixgbe_ring *rx_ring) 2794 struct ixgbe_ring *rx_ring)
2625{ 2795{
2626 struct pci_dev *pdev = adapter->pdev; 2796 struct pci_dev *pdev = adapter->pdev;
2627 2797
@@ -2653,59 +2823,6 @@ static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2653} 2823}
2654 2824
2655/** 2825/**
2656 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2657 * @adapter: board private structure
2658 *
2659 * If this function returns with an error, then it's possible one or
2660 * more of the rings is populated (while the rest are not). It is the
2661 * callers duty to clean those orphaned rings.
2662 *
2663 * Return 0 on success, negative on failure
2664 **/
2665static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2666{
2667 int i, err = 0;
2668
2669 for (i = 0; i < adapter->num_tx_queues; i++) {
2670 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2671 if (err) {
2672 DPRINTK(PROBE, ERR,
2673 "Allocation for Tx Queue %u failed\n", i);
2674 break;
2675 }
2676 }
2677
2678 return err;
2679}
2680
2681/**
2682 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2683 * @adapter: board private structure
2684 *
2685 * If this function returns with an error, then it's possible one or
2686 * more of the rings is populated (while the rest are not). It is the
2687 * callers duty to clean those orphaned rings.
2688 *
2689 * Return 0 on success, negative on failure
2690 **/
2691
2692static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2693{
2694 int i, err = 0;
2695
2696 for (i = 0; i < adapter->num_rx_queues; i++) {
2697 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2698 if (err) {
2699 DPRINTK(PROBE, ERR,
2700 "Allocation for Rx Queue %u failed\n", i);
2701 break;
2702 }
2703 }
2704
2705 return err;
2706}
2707
2708/**
2709 * ixgbe_change_mtu - Change the Maximum Transfer Unit 2826 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2710 * @netdev: network interface device structure 2827 * @netdev: network interface device structure
2711 * @new_mtu: new value for maximum frame size 2828 * @new_mtu: new value for maximum frame size
@@ -2717,12 +2834,12 @@ static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2717 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2834 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2718 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 2835 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2719 2836
2720 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) || 2837 /* MTU < 68 is an error and causes problems on some kernels */
2721 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) 2838 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2722 return -EINVAL; 2839 return -EINVAL;
2723 2840
2724 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n", 2841 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2725 netdev->mtu, new_mtu); 2842 netdev->mtu, new_mtu);
2726 /* must set new MTU before calling down or up */ 2843 /* must set new MTU before calling down or up */
2727 netdev->mtu = new_mtu; 2844 netdev->mtu = new_mtu;
2728 2845
@@ -2817,6 +2934,135 @@ static int ixgbe_close(struct net_device *netdev)
2817} 2934}
2818 2935
2819/** 2936/**
2937 * ixgbe_napi_add_all - prep napi structs for use
2938 * @adapter: private struct
2939 * helper function to napi_add each possible q_vector->napi
2940 */
2941static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
2942{
2943 int q_idx, q_vectors;
2944 int (*poll)(struct napi_struct *, int);
2945
2946 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2947 poll = &ixgbe_clean_rxonly;
2948 /* Only enable as many vectors as we have rx queues. */
2949 q_vectors = adapter->num_rx_queues;
2950 } else {
2951 poll = &ixgbe_poll;
2952 /* only one q_vector for legacy modes */
2953 q_vectors = 1;
2954 }
2955
2956 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2957 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
2958 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
2959 }
2960}
2961
2962static void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
2963{
2964 int q_idx;
2965 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2966
2967 /* legacy and MSI only use one vector */
2968 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2969 q_vectors = 1;
2970
2971 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2972 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
2973 if (!q_vector->rxr_count)
2974 continue;
2975 netif_napi_del(&q_vector->napi);
2976 }
2977}
2978
2979#ifdef CONFIG_PM
2980static int ixgbe_resume(struct pci_dev *pdev)
2981{
2982 struct net_device *netdev = pci_get_drvdata(pdev);
2983 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2984 u32 err;
2985
2986 pci_set_power_state(pdev, PCI_D0);
2987 pci_restore_state(pdev);
2988 err = pci_enable_device(pdev);
2989 if (err) {
2990 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
2991 "suspend\n");
2992 return err;
2993 }
2994 pci_set_master(pdev);
2995
2996 pci_enable_wake(pdev, PCI_D3hot, 0);
2997 pci_enable_wake(pdev, PCI_D3cold, 0);
2998
2999 err = ixgbe_init_interrupt_scheme(adapter);
3000 if (err) {
3001 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3002 "device\n");
3003 return err;
3004 }
3005
3006 ixgbe_napi_add_all(adapter);
3007 ixgbe_reset(adapter);
3008
3009 if (netif_running(netdev)) {
3010 err = ixgbe_open(adapter->netdev);
3011 if (err)
3012 return err;
3013 }
3014
3015 netif_device_attach(netdev);
3016
3017 return 0;
3018}
3019
3020#endif /* CONFIG_PM */
3021static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3022{
3023 struct net_device *netdev = pci_get_drvdata(pdev);
3024 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3025#ifdef CONFIG_PM
3026 int retval = 0;
3027#endif
3028
3029 netif_device_detach(netdev);
3030
3031 if (netif_running(netdev)) {
3032 ixgbe_down(adapter);
3033 ixgbe_free_irq(adapter);
3034 ixgbe_free_all_tx_resources(adapter);
3035 ixgbe_free_all_rx_resources(adapter);
3036 }
3037 ixgbe_reset_interrupt_capability(adapter);
3038 ixgbe_napi_del_all(adapter);
3039 kfree(adapter->tx_ring);
3040 kfree(adapter->rx_ring);
3041
3042#ifdef CONFIG_PM
3043 retval = pci_save_state(pdev);
3044 if (retval)
3045 return retval;
3046#endif
3047
3048 pci_enable_wake(pdev, PCI_D3hot, 0);
3049 pci_enable_wake(pdev, PCI_D3cold, 0);
3050
3051 ixgbe_release_hw_control(adapter);
3052
3053 pci_disable_device(pdev);
3054
3055 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3056
3057 return 0;
3058}
3059
3060static void ixgbe_shutdown(struct pci_dev *pdev)
3061{
3062 ixgbe_suspend(pdev, PMSG_SUSPEND);
3063}
3064
3065/**
2820 * ixgbe_update_stats - Update the board statistics counters. 3066 * ixgbe_update_stats - Update the board statistics counters.
2821 * @adapter: board private structure 3067 * @adapter: board private structure
2822 **/ 3068 **/
@@ -2889,7 +3135,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2889 3135
2890 /* Rx Errors */ 3136 /* Rx Errors */
2891 adapter->net_stats.rx_errors = adapter->stats.crcerrs + 3137 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2892 adapter->stats.rlec; 3138 adapter->stats.rlec;
2893 adapter->net_stats.rx_dropped = 0; 3139 adapter->net_stats.rx_dropped = 0;
2894 adapter->net_stats.rx_length_errors = adapter->stats.rlec; 3140 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2895 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; 3141 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
@@ -2903,27 +3149,74 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2903static void ixgbe_watchdog(unsigned long data) 3149static void ixgbe_watchdog(unsigned long data)
2904{ 3150{
2905 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; 3151 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2906 struct net_device *netdev = adapter->netdev; 3152 struct ixgbe_hw *hw = &adapter->hw;
2907 bool link_up; 3153
2908 u32 link_speed = 0; 3154 /* Do the watchdog outside of interrupt context due to the lovely
3155 * delays that some of the newer hardware requires */
3156 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3157 /* Cause software interrupt to ensure rx rings are cleaned */
3158 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3159 u32 eics =
3160 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3161 IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3162 } else {
3163 /* For legacy and MSI interrupts don't set any bits that
3164 * are enabled for EIAM, because this operation would
3165 * set *both* EIMS and EICS for any bit in EIAM */
3166 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3167 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3168 }
3169 /* Reset the timer */
3170 mod_timer(&adapter->watchdog_timer,
3171 round_jiffies(jiffies + 2 * HZ));
3172 }
2909 3173
2910 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up); 3174 schedule_work(&adapter->watchdog_task);
3175}
3176
3177/**
3178 * ixgbe_watchdog_task - worker thread to bring link up
3179 * @work: pointer to work_struct containing our data
3180 **/
3181static void ixgbe_watchdog_task(struct work_struct *work)
3182{
3183 struct ixgbe_adapter *adapter = container_of(work,
3184 struct ixgbe_adapter,
3185 watchdog_task);
3186 struct net_device *netdev = adapter->netdev;
3187 struct ixgbe_hw *hw = &adapter->hw;
3188 u32 link_speed = adapter->link_speed;
3189 bool link_up = adapter->link_up;
3190
3191 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3192
3193 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3194 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3195 if (link_up ||
3196 time_after(jiffies, (adapter->link_check_timeout +
3197 IXGBE_TRY_LINK_TIMEOUT))) {
3198 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3199 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3200 }
3201 adapter->link_up = link_up;
3202 adapter->link_speed = link_speed;
3203 }
2911 3204
2912 if (link_up) { 3205 if (link_up) {
2913 if (!netif_carrier_ok(netdev)) { 3206 if (!netif_carrier_ok(netdev)) {
2914 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 3207 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
2915 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS); 3208 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
2916#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE) 3209#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2917#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X) 3210#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2918 DPRINTK(LINK, INFO, "NIC Link is Up %s, " 3211 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2919 "Flow Control: %s\n", 3212 "Flow Control: %s\n",
2920 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ? 3213 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2921 "10 Gbps" : 3214 "10 Gbps" :
2922 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ? 3215 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2923 "1 Gbps" : "unknown speed")), 3216 "1 Gbps" : "unknown speed")),
2924 ((FLOW_RX && FLOW_TX) ? "RX/TX" : 3217 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2925 (FLOW_RX ? "RX" : 3218 (FLOW_RX ? "RX" :
2926 (FLOW_TX ? "TX" : "None")))); 3219 (FLOW_TX ? "TX" : "None"))));
2927 3220
2928 netif_carrier_on(netdev); 3221 netif_carrier_on(netdev);
2929 netif_tx_wake_all_queues(netdev); 3222 netif_tx_wake_all_queues(netdev);
@@ -2932,6 +3225,8 @@ static void ixgbe_watchdog(unsigned long data)
2932 adapter->detect_tx_hung = true; 3225 adapter->detect_tx_hung = true;
2933 } 3226 }
2934 } else { 3227 } else {
3228 adapter->link_up = false;
3229 adapter->link_speed = 0;
2935 if (netif_carrier_ok(netdev)) { 3230 if (netif_carrier_ok(netdev)) {
2936 DPRINTK(LINK, INFO, "NIC Link is Down\n"); 3231 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2937 netif_carrier_off(netdev); 3232 netif_carrier_off(netdev);
@@ -2940,36 +3235,19 @@ static void ixgbe_watchdog(unsigned long data)
2940 } 3235 }
2941 3236
2942 ixgbe_update_stats(adapter); 3237 ixgbe_update_stats(adapter);
2943 3238 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2944 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2945 /* Cause software interrupt to ensure rx rings are cleaned */
2946 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2947 u32 eics =
2948 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2949 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2950 } else {
2951 /* for legacy and MSI interrupts don't set any bits that
2952 * are enabled for EIAM, because this operation would
2953 * set *both* EIMS and EICS for any bit in EIAM */
2954 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2955 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2956 }
2957 /* Reset the timer */
2958 mod_timer(&adapter->watchdog_timer,
2959 round_jiffies(jiffies + 2 * HZ));
2960 }
2961} 3239}
2962 3240
2963static int ixgbe_tso(struct ixgbe_adapter *adapter, 3241static int ixgbe_tso(struct ixgbe_adapter *adapter,
2964 struct ixgbe_ring *tx_ring, struct sk_buff *skb, 3242 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2965 u32 tx_flags, u8 *hdr_len) 3243 u32 tx_flags, u8 *hdr_len)
2966{ 3244{
2967 struct ixgbe_adv_tx_context_desc *context_desc; 3245 struct ixgbe_adv_tx_context_desc *context_desc;
2968 unsigned int i; 3246 unsigned int i;
2969 int err; 3247 int err;
2970 struct ixgbe_tx_buffer *tx_buffer_info; 3248 struct ixgbe_tx_buffer *tx_buffer_info;
2971 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; 3249 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2972 u32 mss_l4len_idx = 0, l4len; 3250 u32 mss_l4len_idx, l4len;
2973 3251
2974 if (skb_is_gso(skb)) { 3252 if (skb_is_gso(skb)) {
2975 if (skb_header_cloned(skb)) { 3253 if (skb_header_cloned(skb)) {
@@ -2985,16 +3263,16 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
2985 iph->tot_len = 0; 3263 iph->tot_len = 0;
2986 iph->check = 0; 3264 iph->check = 0;
2987 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, 3265 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2988 iph->daddr, 0, 3266 iph->daddr, 0,
2989 IPPROTO_TCP, 3267 IPPROTO_TCP,
2990 0); 3268 0);
2991 adapter->hw_tso_ctxt++; 3269 adapter->hw_tso_ctxt++;
2992 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { 3270 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2993 ipv6_hdr(skb)->payload_len = 0; 3271 ipv6_hdr(skb)->payload_len = 0;
2994 tcp_hdr(skb)->check = 3272 tcp_hdr(skb)->check =
2995 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 3273 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2996 &ipv6_hdr(skb)->daddr, 3274 &ipv6_hdr(skb)->daddr,
2997 0, IPPROTO_TCP, 0); 3275 0, IPPROTO_TCP, 0);
2998 adapter->hw_tso6_ctxt++; 3276 adapter->hw_tso6_ctxt++;
2999 } 3277 }
3000 3278
@@ -3008,7 +3286,7 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
3008 vlan_macip_lens |= 3286 vlan_macip_lens |=
3009 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); 3287 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3010 vlan_macip_lens |= ((skb_network_offset(skb)) << 3288 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3011 IXGBE_ADVTXD_MACLEN_SHIFT); 3289 IXGBE_ADVTXD_MACLEN_SHIFT);
3012 *hdr_len += skb_network_offset(skb); 3290 *hdr_len += skb_network_offset(skb);
3013 vlan_macip_lens |= 3291 vlan_macip_lens |=
3014 (skb_transport_header(skb) - skb_network_header(skb)); 3292 (skb_transport_header(skb) - skb_network_header(skb));
@@ -3018,8 +3296,8 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
3018 context_desc->seqnum_seed = 0; 3296 context_desc->seqnum_seed = 0;
3019 3297
3020 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 3298 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3021 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | 3299 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3022 IXGBE_ADVTXD_DTYP_CTXT); 3300 IXGBE_ADVTXD_DTYP_CTXT);
3023 3301
3024 if (skb->protocol == htons(ETH_P_IP)) 3302 if (skb->protocol == htons(ETH_P_IP))
3025 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 3303 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
@@ -3027,9 +3305,11 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
3027 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 3305 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3028 3306
3029 /* MSS L4LEN IDX */ 3307 /* MSS L4LEN IDX */
3030 mss_l4len_idx |= 3308 mss_l4len_idx =
3031 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT); 3309 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3032 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT); 3310 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3311 /* use index 1 for TSO */
3312 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3033 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); 3313 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3034 3314
3035 tx_buffer_info->time_stamp = jiffies; 3315 tx_buffer_info->time_stamp = jiffies;
@@ -3046,8 +3326,8 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
3046} 3326}
3047 3327
3048static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, 3328static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3049 struct ixgbe_ring *tx_ring, 3329 struct ixgbe_ring *tx_ring,
3050 struct sk_buff *skb, u32 tx_flags) 3330 struct sk_buff *skb, u32 tx_flags)
3051{ 3331{
3052 struct ixgbe_adv_tx_context_desc *context_desc; 3332 struct ixgbe_adv_tx_context_desc *context_desc;
3053 unsigned int i; 3333 unsigned int i;
@@ -3064,16 +3344,16 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3064 vlan_macip_lens |= 3344 vlan_macip_lens |=
3065 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); 3345 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3066 vlan_macip_lens |= (skb_network_offset(skb) << 3346 vlan_macip_lens |= (skb_network_offset(skb) <<
3067 IXGBE_ADVTXD_MACLEN_SHIFT); 3347 IXGBE_ADVTXD_MACLEN_SHIFT);
3068 if (skb->ip_summed == CHECKSUM_PARTIAL) 3348 if (skb->ip_summed == CHECKSUM_PARTIAL)
3069 vlan_macip_lens |= (skb_transport_header(skb) - 3349 vlan_macip_lens |= (skb_transport_header(skb) -
3070 skb_network_header(skb)); 3350 skb_network_header(skb));
3071 3351
3072 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 3352 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3073 context_desc->seqnum_seed = 0; 3353 context_desc->seqnum_seed = 0;
3074 3354
3075 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | 3355 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3076 IXGBE_ADVTXD_DTYP_CTXT); 3356 IXGBE_ADVTXD_DTYP_CTXT);
3077 3357
3078 if (skb->ip_summed == CHECKSUM_PARTIAL) { 3358 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3079 switch (skb->protocol) { 3359 switch (skb->protocol) {
@@ -3081,16 +3361,14 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3081 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 3361 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3082 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 3362 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3083 type_tucmd_mlhl |= 3363 type_tucmd_mlhl |=
3084 IXGBE_ADVTXD_TUCMD_L4T_TCP; 3364 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3085 break; 3365 break;
3086
3087 case __constant_htons(ETH_P_IPV6): 3366 case __constant_htons(ETH_P_IPV6):
3088 /* XXX what about other V6 headers?? */ 3367 /* XXX what about other V6 headers?? */
3089 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 3368 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3090 type_tucmd_mlhl |= 3369 type_tucmd_mlhl |=
3091 IXGBE_ADVTXD_TUCMD_L4T_TCP; 3370 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3092 break; 3371 break;
3093
3094 default: 3372 default:
3095 if (unlikely(net_ratelimit())) { 3373 if (unlikely(net_ratelimit())) {
3096 DPRINTK(PROBE, WARNING, 3374 DPRINTK(PROBE, WARNING,
@@ -3102,10 +3380,12 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3102 } 3380 }
3103 3381
3104 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 3382 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3383 /* use index zero for tx checksum offload */
3105 context_desc->mss_l4len_idx = 0; 3384 context_desc->mss_l4len_idx = 0;
3106 3385
3107 tx_buffer_info->time_stamp = jiffies; 3386 tx_buffer_info->time_stamp = jiffies;
3108 tx_buffer_info->next_to_watch = i; 3387 tx_buffer_info->next_to_watch = i;
3388
3109 adapter->hw_csum_tx_good++; 3389 adapter->hw_csum_tx_good++;
3110 i++; 3390 i++;
3111 if (i == tx_ring->count) 3391 if (i == tx_ring->count)
@@ -3114,12 +3394,13 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3114 3394
3115 return true; 3395 return true;
3116 } 3396 }
3397
3117 return false; 3398 return false;
3118} 3399}
3119 3400
3120static int ixgbe_tx_map(struct ixgbe_adapter *adapter, 3401static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3121 struct ixgbe_ring *tx_ring, 3402 struct ixgbe_ring *tx_ring,
3122 struct sk_buff *skb, unsigned int first) 3403 struct sk_buff *skb, unsigned int first)
3123{ 3404{
3124 struct ixgbe_tx_buffer *tx_buffer_info; 3405 struct ixgbe_tx_buffer *tx_buffer_info;
3125 unsigned int len = skb->len; 3406 unsigned int len = skb->len;
@@ -3137,8 +3418,8 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3137 3418
3138 tx_buffer_info->length = size; 3419 tx_buffer_info->length = size;
3139 tx_buffer_info->dma = pci_map_single(adapter->pdev, 3420 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3140 skb->data + offset, 3421 skb->data + offset,
3141 size, PCI_DMA_TODEVICE); 3422 size, PCI_DMA_TODEVICE);
3142 tx_buffer_info->time_stamp = jiffies; 3423 tx_buffer_info->time_stamp = jiffies;
3143 tx_buffer_info->next_to_watch = i; 3424 tx_buffer_info->next_to_watch = i;
3144 3425
@@ -3163,9 +3444,10 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3163 3444
3164 tx_buffer_info->length = size; 3445 tx_buffer_info->length = size;
3165 tx_buffer_info->dma = pci_map_page(adapter->pdev, 3446 tx_buffer_info->dma = pci_map_page(adapter->pdev,
3166 frag->page, 3447 frag->page,
3167 offset, 3448 offset,
3168 size, PCI_DMA_TODEVICE); 3449 size,
3450 PCI_DMA_TODEVICE);
3169 tx_buffer_info->time_stamp = jiffies; 3451 tx_buffer_info->time_stamp = jiffies;
3170 tx_buffer_info->next_to_watch = i; 3452 tx_buffer_info->next_to_watch = i;
3171 3453
@@ -3188,8 +3470,8 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3188} 3470}
3189 3471
3190static void ixgbe_tx_queue(struct ixgbe_adapter *adapter, 3472static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3191 struct ixgbe_ring *tx_ring, 3473 struct ixgbe_ring *tx_ring,
3192 int tx_flags, int count, u32 paylen, u8 hdr_len) 3474 int tx_flags, int count, u32 paylen, u8 hdr_len)
3193{ 3475{
3194 union ixgbe_adv_tx_desc *tx_desc = NULL; 3476 union ixgbe_adv_tx_desc *tx_desc = NULL;
3195 struct ixgbe_tx_buffer *tx_buffer_info; 3477 struct ixgbe_tx_buffer *tx_buffer_info;
@@ -3208,15 +3490,17 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3208 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE; 3490 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3209 3491
3210 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3492 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3211 IXGBE_ADVTXD_POPTS_SHIFT; 3493 IXGBE_ADVTXD_POPTS_SHIFT;
3212 3494
3495 /* use index 1 context for tso */
3496 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3213 if (tx_flags & IXGBE_TX_FLAGS_IPV4) 3497 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3214 olinfo_status |= IXGBE_TXD_POPTS_IXSM << 3498 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3215 IXGBE_ADVTXD_POPTS_SHIFT; 3499 IXGBE_ADVTXD_POPTS_SHIFT;
3216 3500
3217 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM) 3501 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3218 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3502 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3219 IXGBE_ADVTXD_POPTS_SHIFT; 3503 IXGBE_ADVTXD_POPTS_SHIFT;
3220 3504
3221 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); 3505 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3222 3506
@@ -3226,9 +3510,8 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3226 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 3510 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3227 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma); 3511 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3228 tx_desc->read.cmd_type_len = 3512 tx_desc->read.cmd_type_len =
3229 cpu_to_le32(cmd_type_len | tx_buffer_info->length); 3513 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3230 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 3514 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3231
3232 i++; 3515 i++;
3233 if (i == tx_ring->count) 3516 if (i == tx_ring->count)
3234 i = 0; 3517 i = 0;
@@ -3249,7 +3532,7 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3249} 3532}
3250 3533
3251static int __ixgbe_maybe_stop_tx(struct net_device *netdev, 3534static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3252 struct ixgbe_ring *tx_ring, int size) 3535 struct ixgbe_ring *tx_ring, int size)
3253{ 3536{
3254 struct ixgbe_adapter *adapter = netdev_priv(netdev); 3537 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3255 3538
@@ -3265,61 +3548,52 @@ static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3265 return -EBUSY; 3548 return -EBUSY;
3266 3549
3267 /* A reprieve! - use start_queue because it doesn't call schedule */ 3550 /* A reprieve! - use start_queue because it doesn't call schedule */
3268 netif_wake_subqueue(netdev, tx_ring->queue_index); 3551 netif_start_subqueue(netdev, tx_ring->queue_index);
3269 ++adapter->restart_queue; 3552 ++adapter->restart_queue;
3270 return 0; 3553 return 0;
3271} 3554}
3272 3555
3273static int ixgbe_maybe_stop_tx(struct net_device *netdev, 3556static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3274 struct ixgbe_ring *tx_ring, int size) 3557 struct ixgbe_ring *tx_ring, int size)
3275{ 3558{
3276 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size)) 3559 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3277 return 0; 3560 return 0;
3278 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size); 3561 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3279} 3562}
3280 3563
3281
3282static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 3564static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3283{ 3565{
3284 struct ixgbe_adapter *adapter = netdev_priv(netdev); 3566 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3285 struct ixgbe_ring *tx_ring; 3567 struct ixgbe_ring *tx_ring;
3286 unsigned int len = skb->len;
3287 unsigned int first; 3568 unsigned int first;
3288 unsigned int tx_flags = 0; 3569 unsigned int tx_flags = 0;
3289 u8 hdr_len = 0; 3570 u8 hdr_len = 0;
3290 int r_idx = 0, tso; 3571 int r_idx = 0, tso;
3291 unsigned int mss = 0;
3292 int count = 0; 3572 int count = 0;
3293 unsigned int f; 3573 unsigned int f;
3294 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 3574
3295 len -= skb->data_len;
3296 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping; 3575 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3297 tx_ring = &adapter->tx_ring[r_idx]; 3576 tx_ring = &adapter->tx_ring[r_idx];
3298 3577
3299 3578 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3300 if (skb->len <= 0) { 3579 tx_flags |= vlan_tx_tag_get(skb);
3301 dev_kfree_skb(skb); 3580 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3302 return NETDEV_TX_OK; 3581 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3303 } 3582 }
3304 mss = skb_shinfo(skb)->gso_size; 3583 /* three things can cause us to need a context descriptor */
3305 3584 if (skb_is_gso(skb) ||
3306 if (mss) 3585 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3307 count++; 3586 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3308 else if (skb->ip_summed == CHECKSUM_PARTIAL)
3309 count++; 3587 count++;
3310 3588
3311 count += TXD_USE_COUNT(len); 3589 count += TXD_USE_COUNT(skb_headlen(skb));
3312 for (f = 0; f < nr_frags; f++) 3590 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3313 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); 3591 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3314 3592
3315 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) { 3593 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3316 adapter->tx_busy++; 3594 adapter->tx_busy++;
3317 return NETDEV_TX_BUSY; 3595 return NETDEV_TX_BUSY;
3318 } 3596 }
3319 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3320 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3321 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3322 }
3323 3597
3324 if (skb->protocol == htons(ETH_P_IP)) 3598 if (skb->protocol == htons(ETH_P_IP))
3325 tx_flags |= IXGBE_TX_FLAGS_IPV4; 3599 tx_flags |= IXGBE_TX_FLAGS_IPV4;
@@ -3333,12 +3607,12 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3333 if (tso) 3607 if (tso)
3334 tx_flags |= IXGBE_TX_FLAGS_TSO; 3608 tx_flags |= IXGBE_TX_FLAGS_TSO;
3335 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) && 3609 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3336 (skb->ip_summed == CHECKSUM_PARTIAL)) 3610 (skb->ip_summed == CHECKSUM_PARTIAL))
3337 tx_flags |= IXGBE_TX_FLAGS_CSUM; 3611 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3338 3612
3339 ixgbe_tx_queue(adapter, tx_ring, tx_flags, 3613 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3340 ixgbe_tx_map(adapter, tx_ring, skb, first), 3614 ixgbe_tx_map(adapter, tx_ring, skb, first),
3341 skb->len, hdr_len); 3615 skb->len, hdr_len);
3342 3616
3343 netdev->trans_start = jiffies; 3617 netdev->trans_start = jiffies;
3344 3618
@@ -3372,15 +3646,16 @@ static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3372static int ixgbe_set_mac(struct net_device *netdev, void *p) 3646static int ixgbe_set_mac(struct net_device *netdev, void *p)
3373{ 3647{
3374 struct ixgbe_adapter *adapter = netdev_priv(netdev); 3648 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3649 struct ixgbe_hw *hw = &adapter->hw;
3375 struct sockaddr *addr = p; 3650 struct sockaddr *addr = p;
3376 3651
3377 if (!is_valid_ether_addr(addr->sa_data)) 3652 if (!is_valid_ether_addr(addr->sa_data))
3378 return -EADDRNOTAVAIL; 3653 return -EADDRNOTAVAIL;
3379 3654
3380 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3655 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3381 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3656 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3382 3657
3383 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 3658 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3384 3659
3385 return 0; 3660 return 0;
3386} 3661}
@@ -3404,28 +3679,19 @@ static void ixgbe_netpoll(struct net_device *netdev)
3404#endif 3679#endif
3405 3680
3406/** 3681/**
3407 * ixgbe_napi_add_all - prep napi structs for use 3682 * ixgbe_link_config - set up initial link with default speed and duplex
3408 * @adapter: private struct 3683 * @hw: pointer to private hardware struct
3409 * helper function to napi_add each possible q_vector->napi 3684 *
3410 */ 3685 * Returns 0 on success, negative on failure
3411static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter) 3686 **/
3687static int ixgbe_link_config(struct ixgbe_hw *hw)
3412{ 3688{
3413 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 3689 u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3414 int (*poll)(struct napi_struct *, int);
3415 3690
3416 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3691 /* must always autoneg for both 1G and 10G link */
3417 poll = &ixgbe_clean_rxonly; 3692 hw->mac.autoneg = true;
3418 } else {
3419 poll = &ixgbe_poll;
3420 /* only one q_vector for legacy modes */
3421 q_vectors = 1;
3422 }
3423 3693
3424 for (i = 0; i < q_vectors; i++) { 3694 return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3425 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3426 netif_napi_add(adapter->netdev, &q_vector->napi,
3427 (*poll), 64);
3428 }
3429} 3695}
3430 3696
3431/** 3697/**
@@ -3440,17 +3706,16 @@ static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3440 * and a hardware reset occur. 3706 * and a hardware reset occur.
3441 **/ 3707 **/
3442static int __devinit ixgbe_probe(struct pci_dev *pdev, 3708static int __devinit ixgbe_probe(struct pci_dev *pdev,
3443 const struct pci_device_id *ent) 3709 const struct pci_device_id *ent)
3444{ 3710{
3445 struct net_device *netdev; 3711 struct net_device *netdev;
3446 struct ixgbe_adapter *adapter = NULL; 3712 struct ixgbe_adapter *adapter = NULL;
3447 struct ixgbe_hw *hw; 3713 struct ixgbe_hw *hw;
3448 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data]; 3714 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3449 unsigned long mmio_start, mmio_len;
3450 static int cards_found; 3715 static int cards_found;
3451 int i, err, pci_using_dac; 3716 int i, err, pci_using_dac;
3452 u16 link_status, link_speed, link_width; 3717 u16 link_status, link_speed, link_width;
3453 u32 part_num; 3718 u32 part_num, eec;
3454 3719
3455 err = pci_enable_device(pdev); 3720 err = pci_enable_device(pdev);
3456 if (err) 3721 if (err)
@@ -3465,7 +3730,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3465 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 3730 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3466 if (err) { 3731 if (err) {
3467 dev_err(&pdev->dev, "No usable DMA " 3732 dev_err(&pdev->dev, "No usable DMA "
3468 "configuration, aborting\n"); 3733 "configuration, aborting\n");
3469 goto err_dma; 3734 goto err_dma;
3470 } 3735 }
3471 } 3736 }
@@ -3498,10 +3763,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3498 hw->back = adapter; 3763 hw->back = adapter;
3499 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1; 3764 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3500 3765
3501 mmio_start = pci_resource_start(pdev, 0); 3766 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3502 mmio_len = pci_resource_len(pdev, 0); 3767 pci_resource_len(pdev, 0));
3503
3504 hw->hw_addr = ioremap(mmio_start, mmio_len);
3505 if (!hw->hw_addr) { 3768 if (!hw->hw_addr) {
3506 err = -EIO; 3769 err = -EIO;
3507 goto err_ioremap; 3770 goto err_ioremap;
@@ -3516,7 +3779,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3516 netdev->stop = &ixgbe_close; 3779 netdev->stop = &ixgbe_close;
3517 netdev->hard_start_xmit = &ixgbe_xmit_frame; 3780 netdev->hard_start_xmit = &ixgbe_xmit_frame;
3518 netdev->get_stats = &ixgbe_get_stats; 3781 netdev->get_stats = &ixgbe_get_stats;
3519 netdev->set_multicast_list = &ixgbe_set_multi; 3782 netdev->set_rx_mode = &ixgbe_set_rx_mode;
3783 netdev->set_multicast_list = &ixgbe_set_rx_mode;
3520 netdev->set_mac_address = &ixgbe_set_mac; 3784 netdev->set_mac_address = &ixgbe_set_mac;
3521 netdev->change_mtu = &ixgbe_change_mtu; 3785 netdev->change_mtu = &ixgbe_change_mtu;
3522 ixgbe_set_ethtool_ops(netdev); 3786 ixgbe_set_ethtool_ops(netdev);
@@ -3530,22 +3794,23 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3530#endif 3794#endif
3531 strcpy(netdev->name, pci_name(pdev)); 3795 strcpy(netdev->name, pci_name(pdev));
3532 3796
3533 netdev->mem_start = mmio_start;
3534 netdev->mem_end = mmio_start + mmio_len;
3535
3536 adapter->bd_number = cards_found; 3797 adapter->bd_number = cards_found;
3537 3798
3538 /* PCI config space info */
3539 hw->vendor_id = pdev->vendor;
3540 hw->device_id = pdev->device;
3541 hw->revision_id = pdev->revision;
3542 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3543 hw->subsystem_device_id = pdev->subsystem_device;
3544
3545 /* Setup hw api */ 3799 /* Setup hw api */
3546 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 3800 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3547 hw->mac.type = ii->mac; 3801 hw->mac.type = ii->mac;
3548 3802
3803 /* EEPROM */
3804 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
3805 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
3806 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3807 if (!(eec & (1 << 8)))
3808 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
3809
3810 /* PHY */
3811 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
3812 /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3813
3549 err = ii->get_invariants(hw); 3814 err = ii->get_invariants(hw);
3550 if (err) 3815 if (err)
3551 goto err_hw_init; 3816 goto err_hw_init;
@@ -3555,26 +3820,34 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3555 if (err) 3820 if (err)
3556 goto err_sw_init; 3821 goto err_sw_init;
3557 3822
3823 /* reset_hw fills in the perm_addr as well */
3824 err = hw->mac.ops.reset_hw(hw);
3825 if (err) {
3826 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
3827 goto err_sw_init;
3828 }
3829
3558 netdev->features = NETIF_F_SG | 3830 netdev->features = NETIF_F_SG |
3559 NETIF_F_HW_CSUM | 3831 NETIF_F_IP_CSUM |
3560 NETIF_F_HW_VLAN_TX | 3832 NETIF_F_HW_VLAN_TX |
3561 NETIF_F_HW_VLAN_RX | 3833 NETIF_F_HW_VLAN_RX |
3562 NETIF_F_HW_VLAN_FILTER; 3834 NETIF_F_HW_VLAN_FILTER;
3563 3835
3564 netdev->features |= NETIF_F_LRO; 3836 netdev->features |= NETIF_F_IPV6_CSUM;
3565 netdev->features |= NETIF_F_TSO; 3837 netdev->features |= NETIF_F_TSO;
3566 netdev->features |= NETIF_F_TSO6; 3838 netdev->features |= NETIF_F_TSO6;
3839 netdev->features |= NETIF_F_LRO;
3567 3840
3568 netdev->vlan_features |= NETIF_F_TSO; 3841 netdev->vlan_features |= NETIF_F_TSO;
3569 netdev->vlan_features |= NETIF_F_TSO6; 3842 netdev->vlan_features |= NETIF_F_TSO6;
3570 netdev->vlan_features |= NETIF_F_HW_CSUM; 3843 netdev->vlan_features |= NETIF_F_IP_CSUM;
3571 netdev->vlan_features |= NETIF_F_SG; 3844 netdev->vlan_features |= NETIF_F_SG;
3572 3845
3573 if (pci_using_dac) 3846 if (pci_using_dac)
3574 netdev->features |= NETIF_F_HIGHDMA; 3847 netdev->features |= NETIF_F_HIGHDMA;
3575 3848
3576 /* make sure the EEPROM is good */ 3849 /* make sure the EEPROM is good */
3577 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) { 3850 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
3578 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); 3851 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3579 err = -EIO; 3852 err = -EIO;
3580 goto err_eeprom; 3853 goto err_eeprom;
@@ -3583,7 +3856,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3583 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len); 3856 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3584 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len); 3857 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3585 3858
3586 if (ixgbe_validate_mac_addr(netdev->dev_addr)) { 3859 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
3860 dev_err(&pdev->dev, "invalid MAC address\n");
3587 err = -EIO; 3861 err = -EIO;
3588 goto err_eeprom; 3862 goto err_eeprom;
3589 } 3863 }
@@ -3593,13 +3867,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3593 adapter->watchdog_timer.data = (unsigned long)adapter; 3867 adapter->watchdog_timer.data = (unsigned long)adapter;
3594 3868
3595 INIT_WORK(&adapter->reset_task, ixgbe_reset_task); 3869 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3596 3870 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
3597 /* initialize default flow control settings */
3598 hw->fc.original_type = ixgbe_fc_full;
3599 hw->fc.type = ixgbe_fc_full;
3600 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3601 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3602 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3603 3871
3604 err = ixgbe_init_interrupt_scheme(adapter); 3872 err = ixgbe_init_interrupt_scheme(adapter);
3605 if (err) 3873 if (err)
@@ -3610,32 +3878,39 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3610 link_speed = link_status & IXGBE_PCI_LINK_SPEED; 3878 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3611 link_width = link_status & IXGBE_PCI_LINK_WIDTH; 3879 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3612 dev_info(&pdev->dev, "(PCI Express:%s:%s) " 3880 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3613 "%02x:%02x:%02x:%02x:%02x:%02x\n", 3881 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3614 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" : 3882 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3615 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" : 3883 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3616 "Unknown"), 3884 "Unknown"),
3617 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" : 3885 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3618 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" : 3886 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3619 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" : 3887 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3620 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" : 3888 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3621 "Unknown"), 3889 "Unknown"),
3622 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], 3890 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3623 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]); 3891 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3624 ixgbe_read_part_num(hw, &part_num); 3892 ixgbe_read_pba_num_generic(hw, &part_num);
3625 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n", 3893 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3626 hw->mac.type, hw->phy.type, 3894 hw->mac.type, hw->phy.type,
3627 (part_num >> 8), (part_num & 0xff)); 3895 (part_num >> 8), (part_num & 0xff));
3628 3896
3629 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) { 3897 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3630 dev_warn(&pdev->dev, "PCI-Express bandwidth available for " 3898 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3631 "this card is not sufficient for optimal " 3899 "this card is not sufficient for optimal "
3632 "performance.\n"); 3900 "performance.\n");
3633 dev_warn(&pdev->dev, "For optimal performance a x8 " 3901 dev_warn(&pdev->dev, "For optimal performance a x8 "
3634 "PCI-Express slot is required.\n"); 3902 "PCI-Express slot is required.\n");
3635 } 3903 }
3636 3904
3637 /* reset the hardware with the new settings */ 3905 /* reset the hardware with the new settings */
3638 ixgbe_start_hw(hw); 3906 hw->mac.ops.start_hw(hw);
3907
3908 /* link_config depends on start_hw being called at least once */
3909 err = ixgbe_link_config(hw);
3910 if (err) {
3911 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
3912 goto err_register;
3913 }
3639 3914
3640 netif_carrier_off(netdev); 3915 netif_carrier_off(netdev);
3641 netif_tx_stop_all_queues(netdev); 3916 netif_tx_stop_all_queues(netdev);
@@ -3647,7 +3922,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3647 if (err) 3922 if (err)
3648 goto err_register; 3923 goto err_register;
3649 3924
3650#ifdef CONFIG_DCA 3925#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3651 if (dca_add_requester(&pdev->dev) == 0) { 3926 if (dca_add_requester(&pdev->dev) == 0) {
3652 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 3927 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3653 /* always use CB2 mode, difference is masked 3928 /* always use CB2 mode, difference is masked
@@ -3697,7 +3972,7 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)
3697 3972
3698 flush_scheduled_work(); 3973 flush_scheduled_work();
3699 3974
3700#ifdef CONFIG_DCA 3975#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3701 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { 3976 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3702 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; 3977 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3703 dca_remove_requester(&pdev->dev); 3978 dca_remove_requester(&pdev->dev);
@@ -3715,6 +3990,7 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)
3715 pci_release_regions(pdev); 3990 pci_release_regions(pdev);
3716 3991
3717 DPRINTK(PROBE, INFO, "complete\n"); 3992 DPRINTK(PROBE, INFO, "complete\n");
3993 ixgbe_napi_del_all(adapter);
3718 kfree(adapter->tx_ring); 3994 kfree(adapter->tx_ring);
3719 kfree(adapter->rx_ring); 3995 kfree(adapter->rx_ring);
3720 3996
@@ -3732,7 +4008,7 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)
3732 * this device has been detected. 4008 * this device has been detected.
3733 */ 4009 */
3734static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, 4010static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3735 pci_channel_state_t state) 4011 pci_channel_state_t state)
3736{ 4012{
3737 struct net_device *netdev = pci_get_drvdata(pdev); 4013 struct net_device *netdev = pci_get_drvdata(pdev);
3738 struct ixgbe_adapter *adapter = netdev->priv; 4014 struct ixgbe_adapter *adapter = netdev->priv;
@@ -3743,7 +4019,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3743 ixgbe_down(adapter); 4019 ixgbe_down(adapter);
3744 pci_disable_device(pdev); 4020 pci_disable_device(pdev);
3745 4021
3746 /* Request a slot slot reset. */ 4022 /* Request a slot reset. */
3747 return PCI_ERS_RESULT_NEED_RESET; 4023 return PCI_ERS_RESULT_NEED_RESET;
3748} 4024}
3749 4025
@@ -3760,7 +4036,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3760 4036
3761 if (pci_enable_device(pdev)) { 4037 if (pci_enable_device(pdev)) {
3762 DPRINTK(PROBE, ERR, 4038 DPRINTK(PROBE, ERR,
3763 "Cannot re-enable PCI device after reset.\n"); 4039 "Cannot re-enable PCI device after reset.\n");
3764 return PCI_ERS_RESULT_DISCONNECT; 4040 return PCI_ERS_RESULT_DISCONNECT;
3765 } 4041 }
3766 pci_set_master(pdev); 4042 pci_set_master(pdev);
@@ -3794,7 +4070,6 @@ static void ixgbe_io_resume(struct pci_dev *pdev)
3794 } 4070 }
3795 4071
3796 netif_device_attach(netdev); 4072 netif_device_attach(netdev);
3797
3798} 4073}
3799 4074
3800static struct pci_error_handlers ixgbe_err_handler = { 4075static struct pci_error_handlers ixgbe_err_handler = {
@@ -3830,13 +4105,14 @@ static int __init ixgbe_init_module(void)
3830 4105
3831 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright); 4106 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3832 4107
3833#ifdef CONFIG_DCA 4108#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3834 dca_register_notify(&dca_notifier); 4109 dca_register_notify(&dca_notifier);
3835 4110
3836#endif 4111#endif
3837 ret = pci_register_driver(&ixgbe_driver); 4112 ret = pci_register_driver(&ixgbe_driver);
3838 return ret; 4113 return ret;
3839} 4114}
4115
3840module_init(ixgbe_init_module); 4116module_init(ixgbe_init_module);
3841 4117
3842/** 4118/**
@@ -3847,24 +4123,24 @@ module_init(ixgbe_init_module);
3847 **/ 4123 **/
3848static void __exit ixgbe_exit_module(void) 4124static void __exit ixgbe_exit_module(void)
3849{ 4125{
3850#ifdef CONFIG_DCA 4126#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3851 dca_unregister_notify(&dca_notifier); 4127 dca_unregister_notify(&dca_notifier);
3852#endif 4128#endif
3853 pci_unregister_driver(&ixgbe_driver); 4129 pci_unregister_driver(&ixgbe_driver);
3854} 4130}
3855 4131
3856#ifdef CONFIG_DCA 4132#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3857static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, 4133static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3858 void *p) 4134 void *p)
3859{ 4135{
3860 int ret_val; 4136 int ret_val;
3861 4137
3862 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event, 4138 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3863 __ixgbe_notify_dca); 4139 __ixgbe_notify_dca);
3864 4140
3865 return ret_val ? NOTIFY_BAD : NOTIFY_DONE; 4141 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3866} 4142}
3867#endif /* CONFIG_DCA */ 4143#endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
3868 4144
3869module_exit(ixgbe_exit_module); 4145module_exit(ixgbe_exit_module);
3870 4146
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 16:51:40 -0500