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authorAlexander Duyck <alexander.h.duyck@intel.com>2009-05-07 06:38:56 -0400
committerDavid S. Miller <davem@davemloft.net>2009-05-07 17:52:29 -0400
commitafafd5b020a60b72d064e89244cb44a975eb2407 (patch)
tree29a8927e32e18f6f5181758ae2b01973d59a8c2e /drivers/net/ixgbe/ixgbe_main.c
parent7aedec2ad5314b173e78ca3f4edb4ceaa02248bb (diff)
ixgbe: always set header length in SRRCTL
As per the documentation for 82599 in order to support hardware RSC the header size must be set. This is only currently done for packet split mode. This patch sets the header buffer length for all modes. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c28
1 files changed, 10 insertions, 18 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 08f4a13a602f..4c38d51397ce 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -1754,28 +1754,20 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1754 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 1754 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1755 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 1755 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1756 1756
1757 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1758 IXGBE_SRRCTL_BSIZEHDR_MASK;
1759
1757 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1760 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1758 u16 bufsz = IXGBE_RXBUFFER_2048; 1761#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
1759 /* grow the amount we can receive on large page machines */ 1762 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1760 if (bufsz < (PAGE_SIZE / 2)) 1763#else
1761 bufsz = (PAGE_SIZE / 2); 1764 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1762 /* cap the bufsz at our largest descriptor size */ 1765#endif
1763 bufsz = min((u16)IXGBE_MAX_RXBUFFER, bufsz);
1764
1765 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1766 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; 1766 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1767 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1768 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1769 IXGBE_SRRCTL_BSIZEHDR_MASK);
1770 } else { 1767 } else {
1768 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1769 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1771 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1770 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1772
1773 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1774 srrctl |= IXGBE_RXBUFFER_2048 >>
1775 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1776 else
1777 srrctl |= rx_ring->rx_buf_len >>
1778 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1779 } 1771 }
1780 1772
1781 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl); 1773 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);