ixgbe: Fix copper PHY initialization code

While cleaning up the internal API focussing on Fiber and CX4 code
we found that I had broken the copper PHY initialization code. This
patch restores the PHY-specific code. This is mostly uninteresting
since no copper PHY boards are yet available. The changes have been
tested against Fiber only as I do not even have copper PHY versions
of 82598 macs.

This change actually cleans up the API code a bit more and we
lose some initialization code. A few PHY link detection helper
lines of code have been snuck into this patch, as well as a
read flush where it was suspected that this might cause issues.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

1 files changed, 7 insertions, 3 deletions

diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 512e3b22ed08..9c10c0584edf 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -74,7 +74,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
         ixgbe_clear_vfta(hw);
 
         /* Set up link */
-        hw->phy.ops.setup(hw);
+        hw->mac.ops.setup_link(hw);
 
         /* Clear statistics registers */
         ixgbe_clear_hw_cntrs(hw);
@@ -83,6 +83,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
         ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS;
         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
+        IXGBE_WRITE_FLUSH(hw);
 
         /* Clear adapter stopped flag */
         hw->adapter_stopped = false;
@@ -297,6 +298,7 @@ s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
         led_reg &= ~IXGBE_LED_MODE_MASK(index);
         led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index);
         IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
+        IXGBE_WRITE_FLUSH(hw);
 
         return 0;
 }
@@ -314,6 +316,7 @@ s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
         led_reg &= ~IXGBE_LED_MODE_MASK(index);
         led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index);
         IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
+        IXGBE_WRITE_FLUSH(hw);
 
         return 0;
 }
@@ -496,6 +499,7 @@ static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw)
         /* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */
         swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI);
         IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
+        IXGBE_WRITE_FLUSH(hw);
 }
 
 /**
@@ -1132,7 +1136,7 @@ void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask)
 }
 
 /**
- *  ixgbe_read_analog_reg8- Reads 8 bit 82598 Atlas analog register
+ *  ixgbe_read_analog_reg8 - Reads 8 bit Atlas analog register
  *  @hw: pointer to hardware structure
  *  @reg: analog register to read
  *  @val: read value
@@ -1154,7 +1158,7 @@ s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
 }
 
 /**
- *  ixgbe_write_analog_reg8- Writes 8 bit Atlas analog register
+ *  ixgbe_write_analog_reg8 - Writes 8 bit Atlas analog register
  *  @hw: pointer to hardware structure
  *  @reg: atlas register to write
  *  @val: value to write