diff options
author | Don Skidmore <donald.c.skidmore@intel.com> | 2010-06-29 14:30:59 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-06-30 17:27:40 -0400 |
commit | cb836a977f71f76ccbb1ff35b9c113ace96377e9 (patch) | |
tree | b91e2fc048d7f5fb193390f13fd89ef0e7a0b550 /drivers/net/ixgbe/ixgbe_82599.c | |
parent | 765c9f46867c3253c02275cbb7a453f2eb56eda1 (diff) |
ixgbe: add 1g PHY support for 82599
Add support for 1G SFP+ PHY's to 82599.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82599.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_82599.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index 976fd9e146c6..0ee175a289ee 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c | |||
@@ -206,6 +206,14 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, | |||
206 | s32 status = 0; | 206 | s32 status = 0; |
207 | u32 autoc = 0; | 207 | u32 autoc = 0; |
208 | 208 | ||
209 | /* Determine 1G link capabilities off of SFP+ type */ | ||
210 | if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || | ||
211 | hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1) { | ||
212 | *speed = IXGBE_LINK_SPEED_1GB_FULL; | ||
213 | *negotiation = true; | ||
214 | goto out; | ||
215 | } | ||
216 | |||
209 | /* | 217 | /* |
210 | * Determine link capabilities based on the stored value of AUTOC, | 218 | * Determine link capabilities based on the stored value of AUTOC, |
211 | * which represents EEPROM defaults. If AUTOC value has not been | 219 | * which represents EEPROM defaults. If AUTOC value has not been |
@@ -2087,6 +2095,7 @@ static u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) | |||
2087 | u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; | 2095 | u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; |
2088 | u16 ext_ability = 0; | 2096 | u16 ext_ability = 0; |
2089 | u8 comp_codes_10g = 0; | 2097 | u8 comp_codes_10g = 0; |
2098 | u8 comp_codes_1g = 0; | ||
2090 | 2099 | ||
2091 | hw->phy.ops.identify(hw); | 2100 | hw->phy.ops.identify(hw); |
2092 | 2101 | ||
@@ -2167,11 +2176,15 @@ sfp_check: | |||
2167 | case ixgbe_phy_sfp_intel: | 2176 | case ixgbe_phy_sfp_intel: |
2168 | case ixgbe_phy_sfp_unknown: | 2177 | case ixgbe_phy_sfp_unknown: |
2169 | hw->phy.ops.read_i2c_eeprom(hw, | 2178 | hw->phy.ops.read_i2c_eeprom(hw, |
2179 | IXGBE_SFF_1GBE_COMP_CODES, &comp_codes_1g); | ||
2180 | hw->phy.ops.read_i2c_eeprom(hw, | ||
2170 | IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g); | 2181 | IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g); |
2171 | if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) | 2182 | if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) |
2172 | physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; | 2183 | physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; |
2173 | else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) | 2184 | else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) |
2174 | physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; | 2185 | physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; |
2186 | else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) | ||
2187 | physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_T; | ||
2175 | break; | 2188 | break; |
2176 | default: | 2189 | default: |
2177 | break; | 2190 | break; |