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authorPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>2009-04-09 18:28:50 -0400
committerDavid S. Miller <davem@davemloft.net>2009-04-11 05:48:02 -0400
commit04193058c1005551af93f04a4b975fbd7f95cad5 (patch)
tree2c6292e6cc7e277c9ff579eb99a51ee19123cc1b /drivers/net/ixgbe/ixgbe_82599.c
parent1eb99d5ac44e2a9ac0b2856c579ba4d7cc349ada (diff)
ixgbe: Update get_physical_layer() calls, plus a version bump
Not all physical connection types are being correctly identified. This fixes that issue, and cleans up the logic to make it more maintainable. Also clean up the code for device capabilities from the EEPROM to support multiple SKUs of the same hardware. Bump the version to reflect all the updates since the 82599 merge. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82599.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_82599.c134
1 files changed, 98 insertions, 36 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index 50b399c1e87f..b3f4e96a018c 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -1177,53 +1177,98 @@ s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
1177u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) 1177u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)
1178{ 1178{
1179 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; 1179 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1180 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1181 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
1182 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
1183 u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
1184 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
1185 u16 ext_ability = 0;
1180 u8 comp_codes_10g = 0; 1186 u8 comp_codes_10g = 0;
1181 1187
1182 switch (hw->device_id) { 1188 hw->phy.ops.identify(hw);
1183 case IXGBE_DEV_ID_82599: 1189
1184 case IXGBE_DEV_ID_82599_KX4: 1190 if (hw->phy.type == ixgbe_phy_tn ||
1185 /* Default device ID is mezzanine card KX/KX4 */ 1191 hw->phy.type == ixgbe_phy_cu_unknown) {
1186 physical_layer = (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 1192 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
1187 IXGBE_PHYSICAL_LAYER_1000BASE_KX); 1193 IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability);
1194 if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY)
1195 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T;
1196 if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY)
1197 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
1198 if (ext_ability & IXGBE_MDIO_PHY_100BASETX_ABILITY)
1199 physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX;
1200 goto out;
1201 }
1202
1203 switch (autoc & IXGBE_AUTOC_LMS_MASK) {
1204 case IXGBE_AUTOC_LMS_1G_AN:
1205 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
1206 if (pma_pmd_1g == IXGBE_AUTOC_1G_KX_BX) {
1207 physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX |
1208 IXGBE_PHYSICAL_LAYER_1000BASE_BX;
1209 goto out;
1210 } else
1211 /* SFI mode so read SFP module */
1212 goto sfp_check;
1188 break; 1213 break;
1189 case IXGBE_DEV_ID_82599_SFP: 1214 case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
1190 hw->phy.ops.identify_sfp(hw); 1215 if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_CX4)
1216 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4;
1217 else if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_KX4)
1218 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1219 goto out;
1220 break;
1221 case IXGBE_AUTOC_LMS_10G_SERIAL:
1222 if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_KR) {
1223 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KR;
1224 goto out;
1225 } else if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)
1226 goto sfp_check;
1227 break;
1228 case IXGBE_AUTOC_LMS_KX4_KX_KR:
1229 case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN:
1230 if (autoc & IXGBE_AUTOC_KX_SUPP)
1231 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX;
1232 if (autoc & IXGBE_AUTOC_KX4_SUPP)
1233 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1234 if (autoc & IXGBE_AUTOC_KR_SUPP)
1235 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KR;
1236 goto out;
1237 break;
1238 default:
1239 goto out;
1240 break;
1241 }
1191 1242
1192 switch (hw->phy.sfp_type) { 1243sfp_check:
1193 case ixgbe_sfp_type_da_cu: 1244 /* SFP check must be done last since DA modules are sometimes used to
1194 case ixgbe_sfp_type_da_cu_core0: 1245 * test KR mode - we need to id KR mode correctly before SFP module.
1195 case ixgbe_sfp_type_da_cu_core1: 1246 * Call identify_sfp because the pluggable module may have changed */
1196 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU; 1247 hw->phy.ops.identify_sfp(hw);
1197 break; 1248 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present)
1198 case ixgbe_sfp_type_sr: 1249 goto out;
1250
1251 switch (hw->phy.type) {
1252 case ixgbe_phy_tw_tyco:
1253 case ixgbe_phy_tw_unknown:
1254 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU;
1255 break;
1256 case ixgbe_phy_sfp_avago:
1257 case ixgbe_phy_sfp_ftl:
1258 case ixgbe_phy_sfp_intel:
1259 case ixgbe_phy_sfp_unknown:
1260 hw->phy.ops.read_i2c_eeprom(hw,
1261 IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g);
1262 if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)
1199 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; 1263 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR;
1200 break; 1264 else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)
1201 case ixgbe_sfp_type_lr:
1202 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; 1265 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR;
1203 break;
1204 case ixgbe_sfp_type_srlr_core0:
1205 case ixgbe_sfp_type_srlr_core1:
1206 hw->phy.ops.read_i2c_eeprom(hw,
1207 IXGBE_SFF_10GBE_COMP_CODES,
1208 &comp_codes_10g);
1209 if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)
1210 physical_layer =
1211 IXGBE_PHYSICAL_LAYER_10GBASE_SR;
1212 else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)
1213 physical_layer =
1214 IXGBE_PHYSICAL_LAYER_10GBASE_LR;
1215 else
1216 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1217 default:
1218 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1219 break;
1220 }
1221 break; 1266 break;
1222 default: 1267 default:
1223 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1224 break; 1268 break;
1225 } 1269 }
1226 1270
1271out:
1227 return physical_layer; 1272 return physical_layer;
1228} 1273}
1229 1274
@@ -1271,6 +1316,22 @@ s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)
1271 return 0; 1316 return 0;
1272} 1317}
1273 1318
1319/**
1320 * ixgbe_get_device_caps_82599 - Get additional device capabilities
1321 * @hw: pointer to hardware structure
1322 * @device_caps: the EEPROM word with the extra device capabilities
1323 *
1324 * This function will read the EEPROM location for the device capabilities,
1325 * and return the word through device_caps.
1326 **/
1327s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps)
1328{
1329 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps);
1330
1331 return 0;
1332}
1333
1334
1274static struct ixgbe_mac_operations mac_ops_82599 = { 1335static struct ixgbe_mac_operations mac_ops_82599 = {
1275 .init_hw = &ixgbe_init_hw_generic, 1336 .init_hw = &ixgbe_init_hw_generic,
1276 .reset_hw = &ixgbe_reset_hw_82599, 1337 .reset_hw = &ixgbe_reset_hw_82599,
@@ -1280,6 +1341,7 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
1280 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82599, 1341 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82599,
1281 .enable_rx_dma = &ixgbe_enable_rx_dma_82599, 1342 .enable_rx_dma = &ixgbe_enable_rx_dma_82599,
1282 .get_mac_addr = &ixgbe_get_mac_addr_generic, 1343 .get_mac_addr = &ixgbe_get_mac_addr_generic,
1344 .get_device_caps = &ixgbe_get_device_caps_82599,
1283 .stop_adapter = &ixgbe_stop_adapter_generic, 1345 .stop_adapter = &ixgbe_stop_adapter_generic,
1284 .get_bus_info = &ixgbe_get_bus_info_generic, 1346 .get_bus_info = &ixgbe_get_bus_info_generic,
1285 .set_lan_id = &ixgbe_set_lan_id_multi_port_pcie, 1347 .set_lan_id = &ixgbe_set_lan_id_multi_port_pcie,