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authorAyyappan Veeraiyan <ayyappan.veeraiyan@intel.com>2008-03-03 18:03:57 -0500
committerJeff Garzik <jeff@garzik.org>2008-03-17 07:49:28 -0400
commitf494e8faa77bd4147324f7666441e0b780e7db94 (patch)
treeadcb7b1f344209de1db703abd1d1b25e497a613b /drivers/net/ixgbe/ixgbe.h
parent30eba97a3f076cf4e100b598ee9a1b1439b0cfaa (diff)
ixgbe: Introduce adaptive interrupt moderation
82598 can produce a formidable interrupt rate, and is largely unusable without some form of moderation. The default behaviour before this patch is to limit irq's to a reasonable number. However, just like our other drivers we can reduce latency for small packet-type traffic considerably by allowing the irq rate to go up dynamically. This patch introduces a simple irq moderation algorithm based on traffic analysis. The driver will use more CPU to service small packets quicker but will perform the same on bulk traffic as the old code. Signed-off-by: Ayyappan Veeraiyan <ayyappan.veeraiyan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe.h')
-rw-r--r--drivers/net/ixgbe/ixgbe.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index 20774772b608..79f5519e2aa9 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -136,6 +136,8 @@ struct ixgbe_ring {
136 u16 head; 136 u16 head;
137 u16 tail; 137 u16 tail;
138 138
139 unsigned int total_bytes;
140 unsigned int total_packets;
139 141
140 u16 reg_idx; /* holds the special value that gets the hardware register 142 u16 reg_idx; /* holds the special value that gets the hardware register
141 * offset associated with this ring, which is different 143 * offset associated with this ring, which is different
@@ -174,6 +176,8 @@ struct ixgbe_q_vector {
174 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */ 176 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
175 u8 rxr_count; /* Rx ring count assigned to this vector */ 177 u8 rxr_count; /* Rx ring count assigned to this vector */
176 u8 txr_count; /* Tx ring count assigned to this vector */ 178 u8 txr_count; /* Tx ring count assigned to this vector */
179 u8 tx_eitr;
180 u8 rx_eitr;
177 u32 eitr; 181 u32 eitr;
178}; 182};
179 183
@@ -215,6 +219,11 @@ struct ixgbe_adapter {
215 struct ixgbe_q_vector q_vector[MAX_MSIX_Q_VECTORS]; 219 struct ixgbe_q_vector q_vector[MAX_MSIX_Q_VECTORS];
216 char name[MAX_MSIX_COUNT][IFNAMSIZ + 5]; 220 char name[MAX_MSIX_COUNT][IFNAMSIZ + 5];
217 221
222 /* Interrupt Throttle Rate */
223 u32 itr_setting;
224 u16 eitr_low;
225 u16 eitr_high;
226
218 /* TX */ 227 /* TX */
219 struct ixgbe_ring *tx_ring; /* One per active queue */ 228 struct ixgbe_ring *tx_ring; /* One per active queue */
220 u64 restart_queue; 229 u64 restart_queue;