diff options
author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2008-09-11 22:58:14 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-09-24 18:54:54 -0400 |
commit | 30efa5a363d18f1c284455879cb67fb1bf547bdc (patch) | |
tree | 114f01ea6cf674bd14354e706d32a1ad47877ade /drivers/net/ixgbe/ixgbe.h | |
parent | 3d3d6d3cc2ad1e77516f3ad3f79d5988ebc361cf (diff) |
ixgbe: fix initial interrupt throttle settings
ixgbe was incorrectly setting the throttle rate setting for all tx
queues and the driver has been refreshed to better handle a dynamic
interrupt mode as well as multiple queues.
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe.h')
-rw-r--r-- | drivers/net/ixgbe/ixgbe.h | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h index 2b827a67c9c5..5ba03845c3e3 100644 --- a/drivers/net/ixgbe/ixgbe.h +++ b/drivers/net/ixgbe/ixgbe.h | |||
@@ -62,11 +62,6 @@ | |||
62 | #define IXGBE_MAX_RXQ 1 | 62 | #define IXGBE_MAX_RXQ 1 |
63 | #define IXGBE_MIN_RXQ 1 | 63 | #define IXGBE_MIN_RXQ 1 |
64 | 64 | ||
65 | #define IXGBE_DEFAULT_ITR_RX_USECS 125 /* 8k irqs/sec */ | ||
66 | #define IXGBE_DEFAULT_ITR_TX_USECS 250 /* 4k irqs/sec */ | ||
67 | #define IXGBE_MIN_ITR_USECS 100 /* 500k irqs/sec */ | ||
68 | #define IXGBE_MAX_ITR_USECS 10000 /* 100 irqs/sec */ | ||
69 | |||
70 | /* flow control */ | 65 | /* flow control */ |
71 | #define IXGBE_DEFAULT_FCRTL 0x10000 | 66 | #define IXGBE_DEFAULT_FCRTL 0x10000 |
72 | #define IXGBE_MIN_FCRTL 0x40 | 67 | #define IXGBE_MIN_FCRTL 0x40 |
@@ -161,10 +156,7 @@ struct ixgbe_ring { | |||
161 | * vector array, can also be used for finding the bit in EICR | 156 | * vector array, can also be used for finding the bit in EICR |
162 | * and friends that represents the vector for this ring */ | 157 | * and friends that represents the vector for this ring */ |
163 | 158 | ||
164 | u32 eims_value; | ||
165 | u16 itr_register; | ||
166 | 159 | ||
167 | char name[IFNAMSIZ + 5]; | ||
168 | u16 work_limit; /* max work per interrupt */ | 160 | u16 work_limit; /* max work per interrupt */ |
169 | u16 rx_buf_len; | 161 | u16 rx_buf_len; |
170 | }; | 162 | }; |
@@ -191,8 +183,8 @@ struct ixgbe_q_vector { | |||
191 | DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */ | 183 | DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */ |
192 | u8 rxr_count; /* Rx ring count assigned to this vector */ | 184 | u8 rxr_count; /* Rx ring count assigned to this vector */ |
193 | u8 txr_count; /* Tx ring count assigned to this vector */ | 185 | u8 txr_count; /* Tx ring count assigned to this vector */ |
194 | u8 tx_eitr; | 186 | u8 tx_itr; |
195 | u8 rx_eitr; | 187 | u8 rx_itr; |
196 | u32 eitr; | 188 | u32 eitr; |
197 | }; | 189 | }; |
198 | 190 | ||
@@ -240,7 +232,9 @@ struct ixgbe_adapter { | |||
240 | 232 | ||
241 | /* TX */ | 233 | /* TX */ |
242 | struct ixgbe_ring *tx_ring; /* One per active queue */ | 234 | struct ixgbe_ring *tx_ring; /* One per active queue */ |
235 | int num_tx_queues; | ||
243 | u64 restart_queue; | 236 | u64 restart_queue; |
237 | u64 hw_csum_tx_good; | ||
244 | u64 lsc_int; | 238 | u64 lsc_int; |
245 | u64 hw_tso_ctxt; | 239 | u64 hw_tso_ctxt; |
246 | u64 hw_tso6_ctxt; | 240 | u64 hw_tso6_ctxt; |
@@ -249,12 +243,10 @@ struct ixgbe_adapter { | |||
249 | 243 | ||
250 | /* RX */ | 244 | /* RX */ |
251 | struct ixgbe_ring *rx_ring; /* One per active queue */ | 245 | struct ixgbe_ring *rx_ring; /* One per active queue */ |
252 | u64 hw_csum_tx_good; | 246 | int num_rx_queues; |
253 | u64 hw_csum_rx_error; | 247 | u64 hw_csum_rx_error; |
254 | u64 hw_csum_rx_good; | 248 | u64 hw_csum_rx_good; |
255 | u64 non_eop_descs; | 249 | u64 non_eop_descs; |
256 | int num_tx_queues; | ||
257 | int num_rx_queues; | ||
258 | int num_msix_vectors; | 250 | int num_msix_vectors; |
259 | struct ixgbe_ring_feature ring_feature[3]; | 251 | struct ixgbe_ring_feature ring_feature[3]; |
260 | struct msix_entry *msix_entries; | 252 | struct msix_entry *msix_entries; |
@@ -301,14 +293,15 @@ struct ixgbe_adapter { | |||
301 | struct ixgbe_hw_stats stats; | 293 | struct ixgbe_hw_stats stats; |
302 | 294 | ||
303 | /* Interrupt Throttle Rate */ | 295 | /* Interrupt Throttle Rate */ |
304 | u32 rx_eitr; | 296 | u32 eitr_param; |
305 | u32 tx_eitr; | ||
306 | 297 | ||
307 | unsigned long state; | 298 | unsigned long state; |
308 | u64 tx_busy; | 299 | u64 tx_busy; |
309 | u64 lro_aggregated; | 300 | u64 lro_aggregated; |
310 | u64 lro_flushed; | 301 | u64 lro_flushed; |
311 | u64 lro_no_desc; | 302 | u64 lro_no_desc; |
303 | unsigned int tx_ring_count; | ||
304 | unsigned int rx_ring_count; | ||
312 | 305 | ||
313 | u32 link_speed; | 306 | u32 link_speed; |
314 | bool link_up; | 307 | bool link_up; |