diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-09-19 15:27:07 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-09-19 15:27:07 -0400 |
commit | f8ec473387f70d103c83ffb3ab50cb2b1380d0c0 (patch) | |
tree | 8abcae6e3e7c4692519196c26dac4a82e65753b4 /drivers/net/ixgb | |
parent | 23b6b0e3e8306ce3d00e0c87196bfaad335b9096 (diff) |
e1000, ixgb: Remove pointless wrappers
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/ixgb')
-rw-r--r-- | drivers/net/ixgb/ixgb_hw.c | 6 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_osdep.h | 12 |
2 files changed, 3 insertions, 15 deletions
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c index 2b1515574faf..acc6df7a6b38 100644 --- a/drivers/net/ixgb/ixgb_hw.c +++ b/drivers/net/ixgb/ixgb_hw.c | |||
@@ -83,7 +83,7 @@ static uint32_t ixgb_mac_reset(struct ixgb_hw *hw) | |||
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | /* Delay a few ms just to allow the reset to complete */ | 85 | /* Delay a few ms just to allow the reset to complete */ |
86 | msec_delay(IXGB_DELAY_AFTER_RESET); | 86 | msleep(IXGB_DELAY_AFTER_RESET); |
87 | ctrl_reg = IXGB_READ_REG(hw, CTRL0); | 87 | ctrl_reg = IXGB_READ_REG(hw, CTRL0); |
88 | #ifdef DBG | 88 | #ifdef DBG |
89 | /* Make sure the self-clearing global reset bit did self clear */ | 89 | /* Make sure the self-clearing global reset bit did self clear */ |
@@ -133,7 +133,7 @@ ixgb_adapter_stop(struct ixgb_hw *hw) | |||
133 | */ | 133 | */ |
134 | IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); | 134 | IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); |
135 | IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); | 135 | IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); |
136 | msec_delay(IXGB_DELAY_BEFORE_RESET); | 136 | msleep(IXGB_DELAY_BEFORE_RESET); |
137 | 137 | ||
138 | /* Issue a global reset to the MAC. This will reset the chip's | 138 | /* Issue a global reset to the MAC. This will reset the chip's |
139 | * transmit, receive, DMA, and link units. It will not effect | 139 | * transmit, receive, DMA, and link units. It will not effect |
@@ -300,7 +300,7 @@ ixgb_init_hw(struct ixgb_hw *hw) | |||
300 | #endif | 300 | #endif |
301 | 301 | ||
302 | /* Delay a few ms just to allow the reset to complete */ | 302 | /* Delay a few ms just to allow the reset to complete */ |
303 | msec_delay(IXGB_DELAY_AFTER_EE_RESET); | 303 | msleep(IXGB_DELAY_AFTER_EE_RESET); |
304 | 304 | ||
305 | if (ixgb_get_eeprom_data(hw) == FALSE) { | 305 | if (ixgb_get_eeprom_data(hw) == FALSE) { |
306 | return(FALSE); | 306 | return(FALSE); |
diff --git a/drivers/net/ixgb/ixgb_osdep.h b/drivers/net/ixgb/ixgb_osdep.h index ee982feac64d..19cb1d586dec 100644 --- a/drivers/net/ixgb/ixgb_osdep.h +++ b/drivers/net/ixgb/ixgb_osdep.h | |||
@@ -40,18 +40,6 @@ | |||
40 | #include <linux/interrupt.h> | 40 | #include <linux/interrupt.h> |
41 | #include <linux/sched.h> | 41 | #include <linux/sched.h> |
42 | 42 | ||
43 | #ifndef msec_delay | ||
44 | #define msec_delay(x) do { if(in_interrupt()) { \ | ||
45 | /* Don't mdelay in interrupt context! */ \ | ||
46 | BUG(); \ | ||
47 | } else { \ | ||
48 | msleep(x); \ | ||
49 | } } while(0) | ||
50 | #endif | ||
51 | |||
52 | #define PCI_COMMAND_REGISTER PCI_COMMAND | ||
53 | #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE | ||
54 | |||
55 | typedef enum { | 43 | typedef enum { |
56 | #undef FALSE | 44 | #undef FALSE |
57 | FALSE = 0, | 45 | FALSE = 0, |