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authorDmitry Torokhov <dtor_core@ameritech.net>2005-09-06 18:19:17 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-07 19:57:57 -0400
commit527b6af4133f433542a875dea7a24d58f8871d4b (patch)
treeada02585d9ef2523508fab47f6b946b06c8d9c35 /drivers/net/irda
parent4407c2b6b297339e296facf62e020cf66e55053d (diff)
[PATCH] smsc-ircc2: whitespace fixes
IRDA: smsc-ircc2 - whitespace fixes. Signed-off-by: Dmitry Torokhov <dtor@mail.ru> Cc: Jean Tourrilhes <jt@hpl.hp.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/net/irda')
-rw-r--r--drivers/net/irda/smsc-ircc2.c384
-rw-r--r--drivers/net/irda/smsc-ircc2.h50
2 files changed, 217 insertions, 217 deletions
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c
index 10125a1dba22..806e252b2ea0 100644
--- a/drivers/net/irda/smsc-ircc2.c
+++ b/drivers/net/irda/smsc-ircc2.c
@@ -4,10 +4,10 @@
4 * Description: Driver for the SMC Infrared Communications Controller 4 * Description: Driver for the SMC Infrared Communications Controller
5 * Status: Experimental. 5 * Status: Experimental.
6 * Author: Daniele Peri (peri@csai.unipa.it) 6 * Author: Daniele Peri (peri@csai.unipa.it)
7 * Created at: 7 * Created at:
8 * Modified at: 8 * Modified at:
9 * Modified by: 9 * Modified by:
10 * 10 *
11 * Copyright (c) 2002 Daniele Peri 11 * Copyright (c) 2002 Daniele Peri
12 * All Rights Reserved. 12 * All Rights Reserved.
13 * Copyright (c) 2002 Jean Tourrilhes 13 * Copyright (c) 2002 Jean Tourrilhes
@@ -17,26 +17,26 @@
17 * 17 *
18 * Copyright (c) 2001 Stefani Seibold 18 * Copyright (c) 2001 Stefani Seibold
19 * Copyright (c) 1999-2001 Dag Brattli 19 * Copyright (c) 1999-2001 Dag Brattli
20 * Copyright (c) 1998-1999 Thomas Davis, 20 * Copyright (c) 1998-1999 Thomas Davis,
21 * 21 *
22 * and irport.c: 22 * and irport.c:
23 * 23 *
24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved. 24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
25 * 25 *
26 * 26 *
27 * This program is free software; you can redistribute it and/or 27 * This program is free software; you can redistribute it and/or
28 * modify it under the terms of the GNU General Public License as 28 * modify it under the terms of the GNU General Public License as
29 * published by the Free Software Foundation; either version 2 of 29 * published by the Free Software Foundation; either version 2 of
30 * the License, or (at your option) any later version. 30 * the License, or (at your option) any later version.
31 * 31 *
32 * This program is distributed in the hope that it will be useful, 32 * This program is distributed in the hope that it will be useful,
33 * but WITHOUT ANY WARRANTY; without even the implied warranty of 33 * but WITHOUT ANY WARRANTY; without even the implied warranty of
34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35 * GNU General Public License for more details. 35 * GNU General Public License for more details.
36 * 36 *
37 * You should have received a copy of the GNU General Public License 37 * You should have received a copy of the GNU General Public License
38 * along with this program; if not, write to the Free Software 38 * along with this program; if not, write to the Free Software
39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
40 * MA 02111-1307 USA 40 * MA 02111-1307 USA
41 * 41 *
42 ********************************************************************/ 42 ********************************************************************/
@@ -72,7 +72,7 @@
72 72
73struct smsc_transceiver { 73struct smsc_transceiver {
74 char *name; 74 char *name;
75 void (*set_for_speed)(int fir_base, u32 speed); 75 void (*set_for_speed)(int fir_base, u32 speed);
76 int (*probe)(int fir_base); 76 int (*probe)(int fir_base);
77}; 77};
78typedef struct smsc_transceiver smsc_transceiver_t; 78typedef struct smsc_transceiver smsc_transceiver_t;
@@ -109,7 +109,7 @@ struct smsc_ircc_cb {
109 struct net_device *netdev; /* Yes! we are some kind of netdevice */ 109 struct net_device *netdev; /* Yes! we are some kind of netdevice */
110 struct net_device_stats stats; 110 struct net_device_stats stats;
111 struct irlap_cb *irlap; /* The link layer we are binded to */ 111 struct irlap_cb *irlap; /* The link layer we are binded to */
112 112
113 chipio_t io; /* IrDA controller information */ 113 chipio_t io; /* IrDA controller information */
114 iobuff_t tx_buff; /* Transmit buffer */ 114 iobuff_t tx_buff; /* Transmit buffer */
115 iobuff_t rx_buff; /* Receive buffer */ 115 iobuff_t rx_buff; /* Receive buffer */
@@ -119,7 +119,7 @@ struct smsc_ircc_cb {
119 struct qos_info qos; /* QoS capabilities for this device */ 119 struct qos_info qos; /* QoS capabilities for this device */
120 120
121 spinlock_t lock; /* For serializing operations */ 121 spinlock_t lock; /* For serializing operations */
122 122
123 __u32 new_speed; 123 __u32 new_speed;
124 __u32 flags; /* Interface flags */ 124 __u32 flags; /* Interface flags */
125 125
@@ -147,7 +147,7 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base,
147static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self); 147static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
148static void smsc_ircc_init_chip(struct smsc_ircc_cb *self); 148static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
149static int __exit smsc_ircc_close(struct smsc_ircc_cb *self); 149static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
150static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase); 150static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase);
151static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase); 151static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase);
152static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self); 152static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
153static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev); 153static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
@@ -332,7 +332,7 @@ static int __init smsc_ircc_init(void)
332 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 332 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
333 333
334 dev_count=0; 334 dev_count=0;
335 335
336 if ((ircc_fir>0)&&(ircc_sir>0)) { 336 if ((ircc_fir>0)&&(ircc_sir>0)) {
337 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir); 337 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
338 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir); 338 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
@@ -352,9 +352,9 @@ static int __init smsc_ircc_init(void)
352 if (!smsc_superio_lpc(ircc_cfg)) 352 if (!smsc_superio_lpc(ircc_cfg))
353 ret = 0; 353 ret = 0;
354 } 354 }
355 355
356 if(smsc_ircc_look_for_chips()>0) ret = 0; 356 if(smsc_ircc_look_for_chips()>0) ret = 0;
357 357
358 return ret; 358 return ret;
359} 359}
360 360
@@ -369,13 +369,13 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
369 struct smsc_ircc_cb *self; 369 struct smsc_ircc_cb *self;
370 struct net_device *dev; 370 struct net_device *dev;
371 int err; 371 int err;
372 372
373 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 373 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
374 374
375 err = smsc_ircc_present(fir_base, sir_base); 375 err = smsc_ircc_present(fir_base, sir_base);
376 if(err) 376 if(err)
377 goto err_out; 377 goto err_out;
378 378
379 err = -ENOMEM; 379 err = -ENOMEM;
380 if (dev_count > DIM(dev_self)) { 380 if (dev_count > DIM(dev_self)) {
381 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__); 381 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
@@ -402,7 +402,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
402 dev->stop = smsc_ircc_net_close; 402 dev->stop = smsc_ircc_net_close;
403 dev->do_ioctl = smsc_ircc_net_ioctl; 403 dev->do_ioctl = smsc_ircc_net_ioctl;
404 dev->get_stats = smsc_ircc_net_get_stats; 404 dev->get_stats = smsc_ircc_net_get_stats;
405 405
406 self = dev->priv; 406 self = dev->priv;
407 self->netdev = dev; 407 self->netdev = dev;
408 408
@@ -414,7 +414,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
414 dev_self[dev_count++] = self; 414 dev_self[dev_count++] = self;
415 spin_lock_init(&self->lock); 415 spin_lock_init(&self->lock);
416 416
417 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE; 417 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
418 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE; 418 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
419 419
420 self->rx_buff.head = 420 self->rx_buff.head =
@@ -442,14 +442,14 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
442 self->rx_buff.state = OUTSIDE_FRAME; 442 self->rx_buff.state = OUTSIDE_FRAME;
443 self->tx_buff.data = self->tx_buff.head; 443 self->tx_buff.data = self->tx_buff.head;
444 self->rx_buff.data = self->rx_buff.head; 444 self->rx_buff.data = self->rx_buff.head;
445 445
446 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq); 446 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
447 447
448 smsc_ircc_setup_qos(self); 448 smsc_ircc_setup_qos(self);
449 449
450 smsc_ircc_init_chip(self); 450 smsc_ircc_init_chip(self);
451 451
452 if(ircc_transceiver > 0 && 452 if(ircc_transceiver > 0 &&
453 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS) 453 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
454 self->transceiver = ircc_transceiver; 454 self->transceiver = ircc_transceiver;
455 else 455 else
@@ -519,7 +519,7 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
519 dma = config & IRCC_INTERFACE_DMA_MASK; 519 dma = config & IRCC_INTERFACE_DMA_MASK;
520 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; 520 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
521 521
522 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) { 522 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
523 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", 523 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
524 __FUNCTION__, fir_base); 524 __FUNCTION__, fir_base);
525 goto out3; 525 goto out3;
@@ -543,8 +543,8 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
543 * Setup I/O 543 * Setup I/O
544 * 544 *
545 */ 545 */
546static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, 546static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
547 unsigned int fir_base, unsigned int sir_base, 547 unsigned int fir_base, unsigned int sir_base,
548 u8 dma, u8 irq) 548 u8 dma, u8 irq)
549{ 549{
550 unsigned char config, chip_dma, chip_irq; 550 unsigned char config, chip_dma, chip_irq;
@@ -569,7 +569,7 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
569 } 569 }
570 else 570 else
571 self->io.irq = chip_irq; 571 self->io.irq = chip_irq;
572 572
573 if (dma < 255) { 573 if (dma < 255) {
574 if (dma != chip_dma) 574 if (dma != chip_dma)
575 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n", 575 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
@@ -591,7 +591,7 @@ static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
591{ 591{
592 /* Initialize QoS for this device */ 592 /* Initialize QoS for this device */
593 irda_init_max_qos_capabilies(&self->qos); 593 irda_init_max_qos_capabilies(&self->qos);
594 594
595 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| 595 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
596 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); 596 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
597 597
@@ -608,8 +608,8 @@ static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
608 */ 608 */
609static void smsc_ircc_init_chip(struct smsc_ircc_cb *self) 609static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
610{ 610{
611 int iobase, ir_mode, ctrl, fast; 611 int iobase, ir_mode, ctrl, fast;
612 612
613 IRDA_ASSERT( self != NULL, return; ); 613 IRDA_ASSERT( self != NULL, return; );
614 iobase = self->io.fir_base; 614 iobase = self->io.fir_base;
615 615
@@ -622,27 +622,27 @@ static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
622 outb(0x00, iobase+IRCC_MASTER); 622 outb(0x00, iobase+IRCC_MASTER);
623 623
624 register_bank(iobase, 1); 624 register_bank(iobase, 1);
625 outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode), 625 outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),
626 iobase+IRCC_SCE_CFGA); 626 iobase+IRCC_SCE_CFGA);
627 627
628#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */ 628#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
629 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), 629 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
630 iobase+IRCC_SCE_CFGB); 630 iobase+IRCC_SCE_CFGB);
631#else 631#else
632 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), 632 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
633 iobase+IRCC_SCE_CFGB); 633 iobase+IRCC_SCE_CFGB);
634#endif 634#endif
635 (void) inb(iobase+IRCC_FIFO_THRESHOLD); 635 (void) inb(iobase+IRCC_FIFO_THRESHOLD);
636 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD); 636 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD);
637 637
638 register_bank(iobase, 4); 638 register_bank(iobase, 4);
639 outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL); 639 outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL);
640 640
641 register_bank(iobase, 0); 641 register_bank(iobase, 0);
642 outb(fast, iobase+IRCC_LCR_A); 642 outb(fast, iobase+IRCC_LCR_A);
643 643
644 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED); 644 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
645 645
646 /* Power on device */ 646 /* Power on device */
647 outb(0x00, iobase+IRCC_MASTER); 647 outb(0x00, iobase+IRCC_MASTER);
648} 648}
@@ -667,7 +667,7 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd
667 IRDA_ASSERT(self != NULL, return -1;); 667 IRDA_ASSERT(self != NULL, return -1;);
668 668
669 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); 669 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
670 670
671 switch (cmd) { 671 switch (cmd) {
672 case SIOCSBANDWIDTH: /* Set bandwidth */ 672 case SIOCSBANDWIDTH: /* Set bandwidth */
673 if (!capable(CAP_NET_ADMIN)) 673 if (!capable(CAP_NET_ADMIN))
@@ -703,14 +703,14 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd
703 default: 703 default:
704 ret = -EOPNOTSUPP; 704 ret = -EOPNOTSUPP;
705 } 705 }
706 706
707 return ret; 707 return ret;
708} 708}
709 709
710static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev) 710static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
711{ 711{
712 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv; 712 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv;
713 713
714 return &self->stats; 714 return &self->stats;
715} 715}
716 716
@@ -728,7 +728,7 @@ static void smsc_ircc_timeout(struct net_device *dev)
728 unsigned long flags; 728 unsigned long flags;
729 729
730 self = (struct smsc_ircc_cb *) dev->priv; 730 self = (struct smsc_ircc_cb *) dev->priv;
731 731
732 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n", 732 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
733 dev->name, self->io.speed); 733 dev->name, self->io.speed);
734 spin_lock_irqsave(&self->lock, flags); 734 spin_lock_irqsave(&self->lock, flags);
@@ -757,14 +757,14 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
757 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 757 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
758 758
759 IRDA_ASSERT(dev != NULL, return 0;); 759 IRDA_ASSERT(dev != NULL, return 0;);
760 760
761 self = (struct smsc_ircc_cb *) dev->priv; 761 self = (struct smsc_ircc_cb *) dev->priv;
762 IRDA_ASSERT(self != NULL, return 0;); 762 IRDA_ASSERT(self != NULL, return 0;);
763 763
764 iobase = self->io.sir_base; 764 iobase = self->io.sir_base;
765 765
766 netif_stop_queue(dev); 766 netif_stop_queue(dev);
767 767
768 /* Make sure test of self->io.speed & speed change are atomic */ 768 /* Make sure test of self->io.speed & speed change are atomic */
769 spin_lock_irqsave(&self->lock, flags); 769 spin_lock_irqsave(&self->lock, flags);
770 770
@@ -796,18 +796,18 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
796 self->tx_buff.data = self->tx_buff.head; 796 self->tx_buff.data = self->tx_buff.head;
797 797
798 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */ 798 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
799 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, 799 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
800 self->tx_buff.truesize); 800 self->tx_buff.truesize);
801 801
802 self->stats.tx_bytes += self->tx_buff.len; 802 self->stats.tx_bytes += self->tx_buff.len;
803 803
804 /* Turn on transmit finished interrupt. Will fire immediately! */ 804 /* Turn on transmit finished interrupt. Will fire immediately! */
805 outb(UART_IER_THRI, iobase+UART_IER); 805 outb(UART_IER_THRI, iobase+UART_IER);
806 806
807 spin_unlock_irqrestore(&self->lock, flags); 807 spin_unlock_irqrestore(&self->lock, flags);
808 808
809 dev_kfree_skb(skb); 809 dev_kfree_skb(skb);
810 810
811 return 0; 811 return 0;
812} 812}
813 813
@@ -828,7 +828,7 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
828 828
829 switch(speed) { 829 switch(speed) {
830 default: 830 default:
831 case 576000: 831 case 576000:
832 ir_mode = IRCC_CFGA_IRDA_HDLC; 832 ir_mode = IRCC_CFGA_IRDA_HDLC;
833 ctrl = IRCC_CRC; 833 ctrl = IRCC_CRC;
834 fast = 0; 834 fast = 0;
@@ -855,10 +855,10 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
855 register_bank(fir_base, 0); 855 register_bank(fir_base, 0);
856 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast, fir_base+IRCC_LCR_A); 856 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast, fir_base+IRCC_LCR_A);
857 #endif 857 #endif
858 858
859 register_bank(fir_base, 1); 859 register_bank(fir_base, 1);
860 outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base+IRCC_SCE_CFGA); 860 outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base+IRCC_SCE_CFGA);
861 861
862 register_bank(fir_base, 4); 862 register_bank(fir_base, 4);
863 outb((inb(fir_base+IRCC_CONTROL) & 0x30) | ctrl, fir_base+IRCC_CONTROL); 863 outb((inb(fir_base+IRCC_CONTROL) & 0x30) | ctrl, fir_base+IRCC_CONTROL);
864} 864}
@@ -885,7 +885,7 @@ static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
885 /* Reset everything */ 885 /* Reset everything */
886 886
887 /* Install FIR transmit handler */ 887 /* Install FIR transmit handler */
888 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir; 888 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
889 889
890 /* Clear FIFO */ 890 /* Clear FIFO */
891 outb(inb(fir_base+IRCC_LCR_A)|IRCC_LCR_A_FIFO_RESET, fir_base+IRCC_LCR_A); 891 outb(inb(fir_base+IRCC_LCR_A)|IRCC_LCR_A_FIFO_RESET, fir_base+IRCC_LCR_A);
@@ -895,14 +895,14 @@ static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
895 895
896 register_bank(fir_base, 1); 896 register_bank(fir_base, 1);
897 897
898 /* Select the TX/RX interface */ 898 /* Select the TX/RX interface */
899#ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */ 899#ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
900 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), 900 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
901 fir_base+IRCC_SCE_CFGB); 901 fir_base+IRCC_SCE_CFGB);
902#else 902#else
903 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), 903 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
904 fir_base+IRCC_SCE_CFGB); 904 fir_base+IRCC_SCE_CFGB);
905#endif 905#endif
906 (void) inb(fir_base+IRCC_FIFO_THRESHOLD); 906 (void) inb(fir_base+IRCC_FIFO_THRESHOLD);
907 907
908 /* Enable SCE interrupts */ 908 /* Enable SCE interrupts */
@@ -923,12 +923,12 @@ static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
923 int fir_base; 923 int fir_base;
924 924
925 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 925 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
926 926
927 IRDA_ASSERT(self != NULL, return;); 927 IRDA_ASSERT(self != NULL, return;);
928 928
929 fir_base = self->io.fir_base; 929 fir_base = self->io.fir_base;
930 register_bank(fir_base, 0); 930 register_bank(fir_base, 0);
931 /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/ 931 /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/
932 outb(inb(fir_base+IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base+IRCC_LCR_B); 932 outb(inb(fir_base+IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base+IRCC_LCR_B);
933} 933}
934 934
@@ -947,7 +947,7 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
947 struct net_device *dev; 947 struct net_device *dev;
948 int iobase; 948 int iobase;
949 int last_speed_was_sir; 949 int last_speed_was_sir;
950 950
951 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed); 951 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
952 952
953 IRDA_ASSERT(self != NULL, return;); 953 IRDA_ASSERT(self != NULL, return;);
@@ -961,9 +961,9 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
961 speed= 1152000; 961 speed= 1152000;
962 self->io.speed = speed; 962 self->io.speed = speed;
963 last_speed_was_sir = 0; 963 last_speed_was_sir = 0;
964 smsc_ircc_fir_start(self); 964 smsc_ircc_fir_start(self);
965 #endif 965 #endif
966 966
967 if(self->io.speed == 0) 967 if(self->io.speed == 0)
968 smsc_ircc_sir_start(self); 968 smsc_ircc_sir_start(self);
969 969
@@ -974,17 +974,17 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
974 if(self->io.speed != speed) smsc_ircc_set_transceiver_for_speed(self, speed); 974 if(self->io.speed != speed) smsc_ircc_set_transceiver_for_speed(self, speed);
975 975
976 self->io.speed = speed; 976 self->io.speed = speed;
977 977
978 if(speed <= SMSC_IRCC2_MAX_SIR_SPEED) { 978 if(speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
979 if(!last_speed_was_sir) { 979 if(!last_speed_was_sir) {
980 smsc_ircc_fir_stop(self); 980 smsc_ircc_fir_stop(self);
981 smsc_ircc_sir_start(self); 981 smsc_ircc_sir_start(self);
982 } 982 }
983 smsc_ircc_set_sir_speed(self, speed); 983 smsc_ircc_set_sir_speed(self, speed);
984 } 984 }
985 else { 985 else {
986 if(last_speed_was_sir) { 986 if(last_speed_was_sir) {
987 #if SMSC_IRCC2_C_SIR_STOP 987 #if SMSC_IRCC2_C_SIR_STOP
988 smsc_ircc_sir_stop(self); 988 smsc_ircc_sir_stop(self);
989 #endif 989 #endif
990 smsc_ircc_fir_start(self); 990 smsc_ircc_fir_start(self);
@@ -994,13 +994,13 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
994 #if 0 994 #if 0
995 self->tx_buff.len = 10; 995 self->tx_buff.len = 10;
996 self->tx_buff.data = self->tx_buff.head; 996 self->tx_buff.data = self->tx_buff.head;
997 997
998 smsc_ircc_dma_xmit(self, iobase, 4000); 998 smsc_ircc_dma_xmit(self, iobase, 4000);
999 #endif 999 #endif
1000 /* Be ready for incoming frames */ 1000 /* Be ready for incoming frames */
1001 smsc_ircc_dma_receive(self, iobase); 1001 smsc_ircc_dma_receive(self, iobase);
1002 } 1002 }
1003 1003
1004 netif_wake_queue(dev); 1004 netif_wake_queue(dev);
1005} 1005}
1006 1006
@@ -1013,7 +1013,7 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
1013void smsc_ircc_set_sir_speed(void *priv, __u32 speed) 1013void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
1014{ 1014{
1015 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv; 1015 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
1016 int iobase; 1016 int iobase;
1017 int fcr; /* FIFO control reg */ 1017 int fcr; /* FIFO control reg */
1018 int lcr; /* Line control reg */ 1018 int lcr; /* Line control reg */
1019 int divisor; 1019 int divisor;
@@ -1022,30 +1022,30 @@ void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
1022 1022
1023 IRDA_ASSERT(self != NULL, return;); 1023 IRDA_ASSERT(self != NULL, return;);
1024 iobase = self->io.sir_base; 1024 iobase = self->io.sir_base;
1025 1025
1026 /* Update accounting for new speed */ 1026 /* Update accounting for new speed */
1027 self->io.speed = speed; 1027 self->io.speed = speed;
1028 1028
1029 /* Turn off interrupts */ 1029 /* Turn off interrupts */
1030 outb(0, iobase+UART_IER); 1030 outb(0, iobase+UART_IER);
1031 1031
1032 divisor = SMSC_IRCC2_MAX_SIR_SPEED/speed; 1032 divisor = SMSC_IRCC2_MAX_SIR_SPEED/speed;
1033 1033
1034 fcr = UART_FCR_ENABLE_FIFO; 1034 fcr = UART_FCR_ENABLE_FIFO;
1035 1035
1036 /* 1036 /*
1037 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and 1037 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1038 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget 1038 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1039 * about this timeout since it will always be fast enough. 1039 * about this timeout since it will always be fast enough.
1040 */ 1040 */
1041 if (self->io.speed < 38400) 1041 if (self->io.speed < 38400)
1042 fcr |= UART_FCR_TRIGGER_1; 1042 fcr |= UART_FCR_TRIGGER_1;
1043 else 1043 else
1044 fcr |= UART_FCR_TRIGGER_14; 1044 fcr |= UART_FCR_TRIGGER_14;
1045 1045
1046 /* IrDA ports use 8N1 */ 1046 /* IrDA ports use 8N1 */
1047 lcr = UART_LCR_WLEN8; 1047 lcr = UART_LCR_WLEN8;
1048 1048
1049 outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ 1049 outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
1050 outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ 1050 outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */
1051 outb(divisor >> 8, iobase+UART_DLM); 1051 outb(divisor >> 8, iobase+UART_DLM);
@@ -1092,24 +1092,24 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1092 /* Note : you should make sure that speed changes 1092 /* Note : you should make sure that speed changes
1093 * are not going to corrupt any outgoing frame. 1093 * are not going to corrupt any outgoing frame.
1094 * Look at nsc-ircc for the gory details - Jean II */ 1094 * Look at nsc-ircc for the gory details - Jean II */
1095 smsc_ircc_change_speed(self, speed); 1095 smsc_ircc_change_speed(self, speed);
1096 spin_unlock_irqrestore(&self->lock, flags); 1096 spin_unlock_irqrestore(&self->lock, flags);
1097 dev_kfree_skb(skb); 1097 dev_kfree_skb(skb);
1098 return 0; 1098 return 0;
1099 } else 1099 } else
1100 self->new_speed = speed; 1100 self->new_speed = speed;
1101 } 1101 }
1102 1102
1103 memcpy(self->tx_buff.head, skb->data, skb->len); 1103 memcpy(self->tx_buff.head, skb->data, skb->len);
1104 1104
1105 self->tx_buff.len = skb->len; 1105 self->tx_buff.len = skb->len;
1106 self->tx_buff.data = self->tx_buff.head; 1106 self->tx_buff.data = self->tx_buff.head;
1107 1107
1108 mtt = irda_get_mtt(skb); 1108 mtt = irda_get_mtt(skb);
1109 if (mtt) { 1109 if (mtt) {
1110 int bofs; 1110 int bofs;
1111 1111
1112 /* 1112 /*
1113 * Compute how many BOFs (STA or PA's) we need to waste the 1113 * Compute how many BOFs (STA or PA's) we need to waste the
1114 * min turn time given the speed of the link. 1114 * min turn time given the speed of the link.
1115 */ 1115 */
@@ -1145,7 +1145,7 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1145 outb(0x00, iobase+IRCC_LCR_B); 1145 outb(0x00, iobase+IRCC_LCR_B);
1146#endif 1146#endif
1147 register_bank(iobase, 1); 1147 register_bank(iobase, 1);
1148 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1148 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1149 iobase+IRCC_SCE_CFGB); 1149 iobase+IRCC_SCE_CFGB);
1150 1150
1151 self->io.direction = IO_XMIT; 1151 self->io.direction = IO_XMIT;
@@ -1161,7 +1161,7 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1161 outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO); 1161 outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO);
1162 1162
1163 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/ 1163 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1164 1164
1165 /* Enable burst mode chip Tx DMA */ 1165 /* Enable burst mode chip Tx DMA */
1166 register_bank(iobase, 1); 1166 register_bank(iobase, 1);
1167 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | 1167 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
@@ -1176,7 +1176,7 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1176 register_bank(iobase, 0); 1176 register_bank(iobase, 0);
1177 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER); 1177 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER);
1178 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER); 1178 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
1179 1179
1180 /* Enable transmit */ 1180 /* Enable transmit */
1181 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B); 1181 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B);
1182} 1182}
@@ -1184,7 +1184,7 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1184/* 1184/*
1185 * Function smsc_ircc_dma_xmit_complete (self) 1185 * Function smsc_ircc_dma_xmit_complete (self)
1186 * 1186 *
1187 * The transfer of a frame in finished. This function will only be called 1187 * The transfer of a frame in finished. This function will only be called
1188 * by the interrupt handler 1188 * by the interrupt handler
1189 * 1189 *
1190 */ 1190 */
@@ -1217,7 +1217,7 @@ static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase)
1217 1217
1218 /* Check if it's time to change the speed */ 1218 /* Check if it's time to change the speed */
1219 if (self->new_speed) { 1219 if (self->new_speed) {
1220 smsc_ircc_change_speed(self, self->new_speed); 1220 smsc_ircc_change_speed(self, self->new_speed);
1221 self->new_speed = 0; 1221 self->new_speed = 0;
1222 } 1222 }
1223 1223
@@ -1231,22 +1231,22 @@ static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase)
1231 * if it starts to receive a frame. 1231 * if it starts to receive a frame.
1232 * 1232 *
1233 */ 1233 */
1234static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase) 1234static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
1235{ 1235{
1236#if 0 1236#if 0
1237 /* Turn off chip DMA */ 1237 /* Turn off chip DMA */
1238 register_bank(iobase, 1); 1238 register_bank(iobase, 1);
1239 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1239 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1240 iobase+IRCC_SCE_CFGB); 1240 iobase+IRCC_SCE_CFGB);
1241#endif 1241#endif
1242 1242
1243 /* Disable Tx */ 1243 /* Disable Tx */
1244 register_bank(iobase, 0); 1244 register_bank(iobase, 0);
1245 outb(0x00, iobase+IRCC_LCR_B); 1245 outb(0x00, iobase+IRCC_LCR_B);
1246 1246
1247 /* Turn off chip DMA */ 1247 /* Turn off chip DMA */
1248 register_bank(iobase, 1); 1248 register_bank(iobase, 1);
1249 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1249 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1250 iobase+IRCC_SCE_CFGB); 1250 iobase+IRCC_SCE_CFGB);
1251 1251
1252 self->io.direction = IO_RECV; 1252 self->io.direction = IO_RECV;
@@ -1263,7 +1263,7 @@ static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
1263 1263
1264 /* Enable burst mode chip Rx DMA */ 1264 /* Enable burst mode chip Rx DMA */
1265 register_bank(iobase, 1); 1265 register_bank(iobase, 1);
1266 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | 1266 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1267 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB); 1267 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
1268 1268
1269 /* Enable interrupt */ 1269 /* Enable interrupt */
@@ -1274,9 +1274,9 @@ static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
1274 1274
1275 /* Enable receiver */ 1275 /* Enable receiver */
1276 register_bank(iobase, 0); 1276 register_bank(iobase, 0);
1277 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE, 1277 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1278 iobase+IRCC_LCR_B); 1278 iobase+IRCC_LCR_B);
1279 1279
1280 return 0; 1280 return 0;
1281} 1281}
1282 1282
@@ -1290,9 +1290,9 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase
1290{ 1290{
1291 struct sk_buff *skb; 1291 struct sk_buff *skb;
1292 int len, msgcnt, lsr; 1292 int len, msgcnt, lsr;
1293 1293
1294 register_bank(iobase, 0); 1294 register_bank(iobase, 0);
1295 1295
1296 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1296 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1297#if 0 1297#if 0
1298 /* Disable Rx */ 1298 /* Disable Rx */
@@ -1309,8 +1309,8 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase
1309 1309
1310 len = self->rx_buff.truesize - get_dma_residue(self->io.dma); 1310 len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1311 1311
1312 /* Look for errors 1312 /* Look for errors
1313 */ 1313 */
1314 1314
1315 if(lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) { 1315 if(lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1316 self->stats.rx_errors++; 1316 self->stats.rx_errors++;
@@ -1337,9 +1337,9 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase
1337 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n", 1337 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1338 __FUNCTION__); 1338 __FUNCTION__);
1339 return; 1339 return;
1340 } 1340 }
1341 /* Make sure IP header gets aligned */ 1341 /* Make sure IP header gets aligned */
1342 skb_reserve(skb, 1); 1342 skb_reserve(skb, 1);
1343 1343
1344 memcpy(skb_put(skb, len), self->rx_buff.data, len); 1344 memcpy(skb_put(skb, len), self->rx_buff.data, len);
1345 self->stats.rx_packets++; 1345 self->stats.rx_packets++;
@@ -1357,7 +1357,7 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase
1357 * Receive one frame from the infrared port 1357 * Receive one frame from the infrared port
1358 * 1358 *
1359 */ 1359 */
1360static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self) 1360static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1361{ 1361{
1362 int boguscount = 0; 1362 int boguscount = 0;
1363 int iobase; 1363 int iobase;
@@ -1366,12 +1366,12 @@ static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1366 1366
1367 iobase = self->io.sir_base; 1367 iobase = self->io.sir_base;
1368 1368
1369 /* 1369 /*
1370 * Receive all characters in Rx FIFO, unwrap and unstuff them. 1370 * Receive all characters in Rx FIFO, unwrap and unstuff them.
1371 * async_unwrap_char will deliver all found frames 1371 * async_unwrap_char will deliver all found frames
1372 */ 1372 */
1373 do { 1373 do {
1374 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff, 1374 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1375 inb(iobase+UART_RX)); 1375 inb(iobase+UART_RX));
1376 1376
1377 /* Make sure we don't stay here to long */ 1377 /* Make sure we don't stay here to long */
@@ -1379,7 +1379,7 @@ static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1379 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__); 1379 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1380 break; 1380 break;
1381 } 1381 }
1382 } while (inb(iobase+UART_LSR) & UART_LSR_DR); 1382 } while (inb(iobase+UART_LSR) & UART_LSR_DR);
1383} 1383}
1384 1384
1385 1385
@@ -1397,7 +1397,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1397 irqreturn_t ret = IRQ_NONE; 1397 irqreturn_t ret = IRQ_NONE;
1398 1398
1399 if (dev == NULL) { 1399 if (dev == NULL) {
1400 printk(KERN_WARNING "%s: irq %d for unknown device.\n", 1400 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1401 driver_name, irq); 1401 driver_name, irq);
1402 goto irq_ret; 1402 goto irq_ret;
1403 } 1403 }
@@ -1405,7 +1405,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1405 IRDA_ASSERT(self != NULL, return IRQ_NONE;); 1405 IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1406 1406
1407 /* Serialise the interrupt handler in various CPUs, stop Tx path */ 1407 /* Serialise the interrupt handler in various CPUs, stop Tx path */
1408 spin_lock(&self->lock); 1408 spin_lock(&self->lock);
1409 1409
1410 /* Check if we should use the SIR interrupt handler */ 1410 /* Check if we should use the SIR interrupt handler */
1411 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) { 1411 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
@@ -1417,7 +1417,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1417 1417
1418 register_bank(iobase, 0); 1418 register_bank(iobase, 0);
1419 iir = inb(iobase+IRCC_IIR); 1419 iir = inb(iobase+IRCC_IIR);
1420 if (iir == 0) 1420 if (iir == 0)
1421 goto irq_ret_unlock; 1421 goto irq_ret_unlock;
1422 ret = IRQ_HANDLED; 1422 ret = IRQ_HANDLED;
1423 1423
@@ -1425,7 +1425,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1425 outb(0, iobase+IRCC_IER); 1425 outb(0, iobase+IRCC_IER);
1426 lcra = inb(iobase+IRCC_LCR_A); 1426 lcra = inb(iobase+IRCC_LCR_A);
1427 lsr = inb(iobase+IRCC_LSR); 1427 lsr = inb(iobase+IRCC_LSR);
1428 1428
1429 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir); 1429 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1430 1430
1431 if (iir & IRCC_IIR_EOM) { 1431 if (iir & IRCC_IIR_EOM) {
@@ -1433,7 +1433,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1433 smsc_ircc_dma_receive_complete(self, iobase); 1433 smsc_ircc_dma_receive_complete(self, iobase);
1434 else 1434 else
1435 smsc_ircc_dma_xmit_complete(self, iobase); 1435 smsc_ircc_dma_xmit_complete(self, iobase);
1436 1436
1437 smsc_ircc_dma_receive(self, iobase); 1437 smsc_ircc_dma_receive(self, iobase);
1438 } 1438 }
1439 1439
@@ -1476,7 +1476,7 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1476 /* Clear interrupt */ 1476 /* Clear interrupt */
1477 lsr = inb(iobase+UART_LSR); 1477 lsr = inb(iobase+UART_LSR);
1478 1478
1479 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", 1479 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1480 __FUNCTION__, iir, lsr, iobase); 1480 __FUNCTION__, iir, lsr, iobase);
1481 1481
1482 switch (iir) { 1482 switch (iir) {
@@ -1496,13 +1496,13 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1496 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", 1496 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1497 __FUNCTION__, iir); 1497 __FUNCTION__, iir);
1498 break; 1498 break;
1499 } 1499 }
1500 1500
1501 /* Make sure we don't stay here to long */ 1501 /* Make sure we don't stay here to long */
1502 if (boguscount++ > 100) 1502 if (boguscount++ > 100)
1503 break; 1503 break;
1504 1504
1505 iir = inb(iobase + UART_IIR) & UART_IIR_ID; 1505 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1506 } 1506 }
1507 /*spin_unlock(&self->lock);*/ 1507 /*spin_unlock(&self->lock);*/
1508 return IRQ_HANDLED; 1508 return IRQ_HANDLED;
@@ -1529,7 +1529,7 @@ static int ircc_is_receiving(struct smsc_ircc_cb *self)
1529 get_dma_residue(self->io.dma)); 1529 get_dma_residue(self->io.dma));
1530 1530
1531 status = (self->rx_buff.state != OUTSIDE_FRAME); 1531 status = (self->rx_buff.state != OUTSIDE_FRAME);
1532 1532
1533 return status; 1533 return status;
1534} 1534}
1535#endif /* unused */ 1535#endif /* unused */
@@ -1549,14 +1549,14 @@ static int smsc_ircc_net_open(struct net_device *dev)
1549 unsigned long flags; 1549 unsigned long flags;
1550 1550
1551 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 1551 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1552 1552
1553 IRDA_ASSERT(dev != NULL, return -1;); 1553 IRDA_ASSERT(dev != NULL, return -1;);
1554 self = (struct smsc_ircc_cb *) dev->priv; 1554 self = (struct smsc_ircc_cb *) dev->priv;
1555 IRDA_ASSERT(self != NULL, return 0;); 1555 IRDA_ASSERT(self != NULL, return 0;);
1556 1556
1557 iobase = self->io.fir_base; 1557 iobase = self->io.fir_base;
1558 1558
1559 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name, 1559 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1560 (void *) dev)) { 1560 (void *) dev)) {
1561 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n", 1561 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1562 __FUNCTION__, self->io.irq); 1562 __FUNCTION__, self->io.irq);
@@ -1568,14 +1568,14 @@ static int smsc_ircc_net_open(struct net_device *dev)
1568 self->io.speed = 0; 1568 self->io.speed = 0;
1569 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED); 1569 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1570 spin_unlock_irqrestore(&self->lock, flags); 1570 spin_unlock_irqrestore(&self->lock, flags);
1571 1571
1572 /* Give self a hardware name */ 1572 /* Give self a hardware name */
1573 /* It would be cool to offer the chip revision here - Jean II */ 1573 /* It would be cool to offer the chip revision here - Jean II */
1574 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base); 1574 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1575 1575
1576 /* 1576 /*
1577 * Open new IrLAP layer instance, now that everything should be 1577 * Open new IrLAP layer instance, now that everything should be
1578 * initialized properly 1578 * initialized properly
1579 */ 1579 */
1580 self->irlap = irlap_open(dev, &self->qos, hwname); 1580 self->irlap = irlap_open(dev, &self->qos, hwname);
1581 1581
@@ -1590,7 +1590,7 @@ static int smsc_ircc_net_open(struct net_device *dev)
1590 __FUNCTION__, self->io.dma); 1590 __FUNCTION__, self->io.dma);
1591 return -EAGAIN; 1591 return -EAGAIN;
1592 } 1592 }
1593 1593
1594 netif_start_queue(dev); 1594 netif_start_queue(dev);
1595 1595
1596 return 0; 1596 return 0;
@@ -1608,16 +1608,16 @@ static int smsc_ircc_net_close(struct net_device *dev)
1608 int iobase; 1608 int iobase;
1609 1609
1610 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 1610 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1611 1611
1612 IRDA_ASSERT(dev != NULL, return -1;); 1612 IRDA_ASSERT(dev != NULL, return -1;);
1613 self = (struct smsc_ircc_cb *) dev->priv; 1613 self = (struct smsc_ircc_cb *) dev->priv;
1614 IRDA_ASSERT(self != NULL, return 0;); 1614 IRDA_ASSERT(self != NULL, return 0;);
1615 1615
1616 iobase = self->io.fir_base; 1616 iobase = self->io.fir_base;
1617 1617
1618 /* Stop device */ 1618 /* Stop device */
1619 netif_stop_queue(dev); 1619 netif_stop_queue(dev);
1620 1620
1621 /* Stop and remove instance of IrLAP */ 1621 /* Stop and remove instance of IrLAP */
1622 if (self->irlap) 1622 if (self->irlap)
1623 irlap_close(self->irlap); 1623 irlap_close(self->irlap);
@@ -1655,7 +1655,7 @@ static void smsc_ircc_wakeup(struct smsc_ircc_cb *self)
1655 * or give a good reason. - Jean II */ 1655 * or give a good reason. - Jean II */
1656 1656
1657 smsc_ircc_net_open(self->netdev); 1657 smsc_ircc_net_open(self->netdev);
1658 1658
1659 IRDA_MESSAGE("%s, Waking up\n", driver_name); 1659 IRDA_MESSAGE("%s, Waking up\n", driver_name);
1660} 1660}
1661 1661
@@ -1720,7 +1720,7 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1720 1720
1721 release_region(self->io.fir_base, self->io.fir_ext); 1721 release_region(self->io.fir_base, self->io.fir_ext);
1722 1722
1723 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__, 1723 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1724 self->io.sir_base); 1724 self->io.sir_base);
1725 1725
1726 release_region(self->io.sir_base, self->io.sir_ext); 1726 release_region(self->io.sir_base, self->io.sir_ext);
@@ -1728,7 +1728,7 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1728 if (self->tx_buff.head) 1728 if (self->tx_buff.head)
1729 dma_free_coherent(NULL, self->tx_buff.truesize, 1729 dma_free_coherent(NULL, self->tx_buff.truesize,
1730 self->tx_buff.head, self->tx_buff_dma); 1730 self->tx_buff.head, self->tx_buff_dma);
1731 1731
1732 if (self->rx_buff.head) 1732 if (self->rx_buff.head)
1733 dma_free_coherent(NULL, self->rx_buff.truesize, 1733 dma_free_coherent(NULL, self->rx_buff.truesize,
1734 self->rx_buff.head, self->rx_buff_dma); 1734 self->rx_buff.head, self->rx_buff_dma);
@@ -1763,9 +1763,9 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1763 1763
1764 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1764 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1765 1765
1766 IRDA_ASSERT(self != NULL, return;); 1766 IRDA_ASSERT(self != NULL, return;);
1767 dev= self->netdev; 1767 dev= self->netdev;
1768 IRDA_ASSERT(dev != NULL, return;); 1768 IRDA_ASSERT(dev != NULL, return;);
1769 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir; 1769 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1770 1770
1771 fir_base = self->io.fir_base; 1771 fir_base = self->io.fir_base;
@@ -1784,7 +1784,7 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1784 /* Initialize UART */ 1784 /* Initialize UART */
1785 outb(UART_LCR_WLEN8, sir_base+UART_LCR); /* Reset DLAB */ 1785 outb(UART_LCR_WLEN8, sir_base+UART_LCR); /* Reset DLAB */
1786 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base+UART_MCR); 1786 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base+UART_MCR);
1787 1787
1788 /* Turn on interrups */ 1788 /* Turn on interrups */
1789 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base+UART_IER); 1789 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base+UART_IER);
1790 1790
@@ -1803,7 +1803,7 @@ void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1803 1803
1804 /* Reset UART */ 1804 /* Reset UART */
1805 outb(0, iobase+UART_MCR); 1805 outb(0, iobase+UART_MCR);
1806 1806
1807 /* Turn off interrupts */ 1807 /* Turn off interrupts */
1808 outb(0, iobase+UART_IER); 1808 outb(0, iobase+UART_IER);
1809} 1809}
@@ -1831,16 +1831,16 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1831 /* Finished with frame? */ 1831 /* Finished with frame? */
1832 if (self->tx_buff.len > 0) { 1832 if (self->tx_buff.len > 0) {
1833 /* Write data left in transmit buffer */ 1833 /* Write data left in transmit buffer */
1834 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size, 1834 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1835 self->tx_buff.data, self->tx_buff.len); 1835 self->tx_buff.data, self->tx_buff.len);
1836 self->tx_buff.data += actual; 1836 self->tx_buff.data += actual;
1837 self->tx_buff.len -= actual; 1837 self->tx_buff.len -= actual;
1838 } else { 1838 } else {
1839 1839
1840 /*if (self->tx_buff.len ==0) {*/ 1840 /*if (self->tx_buff.len ==0) {*/
1841 1841
1842 /* 1842 /*
1843 * Now serial buffer is almost free & we can start 1843 * Now serial buffer is almost free & we can start
1844 * transmission of another packet. But first we must check 1844 * transmission of another packet. But first we must check
1845 * if we need to change the speed of the hardware 1845 * if we need to change the speed of the hardware
1846 */ 1846 */
@@ -1857,14 +1857,14 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1857 self->stats.tx_packets++; 1857 self->stats.tx_packets++;
1858 1858
1859 if(self->io.speed <= 115200) { 1859 if(self->io.speed <= 115200) {
1860 /* 1860 /*
1861 * Reset Rx FIFO to make sure that all reflected transmit data 1861 * Reset Rx FIFO to make sure that all reflected transmit data
1862 * is discarded. This is needed for half duplex operation 1862 * is discarded. This is needed for half duplex operation
1863 */ 1863 */
1864 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR; 1864 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1865 if (self->io.speed < 38400) 1865 if (self->io.speed < 38400)
1866 fcr |= UART_FCR_TRIGGER_1; 1866 fcr |= UART_FCR_TRIGGER_1;
1867 else 1867 else
1868 fcr |= UART_FCR_TRIGGER_14; 1868 fcr |= UART_FCR_TRIGGER_14;
1869 1869
1870 outb(fcr, iobase+UART_FCR); 1870 outb(fcr, iobase+UART_FCR);
@@ -1884,13 +1884,13 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1884static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) 1884static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1885{ 1885{
1886 int actual = 0; 1886 int actual = 0;
1887 1887
1888 /* Tx FIFO should be empty! */ 1888 /* Tx FIFO should be empty! */
1889 if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { 1889 if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
1890 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__); 1890 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1891 return 0; 1891 return 0;
1892 } 1892 }
1893 1893
1894 /* Fill FIFO with current frame */ 1894 /* Fill FIFO with current frame */
1895 while ((fifo_size-- > 0) && (actual < len)) { 1895 while ((fifo_size-- > 0) && (actual < len)) {
1896 /* Transmit next byte */ 1896 /* Transmit next byte */
@@ -1921,10 +1921,10 @@ static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1921static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self) 1921static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1922{ 1922{
1923 unsigned int i; 1923 unsigned int i;
1924 1924
1925 IRDA_ASSERT(self != NULL, return;); 1925 IRDA_ASSERT(self != NULL, return;);
1926 1926
1927 for(i=0; smsc_transceivers[i].name!=NULL; i++) 1927 for(i=0; smsc_transceivers[i].name!=NULL; i++)
1928 if((*smsc_transceivers[i].probe)(self->io.fir_base)) { 1928 if((*smsc_transceivers[i].probe)(self->io.fir_base)) {
1929 IRDA_MESSAGE(" %s transceiver found\n", 1929 IRDA_MESSAGE(" %s transceiver found\n",
1930 smsc_transceivers[i].name); 1930 smsc_transceivers[i].name);
@@ -1933,7 +1933,7 @@ static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1933 } 1933 }
1934 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n", 1934 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1935 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name); 1935 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1936 1936
1937 self->transceiver= SMSC_IRCC2_C_DEFAULT_TRANSCEIVER; 1937 self->transceiver= SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1938} 1938}
1939 1939
@@ -1947,7 +1947,7 @@ static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1947static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed) 1947static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1948{ 1948{
1949 unsigned int trx; 1949 unsigned int trx;
1950 1950
1951 trx = self->transceiver; 1951 trx = self->transceiver;
1952 if(trx>0) (*smsc_transceivers[trx-1].set_for_speed)(self->io.fir_base, speed); 1952 if(trx>0) (*smsc_transceivers[trx-1].set_for_speed)(self->io.fir_base, speed);
1953} 1953}
@@ -1979,9 +1979,9 @@ static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1979{ 1979{
1980 int iobase; 1980 int iobase;
1981 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US; 1981 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
1982 1982
1983 iobase = self->io.sir_base; 1983 iobase = self->io.sir_base;
1984 1984
1985 /* Calibrated busy loop */ 1985 /* Calibrated busy loop */
1986 while((count-- > 0) && !(inb(iobase+UART_LSR) & UART_LSR_TEMT)) 1986 while((count-- > 0) && !(inb(iobase+UART_LSR) & UART_LSR_TEMT))
1987 udelay(1); 1987 udelay(1);
@@ -2001,23 +2001,23 @@ static int __init smsc_ircc_look_for_chips(void)
2001 smsc_chip_address_t *address; 2001 smsc_chip_address_t *address;
2002 char *type; 2002 char *type;
2003 unsigned int cfg_base, found; 2003 unsigned int cfg_base, found;
2004 2004
2005 found = 0; 2005 found = 0;
2006 address = possible_addresses; 2006 address = possible_addresses;
2007 2007
2008 while(address->cfg_base){ 2008 while(address->cfg_base){
2009 cfg_base = address->cfg_base; 2009 cfg_base = address->cfg_base;
2010 2010
2011 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/ 2011 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2012 2012
2013 if( address->type & SMSCSIO_TYPE_FDC){ 2013 if( address->type & SMSCSIO_TYPE_FDC){
2014 type = "FDC"; 2014 type = "FDC";
2015 if((address->type) & SMSCSIO_TYPE_FLAT) { 2015 if((address->type) & SMSCSIO_TYPE_FLAT) {
2016 if(!smsc_superio_flat(fdc_chips_flat,cfg_base, type)) found++; 2016 if(!smsc_superio_flat(fdc_chips_flat,cfg_base, type)) found++;
2017 } 2017 }
2018 if((address->type) & SMSCSIO_TYPE_PAGED) { 2018 if((address->type) & SMSCSIO_TYPE_PAGED) {
2019 if(!smsc_superio_paged(fdc_chips_paged,cfg_base, type)) found++; 2019 if(!smsc_superio_paged(fdc_chips_paged,cfg_base, type)) found++;
2020 } 2020 }
2021 } 2021 }
2022 if( address->type & SMSCSIO_TYPE_LPC){ 2022 if( address->type & SMSCSIO_TYPE_LPC){
2023 type = "LPC"; 2023 type = "LPC";
@@ -2025,13 +2025,13 @@ static int __init smsc_ircc_look_for_chips(void)
2025 if(!smsc_superio_flat(lpc_chips_flat,cfg_base,type)) found++; 2025 if(!smsc_superio_flat(lpc_chips_flat,cfg_base,type)) found++;
2026 } 2026 }
2027 if((address->type) & SMSCSIO_TYPE_PAGED) { 2027 if((address->type) & SMSCSIO_TYPE_PAGED) {
2028 if(!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) found++; 2028 if(!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) found++;
2029 } 2029 }
2030 } 2030 }
2031 address++; 2031 address++;
2032 } 2032 }
2033 return found; 2033 return found;
2034} 2034}
2035 2035
2036/* 2036/*
2037 * Function smsc_superio_flat (chip, base, type) 2037 * Function smsc_superio_flat (chip, base, type)
@@ -2052,23 +2052,23 @@ static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg
2052 2052
2053 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase); 2053 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2054 mode = inb(cfgbase+1); 2054 mode = inb(cfgbase+1);
2055 2055
2056 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/ 2056 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2057 2057
2058 if(!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA)) 2058 if(!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2059 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__); 2059 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2060 2060
2061 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase); 2061 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2062 sirbase = inb(cfgbase+1) << 2; 2062 sirbase = inb(cfgbase+1) << 2;
2063 2063
2064 /* FIR iobase */ 2064 /* FIR iobase */
2065 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase); 2065 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2066 firbase = inb(cfgbase+1) << 3; 2066 firbase = inb(cfgbase+1) << 3;
2067 2067
2068 /* DMA */ 2068 /* DMA */
2069 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase); 2069 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2070 dma = inb(cfgbase+1) & SMSCSIOFLAT_FIRDMASELECT_MASK; 2070 dma = inb(cfgbase+1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2071 2071
2072 /* IRQ */ 2072 /* IRQ */
2073 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase); 2073 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2074 irq = inb(cfgbase+1) & SMSCSIOFLAT_UART2IRQSELECT_MASK; 2074 irq = inb(cfgbase+1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
@@ -2077,9 +2077,9 @@ static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg
2077 2077
2078 if (firbase) { 2078 if (firbase) {
2079 if (smsc_ircc_open(firbase, sirbase, dma, irq) == 0) 2079 if (smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2080 ret=0; 2080 ret=0;
2081 } 2081 }
2082 2082
2083 /* Exit configuration */ 2083 /* Exit configuration */
2084 outb(SMSCSIO_CFGEXITKEY, cfgbase); 2084 outb(SMSCSIO_CFGEXITKEY, cfgbase);
2085 2085
@@ -2096,22 +2096,22 @@ static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cf
2096{ 2096{
2097 unsigned short fir_io, sir_io; 2097 unsigned short fir_io, sir_io;
2098 int ret = -ENODEV; 2098 int ret = -ENODEV;
2099 2099
2100 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2100 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2101 2101
2102 if (smsc_ircc_probe(cfg_base,0x20,chips,type)==NULL) 2102 if (smsc_ircc_probe(cfg_base,0x20,chips,type)==NULL)
2103 return ret; 2103 return ret;
2104 2104
2105 /* Select logical device (UART2) */ 2105 /* Select logical device (UART2) */
2106 outb(0x07, cfg_base); 2106 outb(0x07, cfg_base);
2107 outb(0x05, cfg_base + 1); 2107 outb(0x05, cfg_base + 1);
2108 2108
2109 /* SIR iobase */ 2109 /* SIR iobase */
2110 outb(0x60, cfg_base); 2110 outb(0x60, cfg_base);
2111 sir_io = inb(cfg_base + 1) << 8; 2111 sir_io = inb(cfg_base + 1) << 8;
2112 outb(0x61, cfg_base); 2112 outb(0x61, cfg_base);
2113 sir_io |= inb(cfg_base + 1); 2113 sir_io |= inb(cfg_base + 1);
2114 2114
2115 /* Read FIR base */ 2115 /* Read FIR base */
2116 outb(0x62, cfg_base); 2116 outb(0x62, cfg_base);
2117 fir_io = inb(cfg_base + 1) << 8; 2117 fir_io = inb(cfg_base + 1) << 8;
@@ -2121,9 +2121,9 @@ static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cf
2121 2121
2122 if (fir_io) { 2122 if (fir_io) {
2123 if (smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0) 2123 if (smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2124 ret=0; 2124 ret=0;
2125 } 2125 }
2126 2126
2127 /* Exit configuration */ 2127 /* Exit configuration */
2128 outb(SMSCSIO_CFGEXITKEY, cfg_base); 2128 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2129 2129
@@ -2145,7 +2145,7 @@ static int __init smsc_access(unsigned short cfg_base,unsigned char reg)
2145 2145
2146static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type) 2146static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type)
2147{ 2147{
2148 u8 devid,xdevid,rev; 2148 u8 devid,xdevid,rev;
2149 2149
2150 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2150 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2151 2151
@@ -2168,14 +2168,14 @@ static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg
2168 if (smsc_access(cfg_base,0x55)) /* send second key and check */ 2168 if (smsc_access(cfg_base,0x55)) /* send second key and check */
2169 return NULL; 2169 return NULL;
2170 #endif 2170 #endif
2171 2171
2172 /* probe device ID */ 2172 /* probe device ID */
2173 2173
2174 if (smsc_access(cfg_base,reg)) 2174 if (smsc_access(cfg_base,reg))
2175 return NULL; 2175 return NULL;
2176 2176
2177 devid=inb(cfg_base+1); 2177 devid=inb(cfg_base+1);
2178 2178
2179 if (devid==0) /* typical value for unused port */ 2179 if (devid==0) /* typical value for unused port */
2180 return NULL; 2180 return NULL;
2181 2181
@@ -2192,7 +2192,7 @@ static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg
2192 if (rev>=128) /* i think this will make no sense */ 2192 if (rev>=128) /* i think this will make no sense */
2193 return NULL; 2193 return NULL;
2194 2194
2195 if (devid==xdevid) /* protection against false positives */ 2195 if (devid==xdevid) /* protection against false positives */
2196 return NULL; 2196 return NULL;
2197 2197
2198 /* Check for expected device ID; are there others? */ 2198 /* Check for expected device ID; are there others? */
@@ -2208,10 +2208,10 @@ static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg
2208 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",devid,rev,cfg_base,type,chip->name); 2208 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",devid,rev,cfg_base,type,chip->name);
2209 2209
2210 if (chip->rev>rev){ 2210 if (chip->rev>rev){
2211 IRDA_MESSAGE("Revision higher than expected\n"); 2211 IRDA_MESSAGE("Revision higher than expected\n");
2212 return NULL; 2212 return NULL;
2213 } 2213 }
2214 2214
2215 if (chip->flags&NoIRDA) 2215 if (chip->flags&NoIRDA)
2216 IRDA_MESSAGE("chipset does not support IRDA\n"); 2216 IRDA_MESSAGE("chipset does not support IRDA\n");
2217 2217
@@ -2270,10 +2270,10 @@ static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2270{ 2270{
2271 unsigned long jiffies_now, jiffies_timeout; 2271 unsigned long jiffies_now, jiffies_timeout;
2272 u8 val; 2272 u8 val;
2273 2273
2274 jiffies_now= jiffies; 2274 jiffies_now= jiffies;
2275 jiffies_timeout= jiffies+SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES; 2275 jiffies_timeout= jiffies+SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2276 2276
2277 /* ATC */ 2277 /* ATC */
2278 register_bank(fir_base, 4); 2278 register_bank(fir_base, 4);
2279 outb((inb(fir_base+IRCC_ATC) & IRCC_ATC_MASK) |IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE, fir_base+IRCC_ATC); 2279 outb((inb(fir_base+IRCC_ATC) & IRCC_ATC_MASK) |IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE, fir_base+IRCC_ATC);
@@ -2298,25 +2298,25 @@ static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2298/* 2298/*
2299 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed) 2299 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2300 * 2300 *
2301 * Set transceiver 2301 * Set transceiver
2302 * 2302 *
2303 */ 2303 */
2304 2304
2305static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed) 2305static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2306{ 2306{
2307 u8 fast_mode; 2307 u8 fast_mode;
2308 2308
2309 switch(speed) 2309 switch(speed)
2310 { 2310 {
2311 default: 2311 default:
2312 case 576000 : 2312 case 576000 :
2313 fast_mode = 0; 2313 fast_mode = 0;
2314 break; 2314 break;
2315 case 1152000 : 2315 case 1152000 :
2316 case 4000000 : 2316 case 4000000 :
2317 fast_mode = IRCC_LCR_A_FAST; 2317 fast_mode = IRCC_LCR_A_FAST;
2318 break; 2318 break;
2319 2319
2320 } 2320 }
2321 register_bank(fir_base, 0); 2321 register_bank(fir_base, 0);
2322 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast_mode, fir_base+IRCC_LCR_A); 2322 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast_mode, fir_base+IRCC_LCR_A);
@@ -2325,7 +2325,7 @@ static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u3
2325/* 2325/*
2326 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base) 2326 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2327 * 2327 *
2328 * Probe transceiver 2328 * Probe transceiver
2329 * 2329 *
2330 */ 2330 */
2331 2331
@@ -2337,25 +2337,25 @@ static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2337/* 2337/*
2338 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed) 2338 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2339 * 2339 *
2340 * Set transceiver 2340 * Set transceiver
2341 * 2341 *
2342 */ 2342 */
2343 2343
2344static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed) 2344static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2345{ 2345{
2346 u8 fast_mode; 2346 u8 fast_mode;
2347 2347
2348 switch(speed) 2348 switch(speed)
2349 { 2349 {
2350 default: 2350 default:
2351 case 576000 : 2351 case 576000 :
2352 fast_mode = 0; 2352 fast_mode = 0;
2353 break; 2353 break;
2354 case 1152000 : 2354 case 1152000 :
2355 case 4000000 : 2355 case 4000000 :
2356 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA; 2356 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2357 break; 2357 break;
2358 2358
2359 } 2359 }
2360 /* This causes an interrupt */ 2360 /* This causes an interrupt */
2361 register_bank(fir_base, 0); 2361 register_bank(fir_base, 0);
@@ -2365,7 +2365,7 @@ static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2365/* 2365/*
2366 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base) 2366 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2367 * 2367 *
2368 * Probe transceiver 2368 * Probe transceiver
2369 * 2369 *
2370 */ 2370 */
2371 2371
diff --git a/drivers/net/irda/smsc-ircc2.h b/drivers/net/irda/smsc-ircc2.h
index 458611cc0d40..0c36286d87f7 100644
--- a/drivers/net/irda/smsc-ircc2.h
+++ b/drivers/net/irda/smsc-ircc2.h
@@ -1,5 +1,5 @@
1/********************************************************************* 1/*********************************************************************
2 * $Id: smsc-ircc2.h,v 1.12.2.1 2002/10/27 10:52:37 dip Exp $ 2 * $Id: smsc-ircc2.h,v 1.12.2.1 2002/10/27 10:52:37 dip Exp $
3 * 3 *
4 * Description: Definitions for the SMC IrCC chipset 4 * Description: Definitions for the SMC IrCC chipset
5 * Status: Experimental. 5 * Status: Experimental.
@@ -9,25 +9,25 @@
9 * All Rights Reserved. 9 * All Rights Reserved.
10 * 10 *
11 * Based on smc-ircc.h: 11 * Based on smc-ircc.h:
12 * 12 *
13 * Copyright (c) 1999-2000, Dag Brattli <dagb@cs.uit.no> 13 * Copyright (c) 1999-2000, Dag Brattli <dagb@cs.uit.no>
14 * Copyright (c) 1998-1999, Thomas Davis (tadavis@jps.net> 14 * Copyright (c) 1998-1999, Thomas Davis (tadavis@jps.net>
15 * All Rights Reserved 15 * All Rights Reserved
16 * 16 *
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details. 26 * GNU General Public License for more details.
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 * 32 *
33 ********************************************************************/ 33 ********************************************************************/
@@ -112,10 +112,10 @@
112 112
113#define IRCC_CFGA_COM 0x00 113#define IRCC_CFGA_COM 0x00
114#define IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK 0x87 114#define IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK 0x87
115#define IRCC_CFGA_IRDA_SIR_A 0x08 115#define IRCC_CFGA_IRDA_SIR_A 0x08
116#define IRCC_CFGA_ASK_SIR 0x10 116#define IRCC_CFGA_ASK_SIR 0x10
117#define IRCC_CFGA_IRDA_SIR_B 0x18 117#define IRCC_CFGA_IRDA_SIR_B 0x18
118#define IRCC_CFGA_IRDA_HDLC 0x20 118#define IRCC_CFGA_IRDA_HDLC 0x20
119#define IRCC_CFGA_IRDA_4PPM 0x28 119#define IRCC_CFGA_IRDA_4PPM 0x28
120#define IRCC_CFGA_CONSUMER 0x30 120#define IRCC_CFGA_CONSUMER 0x30
121#define IRCC_CFGA_RAW_IR 0x38 121#define IRCC_CFGA_RAW_IR 0x38
@@ -130,7 +130,7 @@
130#define IRCC_CFGB_LPBCK_TX_CRC 0x10 130#define IRCC_CFGB_LPBCK_TX_CRC 0x10
131#define IRCC_CFGB_NOWAIT 0x08 131#define IRCC_CFGB_NOWAIT 0x08
132#define IRCC_CFGB_STRING_MOVE 0x04 132#define IRCC_CFGB_STRING_MOVE 0x04
133#define IRCC_CFGB_DMA_BURST 0x02 133#define IRCC_CFGB_DMA_BURST 0x02
134#define IRCC_CFGB_DMA_ENABLE 0x01 134#define IRCC_CFGB_DMA_ENABLE 0x01
135 135
136#define IRCC_CFGB_MUX_COM 0x00 136#define IRCC_CFGB_MUX_COM 0x00
@@ -141,11 +141,11 @@
141/* Register block 3 - Identification Registers! */ 141/* Register block 3 - Identification Registers! */
142#define IRCC_ID_HIGH 0x00 /* 0x10 */ 142#define IRCC_ID_HIGH 0x00 /* 0x10 */
143#define IRCC_ID_LOW 0x01 /* 0xB8 */ 143#define IRCC_ID_LOW 0x01 /* 0xB8 */
144#define IRCC_CHIP_ID 0x02 /* 0xF1 */ 144#define IRCC_CHIP_ID 0x02 /* 0xF1 */
145#define IRCC_VERSION 0x03 /* 0x01 */ 145#define IRCC_VERSION 0x03 /* 0x01 */
146#define IRCC_INTERFACE 0x04 /* low 4 = DMA, high 4 = IRQ */ 146#define IRCC_INTERFACE 0x04 /* low 4 = DMA, high 4 = IRQ */
147#define IRCC_INTERFACE_DMA_MASK 0x0F /* low 4 = DMA, high 4 = IRQ */ 147#define IRCC_INTERFACE_DMA_MASK 0x0F /* low 4 = DMA, high 4 = IRQ */
148#define IRCC_INTERFACE_IRQ_MASK 0xF0 /* low 4 = DMA, high 4 = IRQ */ 148#define IRCC_INTERFACE_IRQ_MASK 0xF0 /* low 4 = DMA, high 4 = IRQ */
149 149
150/* Register block 4 - IrDA */ 150/* Register block 4 - IrDA */
151#define IRCC_CONTROL 0x00 151#define IRCC_CONTROL 0x00
@@ -163,10 +163,10 @@
163 163
164/* Register block 5 - IrDA */ 164/* Register block 5 - IrDA */
165#define IRCC_ATC 0x00 165#define IRCC_ATC 0x00
166#define IRCC_ATC_nPROGREADY 0x80 166#define IRCC_ATC_nPROGREADY 0x80
167#define IRCC_ATC_SPEED 0x40 167#define IRCC_ATC_SPEED 0x40
168#define IRCC_ATC_ENABLE 0x20 168#define IRCC_ATC_ENABLE 0x20
169#define IRCC_ATC_MASK 0xE0 169#define IRCC_ATC_MASK 0xE0
170 170
171 171
172#define IRCC_IRHALFDUPLEX_TIMEOUT 0x01 172#define IRCC_IRHALFDUPLEX_TIMEOUT 0x01
@@ -178,8 +178,8 @@
178 */ 178 */
179 179
180#define SMSC_IRCC2_MAX_SIR_SPEED 115200 180#define SMSC_IRCC2_MAX_SIR_SPEED 115200
181#define SMSC_IRCC2_FIR_CHIP_IO_EXTENT 8 181#define SMSC_IRCC2_FIR_CHIP_IO_EXTENT 8
182#define SMSC_IRCC2_SIR_CHIP_IO_EXTENT 8 182#define SMSC_IRCC2_SIR_CHIP_IO_EXTENT 8
183#define SMSC_IRCC2_FIFO_SIZE 16 183#define SMSC_IRCC2_FIFO_SIZE 16
184#define SMSC_IRCC2_FIFO_THRESHOLD 64 184#define SMSC_IRCC2_FIFO_THRESHOLD 64
185/* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */ 185/* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */