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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/irda/via-ircc.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/net/irda/via-ircc.c')
-rw-r--r--drivers/net/irda/via-ircc.c1676
1 files changed, 1676 insertions, 0 deletions
diff --git a/drivers/net/irda/via-ircc.c b/drivers/net/irda/via-ircc.c
new file mode 100644
index 000000000000..8bafb455c102
--- /dev/null
+++ b/drivers/net/irda/via-ircc.c
@@ -0,0 +1,1676 @@
1/********************************************************************
2 Filename: via-ircc.c
3 Version: 1.0
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
6 Date : 08/06/2003
7
8Copyright (c) 1998-2003 VIA Technologies, Inc.
9
10This program is free software; you can redistribute it and/or modify it under
11the terms of the GNU General Public License as published by the Free Software
12Foundation; either version 2, or (at your option) any later version.
13
14This program is distributed in the hope that it will be useful, but WITHOUT
15ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17See the GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along with
20this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24F02 Oct/28/02: Add SB device ID for 3147 and 3177.
25 Comment :
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
29
302004-02-16: <sda@bdit.de>
31- Removed unneeded 'legacy' pci stuff.
32- Make sure SIR mode is set (hw_init()) before calling mode-dependant stuff.
33- On speed change from core, don't send SIR frame with new speed.
34 Use current speed and change speeds later.
35- Make module-param dongle_id actually work.
36- New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
37 Tested with home-grown PCB on EPIA boards.
38- Code cleanup.
39
40 ********************************************************************/
41#include <linux/module.h>
42#include <linux/kernel.h>
43#include <linux/types.h>
44#include <linux/skbuff.h>
45#include <linux/netdevice.h>
46#include <linux/ioport.h>
47#include <linux/delay.h>
48#include <linux/slab.h>
49#include <linux/init.h>
50#include <linux/rtnetlink.h>
51#include <linux/pci.h>
52#include <linux/dma-mapping.h>
53
54#include <asm/io.h>
55#include <asm/dma.h>
56#include <asm/byteorder.h>
57
58#include <linux/pm.h>
59
60#include <net/irda/wrapper.h>
61#include <net/irda/irda.h>
62#include <net/irda/irda_device.h>
63
64#include "via-ircc.h"
65
66#define VIA_MODULE_NAME "via-ircc"
67#define CHIP_IO_EXTENT 0x40
68
69static char *driver_name = VIA_MODULE_NAME;
70
71/* Module parameters */
72static int qos_mtt_bits = 0x07; /* 1 ms or more */
73static int dongle_id = 0; /* default: probe */
74
75/* We can't guess the type of connected dongle, user *must* supply it. */
76module_param(dongle_id, int, 0);
77
78/* FIXME : we should not need this, because instances should be automatically
79 * managed by the PCI layer. Especially that we seem to only be using the
80 * first entry. Jean II */
81/* Max 4 instances for now */
82static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
83
84/* Some prototypes */
85static int via_ircc_open(int i, chipio_t * info, unsigned int id);
86static int via_ircc_close(struct via_ircc_cb *self);
87static int via_ircc_dma_receive(struct via_ircc_cb *self);
88static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
89 int iobase);
90static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
91 struct net_device *dev);
92static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
93 struct net_device *dev);
94static void via_hw_init(struct via_ircc_cb *self);
95static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
96static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
97 struct pt_regs *regs);
98static int via_ircc_is_receiving(struct via_ircc_cb *self);
99static int via_ircc_read_dongle_id(int iobase);
100
101static int via_ircc_net_open(struct net_device *dev);
102static int via_ircc_net_close(struct net_device *dev);
103static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
104 int cmd);
105static struct net_device_stats *via_ircc_net_get_stats(struct net_device
106 *dev);
107static void via_ircc_change_dongle_speed(int iobase, int speed,
108 int dongle_id);
109static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
110static void hwreset(struct via_ircc_cb *self);
111static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
112static int upload_rxdata(struct via_ircc_cb *self, int iobase);
113static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
114static void __devexit via_remove_one (struct pci_dev *pdev);
115
116/* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
117static void iodelay(int udelay)
118{
119 u8 data;
120 int i;
121
122 for (i = 0; i < udelay; i++) {
123 data = inb(0x80);
124 }
125}
126
127static struct pci_device_id via_pci_tbl[] = {
128 { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
129 { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
130 { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
131 { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
132 { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
133 { 0, }
134};
135
136MODULE_DEVICE_TABLE(pci,via_pci_tbl);
137
138
139static struct pci_driver via_driver = {
140 .name = VIA_MODULE_NAME,
141 .id_table = via_pci_tbl,
142 .probe = via_init_one,
143 .remove = __devexit_p(via_remove_one),
144};
145
146
147/*
148 * Function via_ircc_init ()
149 *
150 * Initialize chip. Just find out chip type and resource.
151 */
152static int __init via_ircc_init(void)
153{
154 int rc;
155
156 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
157
158 rc = pci_register_driver(&via_driver);
159 if (rc < 0) {
160 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
161 __FUNCTION__, rc);
162 return -ENODEV;
163 }
164 return 0;
165}
166
167static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
168{
169 int rc;
170 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
171 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
172 chipio_t info;
173
174 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __FUNCTION__, id->device);
175
176 rc = pci_enable_device (pcidev);
177 if (rc) {
178 IRDA_DEBUG(0, "%s(): error rc = %d\n", __FUNCTION__, rc);
179 return -ENODEV;
180 }
181
182 // South Bridge exist
183 if ( ReadLPCReg(0x20) != 0x3C )
184 Chipset=0x3096;
185 else
186 Chipset=0x3076;
187
188 if (Chipset==0x3076) {
189 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __FUNCTION__);
190
191 WriteLPCReg(7,0x0c );
192 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
193 if((temp&0x01)==1) { // BIOS close or no FIR
194 WriteLPCReg(0x1d, 0x82 );
195 WriteLPCReg(0x23,0x18);
196 temp=ReadLPCReg(0xF0);
197 if((temp&0x01)==0) {
198 temp=(ReadLPCReg(0x74)&0x03); //DMA
199 FirDRQ0=temp + 4;
200 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
201 FirDRQ1=temp + 4;
202 } else {
203 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
204 FirDRQ0=temp + 4;
205 FirDRQ1=FirDRQ0;
206 }
207 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
208 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
209 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
210 FirIOBase=FirIOBase ;
211 info.fir_base=FirIOBase;
212 info.irq=FirIRQ;
213 info.dma=FirDRQ1;
214 info.dma2=FirDRQ0;
215 pci_read_config_byte(pcidev,0x40,&bTmp);
216 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
217 pci_read_config_byte(pcidev,0x42,&bTmp);
218 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
219 pci_write_config_byte(pcidev,0x5a,0xc0);
220 WriteLPCReg(0x28, 0x70 );
221 if (via_ircc_open(0, &info,0x3076) == 0)
222 rc=0;
223 } else
224 rc = -ENODEV; //IR not turn on
225 } else { //Not VT1211
226 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __FUNCTION__);
227
228 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
229 if((bTmp&0x01)==1) { // BIOS enable FIR
230 //Enable Double DMA clock
231 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
232 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
233 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
234 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
235 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
236 pci_write_config_byte(pcidev,0x44,0x4e);
237 //---------- read configuration from Function0 of south bridge
238 if((bTmp&0x02)==0) {
239 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
240 FirDRQ0 = (bTmp1 & 0x30) >> 4;
241 pci_read_config_byte(pcidev,0x44,&bTmp1);
242 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
243 } else {
244 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
245 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
246 FirDRQ1=0;
247 }
248 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
249 FirIRQ = bTmp1 & 0x0f;
250
251 pci_read_config_byte(pcidev,0x69,&bTmp);
252 FirIOBase = bTmp << 8;//hight byte
253 pci_read_config_byte(pcidev,0x68,&bTmp);
254 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
255 //-------------------------
256 info.fir_base=FirIOBase;
257 info.irq=FirIRQ;
258 info.dma=FirDRQ1;
259 info.dma2=FirDRQ0;
260 if (via_ircc_open(0, &info,0x3096) == 0)
261 rc=0;
262 } else
263 rc = -ENODEV; //IR not turn on !!!!!
264 }//Not VT1211
265
266 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __FUNCTION__, rc);
267 return rc;
268}
269
270/*
271 * Function via_ircc_clean ()
272 *
273 * Close all configured chips
274 *
275 */
276static void via_ircc_clean(void)
277{
278 int i;
279
280 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
281
282 for (i=0; i < 4; i++) {
283 if (dev_self[i])
284 via_ircc_close(dev_self[i]);
285 }
286}
287
288static void __devexit via_remove_one (struct pci_dev *pdev)
289{
290 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
291
292 /* FIXME : This is ugly. We should use pci_get_drvdata(pdev);
293 * to get our driver instance and call directly via_ircc_close().
294 * See vlsi_ir for details...
295 * Jean II */
296 via_ircc_clean();
297
298 /* FIXME : This should be in via_ircc_close(), because here we may
299 * theoritically disable still configured devices :-( - Jean II */
300 pci_disable_device(pdev);
301}
302
303static void __exit via_ircc_cleanup(void)
304{
305 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
306
307 /* FIXME : This should be redundant, as pci_unregister_driver()
308 * should call via_remove_one() on each device.
309 * Jean II */
310 via_ircc_clean();
311
312 /* Cleanup all instances of the driver */
313 pci_unregister_driver (&via_driver);
314}
315
316/*
317 * Function via_ircc_open (iobase, irq)
318 *
319 * Open driver instance
320 *
321 */
322static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
323{
324 struct net_device *dev;
325 struct via_ircc_cb *self;
326 int err;
327
328 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
329
330 /* Allocate new instance of the driver */
331 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
332 if (dev == NULL)
333 return -ENOMEM;
334
335 self = dev->priv;
336 self->netdev = dev;
337 spin_lock_init(&self->lock);
338
339 /* FIXME : We should store our driver instance in the PCI layer,
340 * using pci_set_drvdata(), not in this array.
341 * See vlsi_ir for details... - Jean II */
342 /* FIXME : 'i' is always 0 (see via_init_one()) :-( - Jean II */
343 /* Need to store self somewhere */
344 dev_self[i] = self;
345 self->index = i;
346 /* Initialize Resource */
347 self->io.cfg_base = info->cfg_base;
348 self->io.fir_base = info->fir_base;
349 self->io.irq = info->irq;
350 self->io.fir_ext = CHIP_IO_EXTENT;
351 self->io.dma = info->dma;
352 self->io.dma2 = info->dma2;
353 self->io.fifo_size = 32;
354 self->chip_id = id;
355 self->st_fifo.len = 0;
356 self->RxDataReady = 0;
357
358 /* Reserve the ioports that we need */
359 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
360 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
361 __FUNCTION__, self->io.fir_base);
362 err = -ENODEV;
363 goto err_out1;
364 }
365
366 /* Initialize QoS for this device */
367 irda_init_max_qos_capabilies(&self->qos);
368
369 /* Check if user has supplied the dongle id or not */
370 if (!dongle_id)
371 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
372 self->io.dongle_id = dongle_id;
373
374 /* The only value we must override it the baudrate */
375 /* Maximum speeds and capabilities are dongle-dependant. */
376 switch( self->io.dongle_id ){
377 case 0x0d:
378 self->qos.baud_rate.bits =
379 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
380 IR_576000 | IR_1152000 | (IR_4000000 << 8);
381 break;
382 default:
383 self->qos.baud_rate.bits =
384 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
385 break;
386 }
387
388 /* Following was used for testing:
389 *
390 * self->qos.baud_rate.bits = IR_9600;
391 *
392 * Is is no good, as it prohibits (error-prone) speed-changes.
393 */
394
395 self->qos.min_turn_time.bits = qos_mtt_bits;
396 irda_qos_bits_to_value(&self->qos);
397
398 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
399 self->rx_buff.truesize = 14384 + 2048;
400 self->tx_buff.truesize = 14384 + 2048;
401
402 /* Allocate memory if needed */
403 self->rx_buff.head =
404 dma_alloc_coherent(NULL, self->rx_buff.truesize,
405 &self->rx_buff_dma, GFP_KERNEL);
406 if (self->rx_buff.head == NULL) {
407 err = -ENOMEM;
408 goto err_out2;
409 }
410 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
411
412 self->tx_buff.head =
413 dma_alloc_coherent(NULL, self->tx_buff.truesize,
414 &self->tx_buff_dma, GFP_KERNEL);
415 if (self->tx_buff.head == NULL) {
416 err = -ENOMEM;
417 goto err_out3;
418 }
419 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
420
421 self->rx_buff.in_frame = FALSE;
422 self->rx_buff.state = OUTSIDE_FRAME;
423 self->tx_buff.data = self->tx_buff.head;
424 self->rx_buff.data = self->rx_buff.head;
425
426 /* Reset Tx queue info */
427 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
428 self->tx_fifo.tail = self->tx_buff.head;
429
430 /* Keep track of module usage */
431 SET_MODULE_OWNER(dev);
432
433 /* Override the network functions we need to use */
434 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
435 dev->open = via_ircc_net_open;
436 dev->stop = via_ircc_net_close;
437 dev->do_ioctl = via_ircc_net_ioctl;
438 dev->get_stats = via_ircc_net_get_stats;
439
440 err = register_netdev(dev);
441 if (err)
442 goto err_out4;
443
444 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
445
446 /* Initialise the hardware..
447 */
448 self->io.speed = 9600;
449 via_hw_init(self);
450 return 0;
451 err_out4:
452 dma_free_coherent(NULL, self->tx_buff.truesize,
453 self->tx_buff.head, self->tx_buff_dma);
454 err_out3:
455 dma_free_coherent(NULL, self->rx_buff.truesize,
456 self->rx_buff.head, self->rx_buff_dma);
457 err_out2:
458 release_region(self->io.fir_base, self->io.fir_ext);
459 err_out1:
460 free_netdev(dev);
461 dev_self[i] = NULL;
462 return err;
463}
464
465/*
466 * Function via_ircc_close (self)
467 *
468 * Close driver instance
469 *
470 */
471static int via_ircc_close(struct via_ircc_cb *self)
472{
473 int iobase;
474
475 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
476
477 IRDA_ASSERT(self != NULL, return -1;);
478
479 iobase = self->io.fir_base;
480
481 ResetChip(iobase, 5); //hardware reset.
482 /* Remove netdevice */
483 unregister_netdev(self->netdev);
484
485 /* Release the PORT that this driver is using */
486 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
487 __FUNCTION__, self->io.fir_base);
488 release_region(self->io.fir_base, self->io.fir_ext);
489 if (self->tx_buff.head)
490 dma_free_coherent(NULL, self->tx_buff.truesize,
491 self->tx_buff.head, self->tx_buff_dma);
492 if (self->rx_buff.head)
493 dma_free_coherent(NULL, self->rx_buff.truesize,
494 self->rx_buff.head, self->rx_buff_dma);
495 dev_self[self->index] = NULL;
496
497 free_netdev(self->netdev);
498
499 return 0;
500}
501
502/*
503 * Function via_hw_init(self)
504 *
505 * Returns non-negative on success.
506 *
507 * Formerly via_ircc_setup
508 */
509static void via_hw_init(struct via_ircc_cb *self)
510{
511 int iobase = self->io.fir_base;
512
513 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
514
515 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
516 // FIFO Init
517 EnRXFIFOReadyInt(iobase, OFF);
518 EnRXFIFOHalfLevelInt(iobase, OFF);
519 EnTXFIFOHalfLevelInt(iobase, OFF);
520 EnTXFIFOUnderrunEOMInt(iobase, ON);
521 EnTXFIFOReadyInt(iobase, OFF);
522 InvertTX(iobase, OFF);
523 InvertRX(iobase, OFF);
524
525 if (ReadLPCReg(0x20) == 0x3c)
526 WriteLPCReg(0xF0, 0); // for VT1211
527 /* Int Init */
528 EnRXSpecInt(iobase, ON);
529
530 /* The following is basically hwreset */
531 /* If this is the case, why not just call hwreset() ? Jean II */
532 ResetChip(iobase, 5);
533 EnableDMA(iobase, OFF);
534 EnableTX(iobase, OFF);
535 EnableRX(iobase, OFF);
536 EnRXDMA(iobase, OFF);
537 EnTXDMA(iobase, OFF);
538 RXStart(iobase, OFF);
539 TXStart(iobase, OFF);
540 InitCard(iobase);
541 CommonInit(iobase);
542 SIRFilter(iobase, ON);
543 SetSIR(iobase, ON);
544 CRC16(iobase, ON);
545 EnTXCRC(iobase, 0);
546 WriteReg(iobase, I_ST_CT_0, 0x00);
547 SetBaudRate(iobase, 9600);
548 SetPulseWidth(iobase, 12);
549 SetSendPreambleCount(iobase, 0);
550
551 self->io.speed = 9600;
552 self->st_fifo.len = 0;
553
554 via_ircc_change_dongle_speed(iobase, self->io.speed,
555 self->io.dongle_id);
556
557 WriteReg(iobase, I_ST_CT_0, 0x80);
558}
559
560/*
561 * Function via_ircc_read_dongle_id (void)
562 *
563 */
564static int via_ircc_read_dongle_id(int iobase)
565{
566 int dongle_id = 9; /* Default to IBM */
567
568 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
569 return dongle_id;
570}
571
572/*
573 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
574 * Change speed of the attach dongle
575 * only implement two type of dongle currently.
576 */
577static void via_ircc_change_dongle_speed(int iobase, int speed,
578 int dongle_id)
579{
580 u8 mode = 0;
581
582 /* speed is unused, as we use IsSIROn()/IsMIROn() */
583 speed = speed;
584
585 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
586 __FUNCTION__, speed, iobase, dongle_id);
587
588 switch (dongle_id) {
589
590 /* Note: The dongle_id's listed here are derived from
591 * nsc-ircc.c */
592
593 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
594 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
595 InvertTX(iobase, OFF);
596 InvertRX(iobase, OFF);
597
598 EnRX2(iobase, ON); //sir to rx2
599 EnGPIOtoRX2(iobase, OFF);
600
601 if (IsSIROn(iobase)) { //sir
602 // Mode select Off
603 SlowIRRXLowActive(iobase, ON);
604 udelay(1000);
605 SlowIRRXLowActive(iobase, OFF);
606 } else {
607 if (IsMIROn(iobase)) { //mir
608 // Mode select On
609 SlowIRRXLowActive(iobase, OFF);
610 udelay(20);
611 } else { // fir
612 if (IsFIROn(iobase)) { //fir
613 // Mode select On
614 SlowIRRXLowActive(iobase, OFF);
615 udelay(20);
616 }
617 }
618 }
619 break;
620
621 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
622 UseOneRX(iobase, ON); //use ONE RX....RX1
623 InvertTX(iobase, OFF);
624 InvertRX(iobase, OFF); // invert RX pin
625
626 EnRX2(iobase, ON);
627 EnGPIOtoRX2(iobase, OFF);
628 if (IsSIROn(iobase)) { //sir
629 // Mode select On
630 SlowIRRXLowActive(iobase, ON);
631 udelay(20);
632 // Mode select Off
633 SlowIRRXLowActive(iobase, OFF);
634 }
635 if (IsMIROn(iobase)) { //mir
636 // Mode select On
637 SlowIRRXLowActive(iobase, OFF);
638 udelay(20);
639 // Mode select Off
640 SlowIRRXLowActive(iobase, ON);
641 } else { // fir
642 if (IsFIROn(iobase)) { //fir
643 // Mode select On
644 SlowIRRXLowActive(iobase, OFF);
645 // TX On
646 WriteTX(iobase, ON);
647 udelay(20);
648 // Mode select OFF
649 SlowIRRXLowActive(iobase, ON);
650 udelay(20);
651 // TX Off
652 WriteTX(iobase, OFF);
653 }
654 }
655 break;
656
657 case 0x0d:
658 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
659 InvertTX(iobase, OFF);
660 InvertRX(iobase, OFF);
661 SlowIRRXLowActive(iobase, OFF);
662 if (IsSIROn(iobase)) { //sir
663 EnGPIOtoRX2(iobase, OFF);
664 WriteGIO(iobase, OFF);
665 EnRX2(iobase, OFF); //sir to rx2
666 } else { // fir mir
667 EnGPIOtoRX2(iobase, OFF);
668 WriteGIO(iobase, OFF);
669 EnRX2(iobase, OFF); //fir to rx
670 }
671 break;
672
673 case 0x11: /* Temic TFDS4500 */
674
675 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __FUNCTION__);
676
677 UseOneRX(iobase, ON); //use ONE RX....RX1
678 InvertTX(iobase, OFF);
679 InvertRX(iobase, ON); // invert RX pin
680
681 EnRX2(iobase, ON); //sir to rx2
682 EnGPIOtoRX2(iobase, OFF);
683
684 if( IsSIROn(iobase) ){ //sir
685
686 // Mode select On
687 SlowIRRXLowActive(iobase, ON);
688 udelay(20);
689 // Mode select Off
690 SlowIRRXLowActive(iobase, OFF);
691
692 } else{
693 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __FUNCTION__);
694 }
695 break;
696
697 case 0x0ff: /* Vishay */
698 if (IsSIROn(iobase))
699 mode = 0;
700 else if (IsMIROn(iobase))
701 mode = 1;
702 else if (IsFIROn(iobase))
703 mode = 2;
704 else if (IsVFIROn(iobase))
705 mode = 5; //VFIR-16
706 SI_SetMode(iobase, mode);
707 break;
708
709 default:
710 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
711 __FUNCTION__, dongle_id);
712 }
713}
714
715/*
716 * Function via_ircc_change_speed (self, baud)
717 *
718 * Change the speed of the device
719 *
720 */
721static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
722{
723 struct net_device *dev = self->netdev;
724 u16 iobase;
725 u8 value = 0, bTmp;
726
727 iobase = self->io.fir_base;
728 /* Update accounting for new speed */
729 self->io.speed = speed;
730 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __FUNCTION__, speed);
731
732 WriteReg(iobase, I_ST_CT_0, 0x0);
733
734 /* Controller mode sellection */
735 switch (speed) {
736 case 2400:
737 case 9600:
738 case 19200:
739 case 38400:
740 case 57600:
741 case 115200:
742 value = (115200/speed)-1;
743 SetSIR(iobase, ON);
744 CRC16(iobase, ON);
745 break;
746 case 576000:
747 /* FIXME: this can't be right, as it's the same as 115200,
748 * and 576000 is MIR, not SIR. */
749 value = 0;
750 SetSIR(iobase, ON);
751 CRC16(iobase, ON);
752 break;
753 case 1152000:
754 value = 0;
755 SetMIR(iobase, ON);
756 /* FIXME: CRC ??? */
757 break;
758 case 4000000:
759 value = 0;
760 SetFIR(iobase, ON);
761 SetPulseWidth(iobase, 0);
762 SetSendPreambleCount(iobase, 14);
763 CRC16(iobase, OFF);
764 EnTXCRC(iobase, ON);
765 break;
766 case 16000000:
767 value = 0;
768 SetVFIR(iobase, ON);
769 /* FIXME: CRC ??? */
770 break;
771 default:
772 value = 0;
773 break;
774 }
775
776 /* Set baudrate to 0x19[2..7] */
777 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
778 bTmp |= value << 2;
779 WriteReg(iobase, I_CF_H_1, bTmp);
780
781 /* Some dongles may need to be informed about speed changes. */
782 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
783
784 /* Set FIFO size to 64 */
785 SetFIFO(iobase, 64);
786
787 /* Enable IR */
788 WriteReg(iobase, I_ST_CT_0, 0x80);
789
790 // EnTXFIFOHalfLevelInt(iobase,ON);
791
792 /* Enable some interrupts so we can receive frames */
793 //EnAllInt(iobase,ON);
794
795 if (IsSIROn(iobase)) {
796 SIRFilter(iobase, ON);
797 SIRRecvAny(iobase, ON);
798 } else {
799 SIRFilter(iobase, OFF);
800 SIRRecvAny(iobase, OFF);
801 }
802
803 if (speed > 115200) {
804 /* Install FIR xmit handler */
805 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
806 via_ircc_dma_receive(self);
807 } else {
808 /* Install SIR xmit handler */
809 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
810 }
811 netif_wake_queue(dev);
812}
813
814/*
815 * Function via_ircc_hard_xmit (skb, dev)
816 *
817 * Transmit the frame!
818 *
819 */
820static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
821 struct net_device *dev)
822{
823 struct via_ircc_cb *self;
824 unsigned long flags;
825 u16 iobase;
826 __u32 speed;
827
828 self = (struct via_ircc_cb *) dev->priv;
829 IRDA_ASSERT(self != NULL, return 0;);
830 iobase = self->io.fir_base;
831
832 netif_stop_queue(dev);
833 /* Check if we need to change the speed */
834 speed = irda_get_next_speed(skb);
835 if ((speed != self->io.speed) && (speed != -1)) {
836 /* Check for empty frame */
837 if (!skb->len) {
838 via_ircc_change_speed(self, speed);
839 dev->trans_start = jiffies;
840 dev_kfree_skb(skb);
841 return 0;
842 } else
843 self->new_speed = speed;
844 }
845 InitCard(iobase);
846 CommonInit(iobase);
847 SIRFilter(iobase, ON);
848 SetSIR(iobase, ON);
849 CRC16(iobase, ON);
850 EnTXCRC(iobase, 0);
851 WriteReg(iobase, I_ST_CT_0, 0x00);
852
853 spin_lock_irqsave(&self->lock, flags);
854 self->tx_buff.data = self->tx_buff.head;
855 self->tx_buff.len =
856 async_wrap_skb(skb, self->tx_buff.data,
857 self->tx_buff.truesize);
858
859 self->stats.tx_bytes += self->tx_buff.len;
860 /* Send this frame with old speed */
861 SetBaudRate(iobase, self->io.speed);
862 SetPulseWidth(iobase, 12);
863 SetSendPreambleCount(iobase, 0);
864 WriteReg(iobase, I_ST_CT_0, 0x80);
865
866 EnableTX(iobase, ON);
867 EnableRX(iobase, OFF);
868
869 ResetChip(iobase, 0);
870 ResetChip(iobase, 1);
871 ResetChip(iobase, 2);
872 ResetChip(iobase, 3);
873 ResetChip(iobase, 4);
874
875 EnAllInt(iobase, ON);
876 EnTXDMA(iobase, ON);
877 EnRXDMA(iobase, OFF);
878
879 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
880 DMA_TX_MODE);
881
882 SetSendByte(iobase, self->tx_buff.len);
883 RXStart(iobase, OFF);
884 TXStart(iobase, ON);
885
886 dev->trans_start = jiffies;
887 spin_unlock_irqrestore(&self->lock, flags);
888 dev_kfree_skb(skb);
889 return 0;
890}
891
892static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
893 struct net_device *dev)
894{
895 struct via_ircc_cb *self;
896 u16 iobase;
897 __u32 speed;
898 unsigned long flags;
899
900 self = (struct via_ircc_cb *) dev->priv;
901 iobase = self->io.fir_base;
902
903 if (self->st_fifo.len)
904 return 0;
905 if (self->chip_id == 0x3076)
906 iodelay(1500);
907 else
908 udelay(1500);
909 netif_stop_queue(dev);
910 speed = irda_get_next_speed(skb);
911 if ((speed != self->io.speed) && (speed != -1)) {
912 if (!skb->len) {
913 via_ircc_change_speed(self, speed);
914 dev->trans_start = jiffies;
915 dev_kfree_skb(skb);
916 return 0;
917 } else
918 self->new_speed = speed;
919 }
920 spin_lock_irqsave(&self->lock, flags);
921 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
922 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
923
924 self->tx_fifo.tail += skb->len;
925 self->stats.tx_bytes += skb->len;
926 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
927 skb->len);
928 self->tx_fifo.len++;
929 self->tx_fifo.free++;
930//F01 if (self->tx_fifo.len == 1) {
931 via_ircc_dma_xmit(self, iobase);
932//F01 }
933//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
934 dev->trans_start = jiffies;
935 dev_kfree_skb(skb);
936 spin_unlock_irqrestore(&self->lock, flags);
937 return 0;
938
939}
940
941static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
942{
943 EnTXDMA(iobase, OFF);
944 self->io.direction = IO_XMIT;
945 EnPhys(iobase, ON);
946 EnableTX(iobase, ON);
947 EnableRX(iobase, OFF);
948 ResetChip(iobase, 0);
949 ResetChip(iobase, 1);
950 ResetChip(iobase, 2);
951 ResetChip(iobase, 3);
952 ResetChip(iobase, 4);
953 EnAllInt(iobase, ON);
954 EnTXDMA(iobase, ON);
955 EnRXDMA(iobase, OFF);
956 irda_setup_dma(self->io.dma,
957 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
958 self->tx_buff.head) + self->tx_buff_dma,
959 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
960 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
961 __FUNCTION__, self->tx_fifo.ptr,
962 self->tx_fifo.queue[self->tx_fifo.ptr].len,
963 self->tx_fifo.len);
964
965 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
966 RXStart(iobase, OFF);
967 TXStart(iobase, ON);
968 return 0;
969
970}
971
972/*
973 * Function via_ircc_dma_xmit_complete (self)
974 *
975 * The transfer of a frame in finished. This function will only be called
976 * by the interrupt handler
977 *
978 */
979static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
980{
981 int iobase;
982 int ret = TRUE;
983 u8 Tx_status;
984
985 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
986
987 iobase = self->io.fir_base;
988 /* Disable DMA */
989// DisableDmaChannel(self->io.dma);
990 /* Check for underrrun! */
991 /* Clear bit, by writing 1 into it */
992 Tx_status = GetTXStatus(iobase);
993 if (Tx_status & 0x08) {
994 self->stats.tx_errors++;
995 self->stats.tx_fifo_errors++;
996 hwreset(self);
997// how to clear underrrun ?
998 } else {
999 self->stats.tx_packets++;
1000 ResetChip(iobase, 3);
1001 ResetChip(iobase, 4);
1002 }
1003 /* Check if we need to change the speed */
1004 if (self->new_speed) {
1005 via_ircc_change_speed(self, self->new_speed);
1006 self->new_speed = 0;
1007 }
1008
1009 /* Finished with this frame, so prepare for next */
1010 if (IsFIROn(iobase)) {
1011 if (self->tx_fifo.len) {
1012 self->tx_fifo.len--;
1013 self->tx_fifo.ptr++;
1014 }
1015 }
1016 IRDA_DEBUG(1,
1017 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
1018 __FUNCTION__,
1019 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
1020/* F01_S
1021 // Any frames to be sent back-to-back?
1022 if (self->tx_fifo.len) {
1023 // Not finished yet!
1024 via_ircc_dma_xmit(self, iobase);
1025 ret = FALSE;
1026 } else {
1027F01_E*/
1028 // Reset Tx FIFO info
1029 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1030 self->tx_fifo.tail = self->tx_buff.head;
1031//F01 }
1032
1033 // Make sure we have room for more frames
1034//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
1035 // Not busy transmitting anymore
1036 // Tell the network layer, that we can accept more frames
1037 netif_wake_queue(self->netdev);
1038//F01 }
1039 return ret;
1040}
1041
1042/*
1043 * Function via_ircc_dma_receive (self)
1044 *
1045 * Set configuration for receive a frame.
1046 *
1047 */
1048static int via_ircc_dma_receive(struct via_ircc_cb *self)
1049{
1050 int iobase;
1051
1052 iobase = self->io.fir_base;
1053
1054 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1055
1056 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1057 self->tx_fifo.tail = self->tx_buff.head;
1058 self->RxDataReady = 0;
1059 self->io.direction = IO_RECV;
1060 self->rx_buff.data = self->rx_buff.head;
1061 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1062 self->st_fifo.tail = self->st_fifo.head = 0;
1063
1064 EnPhys(iobase, ON);
1065 EnableTX(iobase, OFF);
1066 EnableRX(iobase, ON);
1067
1068 ResetChip(iobase, 0);
1069 ResetChip(iobase, 1);
1070 ResetChip(iobase, 2);
1071 ResetChip(iobase, 3);
1072 ResetChip(iobase, 4);
1073
1074 EnAllInt(iobase, ON);
1075 EnTXDMA(iobase, OFF);
1076 EnRXDMA(iobase, ON);
1077 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1078 self->rx_buff.truesize, DMA_RX_MODE);
1079 TXStart(iobase, OFF);
1080 RXStart(iobase, ON);
1081
1082 return 0;
1083}
1084
1085/*
1086 * Function via_ircc_dma_receive_complete (self)
1087 *
1088 * Controller Finished with receiving frames,
1089 * and this routine is call by ISR
1090 *
1091 */
1092static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1093 int iobase)
1094{
1095 struct st_fifo *st_fifo;
1096 struct sk_buff *skb;
1097 int len, i;
1098 u8 status = 0;
1099
1100 iobase = self->io.fir_base;
1101 st_fifo = &self->st_fifo;
1102
1103 if (self->io.speed < 4000000) { //Speed below FIR
1104 len = GetRecvByte(iobase, self);
1105 skb = dev_alloc_skb(len + 1);
1106 if (skb == NULL)
1107 return FALSE;
1108 // Make sure IP header gets aligned
1109 skb_reserve(skb, 1);
1110 skb_put(skb, len - 2);
1111 if (self->chip_id == 0x3076) {
1112 for (i = 0; i < len - 2; i++)
1113 skb->data[i] = self->rx_buff.data[i * 2];
1114 } else {
1115 if (self->chip_id == 0x3096) {
1116 for (i = 0; i < len - 2; i++)
1117 skb->data[i] =
1118 self->rx_buff.data[i];
1119 }
1120 }
1121 // Move to next frame
1122 self->rx_buff.data += len;
1123 self->stats.rx_bytes += len;
1124 self->stats.rx_packets++;
1125 skb->dev = self->netdev;
1126 skb->mac.raw = skb->data;
1127 skb->protocol = htons(ETH_P_IRDA);
1128 netif_rx(skb);
1129 return TRUE;
1130 }
1131
1132 else { //FIR mode
1133 len = GetRecvByte(iobase, self);
1134 if (len == 0)
1135 return TRUE; //interrupt only, data maybe move by RxT
1136 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1137 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1138 __FUNCTION__, len, RxCurCount(iobase, self),
1139 self->RxLastCount);
1140 hwreset(self);
1141 return FALSE;
1142 }
1143 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1144 __FUNCTION__,
1145 st_fifo->len, len - 4, RxCurCount(iobase, self));
1146
1147 st_fifo->entries[st_fifo->tail].status = status;
1148 st_fifo->entries[st_fifo->tail].len = len;
1149 st_fifo->pending_bytes += len;
1150 st_fifo->tail++;
1151 st_fifo->len++;
1152 if (st_fifo->tail > MAX_RX_WINDOW)
1153 st_fifo->tail = 0;
1154 self->RxDataReady = 0;
1155
1156 // It maybe have MAX_RX_WINDOW package receive by
1157 // receive_complete before Timer IRQ
1158/* F01_S
1159 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1160 RXStart(iobase,ON);
1161 SetTimer(iobase,4);
1162 }
1163 else {
1164F01_E */
1165 EnableRX(iobase, OFF);
1166 EnRXDMA(iobase, OFF);
1167 RXStart(iobase, OFF);
1168//F01_S
1169 // Put this entry back in fifo
1170 if (st_fifo->head > MAX_RX_WINDOW)
1171 st_fifo->head = 0;
1172 status = st_fifo->entries[st_fifo->head].status;
1173 len = st_fifo->entries[st_fifo->head].len;
1174 st_fifo->head++;
1175 st_fifo->len--;
1176
1177 skb = dev_alloc_skb(len + 1 - 4);
1178 /*
1179 * if frame size,data ptr,or skb ptr are wrong ,the get next
1180 * entry.
1181 */
1182 if ((skb == NULL) || (skb->data == NULL)
1183 || (self->rx_buff.data == NULL) || (len < 6)) {
1184 self->stats.rx_dropped++;
1185 return TRUE;
1186 }
1187 skb_reserve(skb, 1);
1188 skb_put(skb, len - 4);
1189
1190 memcpy(skb->data, self->rx_buff.data, len - 4);
1191 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __FUNCTION__,
1192 len - 4, self->rx_buff.data);
1193
1194 // Move to next frame
1195 self->rx_buff.data += len;
1196 self->stats.rx_bytes += len;
1197 self->stats.rx_packets++;
1198 skb->dev = self->netdev;
1199 skb->mac.raw = skb->data;
1200 skb->protocol = htons(ETH_P_IRDA);
1201 netif_rx(skb);
1202
1203//F01_E
1204 } //FIR
1205 return TRUE;
1206
1207}
1208
1209/*
1210 * if frame is received , but no INT ,then use this routine to upload frame.
1211 */
1212static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1213{
1214 struct sk_buff *skb;
1215 int len;
1216 struct st_fifo *st_fifo;
1217 st_fifo = &self->st_fifo;
1218
1219 len = GetRecvByte(iobase, self);
1220
1221 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len);
1222
1223 skb = dev_alloc_skb(len + 1);
1224 if ((skb == NULL) || ((len - 4) < 2)) {
1225 self->stats.rx_dropped++;
1226 return FALSE;
1227 }
1228 skb_reserve(skb, 1);
1229 skb_put(skb, len - 4 + 1);
1230 memcpy(skb->data, self->rx_buff.data, len - 4 + 1);
1231 st_fifo->tail++;
1232 st_fifo->len++;
1233 if (st_fifo->tail > MAX_RX_WINDOW)
1234 st_fifo->tail = 0;
1235 // Move to next frame
1236 self->rx_buff.data += len;
1237 self->stats.rx_bytes += len;
1238 self->stats.rx_packets++;
1239 skb->dev = self->netdev;
1240 skb->mac.raw = skb->data;
1241 skb->protocol = htons(ETH_P_IRDA);
1242 netif_rx(skb);
1243 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1244 RXStart(iobase, ON);
1245 } else {
1246 EnableRX(iobase, OFF);
1247 EnRXDMA(iobase, OFF);
1248 RXStart(iobase, OFF);
1249 }
1250 return TRUE;
1251}
1252
1253/*
1254 * Implement back to back receive , use this routine to upload data.
1255 */
1256
1257static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1258{
1259 struct st_fifo *st_fifo;
1260 struct sk_buff *skb;
1261 int len;
1262 u8 status;
1263
1264 st_fifo = &self->st_fifo;
1265
1266 if (CkRxRecv(iobase, self)) {
1267 // if still receiving ,then return ,don't upload frame
1268 self->RetryCount = 0;
1269 SetTimer(iobase, 20);
1270 self->RxDataReady++;
1271 return FALSE;
1272 } else
1273 self->RetryCount++;
1274
1275 if ((self->RetryCount >= 1) ||
1276 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1277 || (st_fifo->len >= (MAX_RX_WINDOW))) {
1278 while (st_fifo->len > 0) { //upload frame
1279 // Put this entry back in fifo
1280 if (st_fifo->head > MAX_RX_WINDOW)
1281 st_fifo->head = 0;
1282 status = st_fifo->entries[st_fifo->head].status;
1283 len = st_fifo->entries[st_fifo->head].len;
1284 st_fifo->head++;
1285 st_fifo->len--;
1286
1287 skb = dev_alloc_skb(len + 1 - 4);
1288 /*
1289 * if frame size, data ptr, or skb ptr are wrong,
1290 * then get next entry.
1291 */
1292 if ((skb == NULL) || (skb->data == NULL)
1293 || (self->rx_buff.data == NULL) || (len < 6)) {
1294 self->stats.rx_dropped++;
1295 continue;
1296 }
1297 skb_reserve(skb, 1);
1298 skb_put(skb, len - 4);
1299 memcpy(skb->data, self->rx_buff.data, len - 4);
1300
1301 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __FUNCTION__,
1302 len - 4, st_fifo->head);
1303
1304 // Move to next frame
1305 self->rx_buff.data += len;
1306 self->stats.rx_bytes += len;
1307 self->stats.rx_packets++;
1308 skb->dev = self->netdev;
1309 skb->mac.raw = skb->data;
1310 skb->protocol = htons(ETH_P_IRDA);
1311 netif_rx(skb);
1312 } //while
1313 self->RetryCount = 0;
1314
1315 IRDA_DEBUG(2,
1316 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1317 __FUNCTION__,
1318 GetHostStatus(iobase), GetRXStatus(iobase));
1319
1320 /*
1321 * if frame is receive complete at this routine ,then upload
1322 * frame.
1323 */
1324 if ((GetRXStatus(iobase) & 0x10)
1325 && (RxCurCount(iobase, self) != self->RxLastCount)) {
1326 upload_rxdata(self, iobase);
1327 if (irda_device_txqueue_empty(self->netdev))
1328 via_ircc_dma_receive(self);
1329 }
1330 } // timer detect complete
1331 else
1332 SetTimer(iobase, 4);
1333 return TRUE;
1334
1335}
1336
1337
1338
1339/*
1340 * Function via_ircc_interrupt (irq, dev_id, regs)
1341 *
1342 * An interrupt from the chip has arrived. Time to do some work
1343 *
1344 */
1345static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
1346 struct pt_regs *regs)
1347{
1348 struct net_device *dev = (struct net_device *) dev_id;
1349 struct via_ircc_cb *self;
1350 int iobase;
1351 u8 iHostIntType, iRxIntType, iTxIntType;
1352
1353 if (!dev) {
1354 IRDA_WARNING("%s: irq %d for unknown device.\n", driver_name,
1355 irq);
1356 return IRQ_NONE;
1357 }
1358 self = (struct via_ircc_cb *) dev->priv;
1359 iobase = self->io.fir_base;
1360 spin_lock(&self->lock);
1361 iHostIntType = GetHostStatus(iobase);
1362
1363 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1364 __FUNCTION__, iHostIntType,
1365 (iHostIntType & 0x40) ? "Timer" : "",
1366 (iHostIntType & 0x20) ? "Tx" : "",
1367 (iHostIntType & 0x10) ? "Rx" : "",
1368 (iHostIntType & 0x0e) >> 1);
1369
1370 if ((iHostIntType & 0x40) != 0) { //Timer Event
1371 self->EventFlag.TimeOut++;
1372 ClearTimerInt(iobase, 1);
1373 if (self->io.direction == IO_XMIT) {
1374 via_ircc_dma_xmit(self, iobase);
1375 }
1376 if (self->io.direction == IO_RECV) {
1377 /*
1378 * frame ready hold too long, must reset.
1379 */
1380 if (self->RxDataReady > 30) {
1381 hwreset(self);
1382 if (irda_device_txqueue_empty(self->netdev)) {
1383 via_ircc_dma_receive(self);
1384 }
1385 } else { // call this to upload frame.
1386 RxTimerHandler(self, iobase);
1387 }
1388 } //RECV
1389 } //Timer Event
1390 if ((iHostIntType & 0x20) != 0) { //Tx Event
1391 iTxIntType = GetTXStatus(iobase);
1392
1393 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1394 __FUNCTION__, iTxIntType,
1395 (iTxIntType & 0x08) ? "FIFO underr." : "",
1396 (iTxIntType & 0x04) ? "EOM" : "",
1397 (iTxIntType & 0x02) ? "FIFO ready" : "",
1398 (iTxIntType & 0x01) ? "Early EOM" : "");
1399
1400 if (iTxIntType & 0x4) {
1401 self->EventFlag.EOMessage++; // read and will auto clean
1402 if (via_ircc_dma_xmit_complete(self)) {
1403 if (irda_device_txqueue_empty
1404 (self->netdev)) {
1405 via_ircc_dma_receive(self);
1406 }
1407 } else {
1408 self->EventFlag.Unknown++;
1409 }
1410 } //EOP
1411 } //Tx Event
1412 //----------------------------------------
1413 if ((iHostIntType & 0x10) != 0) { //Rx Event
1414 /* Check if DMA has finished */
1415 iRxIntType = GetRXStatus(iobase);
1416
1417 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1418 __FUNCTION__, iRxIntType,
1419 (iRxIntType & 0x80) ? "PHY err." : "",
1420 (iRxIntType & 0x40) ? "CRC err" : "",
1421 (iRxIntType & 0x20) ? "FIFO overr." : "",
1422 (iRxIntType & 0x10) ? "EOF" : "",
1423 (iRxIntType & 0x08) ? "RxData" : "",
1424 (iRxIntType & 0x02) ? "RxMaxLen" : "",
1425 (iRxIntType & 0x01) ? "SIR bad" : "");
1426 if (!iRxIntType)
1427 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __FUNCTION__);
1428
1429 if (iRxIntType & 0x10) {
1430 if (via_ircc_dma_receive_complete(self, iobase)) {
1431//F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1432 via_ircc_dma_receive(self);
1433 }
1434 } // No ERR
1435 else { //ERR
1436 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1437 __FUNCTION__, iRxIntType, iHostIntType,
1438 RxCurCount(iobase, self),
1439 self->RxLastCount);
1440
1441 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1442 ResetChip(iobase, 0);
1443 ResetChip(iobase, 1);
1444 } else { //PHY,CRC ERR
1445
1446 if (iRxIntType != 0x08)
1447 hwreset(self); //F01
1448 }
1449 via_ircc_dma_receive(self);
1450 } //ERR
1451
1452 } //Rx Event
1453 spin_unlock(&self->lock);
1454 return IRQ_RETVAL(iHostIntType);
1455}
1456
1457static void hwreset(struct via_ircc_cb *self)
1458{
1459 int iobase;
1460 iobase = self->io.fir_base;
1461
1462 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1463
1464 ResetChip(iobase, 5);
1465 EnableDMA(iobase, OFF);
1466 EnableTX(iobase, OFF);
1467 EnableRX(iobase, OFF);
1468 EnRXDMA(iobase, OFF);
1469 EnTXDMA(iobase, OFF);
1470 RXStart(iobase, OFF);
1471 TXStart(iobase, OFF);
1472 InitCard(iobase);
1473 CommonInit(iobase);
1474 SIRFilter(iobase, ON);
1475 SetSIR(iobase, ON);
1476 CRC16(iobase, ON);
1477 EnTXCRC(iobase, 0);
1478 WriteReg(iobase, I_ST_CT_0, 0x00);
1479 SetBaudRate(iobase, 9600);
1480 SetPulseWidth(iobase, 12);
1481 SetSendPreambleCount(iobase, 0);
1482 WriteReg(iobase, I_ST_CT_0, 0x80);
1483
1484 /* Restore speed. */
1485 via_ircc_change_speed(self, self->io.speed);
1486
1487 self->st_fifo.len = 0;
1488}
1489
1490/*
1491 * Function via_ircc_is_receiving (self)
1492 *
1493 * Return TRUE is we are currently receiving a frame
1494 *
1495 */
1496static int via_ircc_is_receiving(struct via_ircc_cb *self)
1497{
1498 int status = FALSE;
1499 int iobase;
1500
1501 IRDA_ASSERT(self != NULL, return FALSE;);
1502
1503 iobase = self->io.fir_base;
1504 if (CkRxRecv(iobase, self))
1505 status = TRUE;
1506
1507 IRDA_DEBUG(2, "%s(): status=%x....\n", __FUNCTION__, status);
1508
1509 return status;
1510}
1511
1512
1513/*
1514 * Function via_ircc_net_open (dev)
1515 *
1516 * Start the device
1517 *
1518 */
1519static int via_ircc_net_open(struct net_device *dev)
1520{
1521 struct via_ircc_cb *self;
1522 int iobase;
1523 char hwname[32];
1524
1525 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1526
1527 IRDA_ASSERT(dev != NULL, return -1;);
1528 self = (struct via_ircc_cb *) dev->priv;
1529 self->stats.rx_packets = 0;
1530 IRDA_ASSERT(self != NULL, return 0;);
1531 iobase = self->io.fir_base;
1532 if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1533 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1534 self->io.irq);
1535 return -EAGAIN;
1536 }
1537 /*
1538 * Always allocate the DMA channel after the IRQ, and clean up on
1539 * failure.
1540 */
1541 if (request_dma(self->io.dma, dev->name)) {
1542 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1543 self->io.dma);
1544 free_irq(self->io.irq, self);
1545 return -EAGAIN;
1546 }
1547 if (self->io.dma2 != self->io.dma) {
1548 if (request_dma(self->io.dma2, dev->name)) {
1549 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1550 driver_name, self->io.dma2);
1551 free_irq(self->io.irq, self);
1552 return -EAGAIN;
1553 }
1554 }
1555
1556
1557 /* turn on interrupts */
1558 EnAllInt(iobase, ON);
1559 EnInternalLoop(iobase, OFF);
1560 EnExternalLoop(iobase, OFF);
1561
1562 /* */
1563 via_ircc_dma_receive(self);
1564
1565 /* Ready to play! */
1566 netif_start_queue(dev);
1567
1568 /*
1569 * Open new IrLAP layer instance, now that everything should be
1570 * initialized properly
1571 */
1572 sprintf(hwname, "VIA @ 0x%x", iobase);
1573 self->irlap = irlap_open(dev, &self->qos, hwname);
1574
1575 self->RxLastCount = 0;
1576
1577 return 0;
1578}
1579
1580/*
1581 * Function via_ircc_net_close (dev)
1582 *
1583 * Stop the device
1584 *
1585 */
1586static int via_ircc_net_close(struct net_device *dev)
1587{
1588 struct via_ircc_cb *self;
1589 int iobase;
1590
1591 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1592
1593 IRDA_ASSERT(dev != NULL, return -1;);
1594 self = (struct via_ircc_cb *) dev->priv;
1595 IRDA_ASSERT(self != NULL, return 0;);
1596
1597 /* Stop device */
1598 netif_stop_queue(dev);
1599 /* Stop and remove instance of IrLAP */
1600 if (self->irlap)
1601 irlap_close(self->irlap);
1602 self->irlap = NULL;
1603 iobase = self->io.fir_base;
1604 EnTXDMA(iobase, OFF);
1605 EnRXDMA(iobase, OFF);
1606 DisableDmaChannel(self->io.dma);
1607
1608 /* Disable interrupts */
1609 EnAllInt(iobase, OFF);
1610 free_irq(self->io.irq, dev);
1611 free_dma(self->io.dma);
1612
1613 return 0;
1614}
1615
1616/*
1617 * Function via_ircc_net_ioctl (dev, rq, cmd)
1618 *
1619 * Process IOCTL commands for this device
1620 *
1621 */
1622static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1623 int cmd)
1624{
1625 struct if_irda_req *irq = (struct if_irda_req *) rq;
1626 struct via_ircc_cb *self;
1627 unsigned long flags;
1628 int ret = 0;
1629
1630 IRDA_ASSERT(dev != NULL, return -1;);
1631 self = dev->priv;
1632 IRDA_ASSERT(self != NULL, return -1;);
1633 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name,
1634 cmd);
1635 /* Disable interrupts & save flags */
1636 spin_lock_irqsave(&self->lock, flags);
1637 switch (cmd) {
1638 case SIOCSBANDWIDTH: /* Set bandwidth */
1639 if (!capable(CAP_NET_ADMIN)) {
1640 ret = -EPERM;
1641 goto out;
1642 }
1643 via_ircc_change_speed(self, irq->ifr_baudrate);
1644 break;
1645 case SIOCSMEDIABUSY: /* Set media busy */
1646 if (!capable(CAP_NET_ADMIN)) {
1647 ret = -EPERM;
1648 goto out;
1649 }
1650 irda_device_set_media_busy(self->netdev, TRUE);
1651 break;
1652 case SIOCGRECEIVING: /* Check if we are receiving right now */
1653 irq->ifr_receiving = via_ircc_is_receiving(self);
1654 break;
1655 default:
1656 ret = -EOPNOTSUPP;
1657 }
1658 out:
1659 spin_unlock_irqrestore(&self->lock, flags);
1660 return ret;
1661}
1662
1663static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1664 *dev)
1665{
1666 struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1667
1668 return &self->stats;
1669}
1670
1671MODULE_AUTHOR("VIA Technologies,inc");
1672MODULE_DESCRIPTION("VIA IrDA Device Driver");
1673MODULE_LICENSE("GPL");
1674
1675module_init(via_ircc_init);
1676module_exit(via_ircc_cleanup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 12:27:38 -0500