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authorLen Brown <len.brown@intel.com>2005-09-08 01:45:47 -0400
committerLen Brown <len.brown@intel.com>2005-09-08 01:45:47 -0400
commit64e47488c913ac704d465a6af86a26786d1412a5 (patch)
treed3b0148592963dcde26e4bb35ddfec8b1eaf8e23 /drivers/net/irda/smsc-ircc2.c
parent4a35a46bf1cda4737c428380d1db5d15e2590d18 (diff)
parentcaf39e87cc1182f7dae84eefc43ca14d54c78ef9 (diff)
Merge linux-2.6 with linux-acpi-2.6
Diffstat (limited to 'drivers/net/irda/smsc-ircc2.c')
-rw-r--r--drivers/net/irda/smsc-ircc2.c1179
1 files changed, 577 insertions, 602 deletions
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c
index 10125a1dba22..dd89bda1f131 100644
--- a/drivers/net/irda/smsc-ircc2.c
+++ b/drivers/net/irda/smsc-ircc2.c
@@ -4,10 +4,10 @@
4 * Description: Driver for the SMC Infrared Communications Controller 4 * Description: Driver for the SMC Infrared Communications Controller
5 * Status: Experimental. 5 * Status: Experimental.
6 * Author: Daniele Peri (peri@csai.unipa.it) 6 * Author: Daniele Peri (peri@csai.unipa.it)
7 * Created at: 7 * Created at:
8 * Modified at: 8 * Modified at:
9 * Modified by: 9 * Modified by:
10 * 10 *
11 * Copyright (c) 2002 Daniele Peri 11 * Copyright (c) 2002 Daniele Peri
12 * All Rights Reserved. 12 * All Rights Reserved.
13 * Copyright (c) 2002 Jean Tourrilhes 13 * Copyright (c) 2002 Jean Tourrilhes
@@ -17,26 +17,26 @@
17 * 17 *
18 * Copyright (c) 2001 Stefani Seibold 18 * Copyright (c) 2001 Stefani Seibold
19 * Copyright (c) 1999-2001 Dag Brattli 19 * Copyright (c) 1999-2001 Dag Brattli
20 * Copyright (c) 1998-1999 Thomas Davis, 20 * Copyright (c) 1998-1999 Thomas Davis,
21 * 21 *
22 * and irport.c: 22 * and irport.c:
23 * 23 *
24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved. 24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
25 * 25 *
26 * 26 *
27 * This program is free software; you can redistribute it and/or 27 * This program is free software; you can redistribute it and/or
28 * modify it under the terms of the GNU General Public License as 28 * modify it under the terms of the GNU General Public License as
29 * published by the Free Software Foundation; either version 2 of 29 * published by the Free Software Foundation; either version 2 of
30 * the License, or (at your option) any later version. 30 * the License, or (at your option) any later version.
31 * 31 *
32 * This program is distributed in the hope that it will be useful, 32 * This program is distributed in the hope that it will be useful,
33 * but WITHOUT ANY WARRANTY; without even the implied warranty of 33 * but WITHOUT ANY WARRANTY; without even the implied warranty of
34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35 * GNU General Public License for more details. 35 * GNU General Public License for more details.
36 * 36 *
37 * You should have received a copy of the GNU General Public License 37 * You should have received a copy of the GNU General Public License
38 * along with this program; if not, write to the Free Software 38 * along with this program; if not, write to the Free Software
39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
40 * MA 02111-1307 USA 40 * MA 02111-1307 USA
41 * 41 *
42 ********************************************************************/ 42 ********************************************************************/
@@ -68,24 +68,42 @@
68#include "smsc-ircc2.h" 68#include "smsc-ircc2.h"
69#include "smsc-sio.h" 69#include "smsc-sio.h"
70 70
71
72MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
73MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
74MODULE_LICENSE("GPL");
75
76static int ircc_dma = 255;
77module_param(ircc_dma, int, 0);
78MODULE_PARM_DESC(ircc_dma, "DMA channel");
79
80static int ircc_irq = 255;
81module_param(ircc_irq, int, 0);
82MODULE_PARM_DESC(ircc_irq, "IRQ line");
83
84static int ircc_fir;
85module_param(ircc_fir, int, 0);
86MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
87
88static int ircc_sir;
89module_param(ircc_sir, int, 0);
90MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
91
92static int ircc_cfg;
93module_param(ircc_cfg, int, 0);
94MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
95
96static int ircc_transceiver;
97module_param(ircc_transceiver, int, 0);
98MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
99
71/* Types */ 100/* Types */
72 101
73struct smsc_transceiver { 102struct smsc_transceiver {
74 char *name; 103 char *name;
75 void (*set_for_speed)(int fir_base, u32 speed); 104 void (*set_for_speed)(int fir_base, u32 speed);
76 int (*probe)(int fir_base); 105 int (*probe)(int fir_base);
77}; 106};
78typedef struct smsc_transceiver smsc_transceiver_t;
79
80#if 0
81struct smc_chip {
82 char *name;
83 u16 flags;
84 u8 devid;
85 u8 rev;
86};
87typedef struct smc_chip smc_chip_t;
88#endif
89 107
90struct smsc_chip { 108struct smsc_chip {
91 char *name; 109 char *name;
@@ -96,20 +114,18 @@ struct smsc_chip {
96 u8 devid; 114 u8 devid;
97 u8 rev; 115 u8 rev;
98}; 116};
99typedef struct smsc_chip smsc_chip_t;
100 117
101struct smsc_chip_address { 118struct smsc_chip_address {
102 unsigned int cfg_base; 119 unsigned int cfg_base;
103 unsigned int type; 120 unsigned int type;
104}; 121};
105typedef struct smsc_chip_address smsc_chip_address_t;
106 122
107/* Private data for each instance */ 123/* Private data for each instance */
108struct smsc_ircc_cb { 124struct smsc_ircc_cb {
109 struct net_device *netdev; /* Yes! we are some kind of netdevice */ 125 struct net_device *netdev; /* Yes! we are some kind of netdevice */
110 struct net_device_stats stats; 126 struct net_device_stats stats;
111 struct irlap_cb *irlap; /* The link layer we are binded to */ 127 struct irlap_cb *irlap; /* The link layer we are binded to */
112 128
113 chipio_t io; /* IrDA controller information */ 129 chipio_t io; /* IrDA controller information */
114 iobuff_t tx_buff; /* Transmit buffer */ 130 iobuff_t tx_buff; /* Transmit buffer */
115 iobuff_t rx_buff; /* Receive buffer */ 131 iobuff_t rx_buff; /* Receive buffer */
@@ -119,7 +135,7 @@ struct smsc_ircc_cb {
119 struct qos_info qos; /* QoS capabilities for this device */ 135 struct qos_info qos; /* QoS capabilities for this device */
120 136
121 spinlock_t lock; /* For serializing operations */ 137 spinlock_t lock; /* For serializing operations */
122 138
123 __u32 new_speed; 139 __u32 new_speed;
124 __u32 flags; /* Interface flags */ 140 __u32 flags; /* Interface flags */
125 141
@@ -127,18 +143,20 @@ struct smsc_ircc_cb {
127 int tx_len; /* Number of frames in tx_buff */ 143 int tx_len; /* Number of frames in tx_buff */
128 144
129 int transceiver; 145 int transceiver;
130 struct pm_dev *pmdev; 146 struct platform_device *pldev;
131}; 147};
132 148
133/* Constants */ 149/* Constants */
134 150
135static const char *driver_name = "smsc-ircc2"; 151#define SMSC_IRCC2_DRIVER_NAME "smsc-ircc2"
136#define DIM(x) (sizeof(x)/(sizeof(*(x)))) 152
137#define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED 9600 153#define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED 9600
138#define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER 1 154#define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER 1
139#define SMSC_IRCC2_C_NET_TIMEOUT 0 155#define SMSC_IRCC2_C_NET_TIMEOUT 0
140#define SMSC_IRCC2_C_SIR_STOP 0 156#define SMSC_IRCC2_C_SIR_STOP 0
141 157
158static const char *driver_name = SMSC_IRCC2_DRIVER_NAME;
159
142/* Prototypes */ 160/* Prototypes */
143 161
144static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq); 162static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
@@ -147,15 +165,15 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base,
147static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self); 165static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
148static void smsc_ircc_init_chip(struct smsc_ircc_cb *self); 166static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
149static int __exit smsc_ircc_close(struct smsc_ircc_cb *self); 167static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
150static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase); 168static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
151static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase); 169static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
152static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self); 170static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
153static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev); 171static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
154static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev); 172static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
155static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs); 173static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
156static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase); 174static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
157static void smsc_ircc_change_speed(void *priv, u32 speed); 175static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed);
158static void smsc_ircc_set_sir_speed(void *priv, u32 speed); 176static void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, u32 speed);
159static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs); 177static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
160static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev); 178static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
161static void smsc_ircc_sir_start(struct smsc_ircc_cb *self); 179static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
@@ -171,7 +189,6 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cm
171static void smsc_ircc_timeout(struct net_device *dev); 189static void smsc_ircc_timeout(struct net_device *dev);
172#endif 190#endif
173static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev); 191static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
174static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
175static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self); 192static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
176static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self); 193static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
177static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed); 194static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
@@ -179,9 +196,9 @@ static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
179 196
180/* Probing */ 197/* Probing */
181static int __init smsc_ircc_look_for_chips(void); 198static int __init smsc_ircc_look_for_chips(void);
182static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type); 199static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
183static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg_base, char *type); 200static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
184static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cfg_base, char *type); 201static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
185static int __init smsc_superio_fdc(unsigned short cfg_base); 202static int __init smsc_superio_fdc(unsigned short cfg_base);
186static int __init smsc_superio_lpc(unsigned short cfg_base); 203static int __init smsc_superio_lpc(unsigned short cfg_base);
187 204
@@ -196,21 +213,26 @@ static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
196 213
197/* Power Management */ 214/* Power Management */
198 215
199static void smsc_ircc_suspend(struct smsc_ircc_cb *self); 216static int smsc_ircc_suspend(struct device *dev, pm_message_t state, u32 level);
200static void smsc_ircc_wakeup(struct smsc_ircc_cb *self); 217static int smsc_ircc_resume(struct device *dev, u32 level);
201static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
202 218
219static struct device_driver smsc_ircc_driver = {
220 .name = SMSC_IRCC2_DRIVER_NAME,
221 .bus = &platform_bus_type,
222 .suspend = smsc_ircc_suspend,
223 .resume = smsc_ircc_resume,
224};
203 225
204/* Transceivers for SMSC-ircc */ 226/* Transceivers for SMSC-ircc */
205 227
206static smsc_transceiver_t smsc_transceivers[]= 228static struct smsc_transceiver smsc_transceivers[] =
207{ 229{
208 { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800}, 230 { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
209 { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select}, 231 { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
210 { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc}, 232 { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
211 { NULL, NULL} 233 { NULL, NULL }
212}; 234};
213#define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (DIM(smsc_transceivers)-1) 235#define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
214 236
215/* SMC SuperIO chipsets definitions */ 237/* SMC SuperIO chipsets definitions */
216 238
@@ -221,7 +243,7 @@ static smsc_transceiver_t smsc_transceivers[]=
221#define FIR 4 /* SuperIO Chip has fast IRDA */ 243#define FIR 4 /* SuperIO Chip has fast IRDA */
222#define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */ 244#define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
223 245
224static smsc_chip_t __initdata fdc_chips_flat[]= 246static struct smsc_chip __initdata fdc_chips_flat[] =
225{ 247{
226 /* Base address 0x3f0 or 0x370 */ 248 /* Base address 0x3f0 or 0x370 */
227 { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip cannot be detected */ 249 { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip cannot be detected */
@@ -235,7 +257,7 @@ static smsc_chip_t __initdata fdc_chips_flat[]=
235 { NULL } 257 { NULL }
236}; 258};
237 259
238static smsc_chip_t __initdata fdc_chips_paged[]= 260static struct smsc_chip __initdata fdc_chips_paged[] =
239{ 261{
240 /* Base address 0x3f0 or 0x370 */ 262 /* Base address 0x3f0 or 0x370 */
241 { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 }, 263 { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 },
@@ -254,7 +276,7 @@ static smsc_chip_t __initdata fdc_chips_paged[]=
254 { NULL } 276 { NULL }
255}; 277};
256 278
257static smsc_chip_t __initdata lpc_chips_flat[]= 279static struct smsc_chip __initdata lpc_chips_flat[] =
258{ 280{
259 /* Base address 0x2E or 0x4E */ 281 /* Base address 0x2E or 0x4E */
260 { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 }, 282 { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 },
@@ -262,7 +284,7 @@ static smsc_chip_t __initdata lpc_chips_flat[]=
262 { NULL } 284 { NULL }
263}; 285};
264 286
265static smsc_chip_t __initdata lpc_chips_paged[]= 287static struct smsc_chip __initdata lpc_chips_paged[] =
266{ 288{
267 /* Base address 0x2E or 0x4E */ 289 /* Base address 0x2E or 0x4E */
268 { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 }, 290 { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 },
@@ -281,33 +303,25 @@ static smsc_chip_t __initdata lpc_chips_paged[]=
281#define SMSCSIO_TYPE_FLAT 4 303#define SMSCSIO_TYPE_FLAT 4
282#define SMSCSIO_TYPE_PAGED 8 304#define SMSCSIO_TYPE_PAGED 8
283 305
284static smsc_chip_address_t __initdata possible_addresses[]= 306static struct smsc_chip_address __initdata possible_addresses[] =
285{ 307{
286 {0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, 308 { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
287 {0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, 309 { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
288 {0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, 310 { 0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
289 {0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, 311 { 0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
290 {0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, 312 { 0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
291 {0,0} 313 { 0, 0 }
292}; 314};
293 315
294/* Globals */ 316/* Globals */
295 317
296static struct smsc_ircc_cb *dev_self[] = { NULL, NULL}; 318static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
297 319static unsigned short dev_count;
298static int ircc_irq=255;
299static int ircc_dma=255;
300static int ircc_fir=0;
301static int ircc_sir=0;
302static int ircc_cfg=0;
303static int ircc_transceiver=0;
304
305static unsigned short dev_count=0;
306 320
307static inline void register_bank(int iobase, int bank) 321static inline void register_bank(int iobase, int bank)
308{ 322{
309 outb(((inb(iobase+IRCC_MASTER) & 0xf0) | (bank & 0x07)), 323 outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
310 iobase+IRCC_MASTER); 324 iobase + IRCC_MASTER);
311} 325}
312 326
313 327
@@ -327,34 +341,44 @@ static inline void register_bank(int iobase, int bank)
327 */ 341 */
328static int __init smsc_ircc_init(void) 342static int __init smsc_ircc_init(void)
329{ 343{
330 int ret=-ENODEV; 344 int ret;
331 345
332 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 346 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
333 347
334 dev_count=0; 348 ret = driver_register(&smsc_ircc_driver);
335 349 if (ret) {
336 if ((ircc_fir>0)&&(ircc_sir>0)) { 350 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
351 return ret;
352 }
353
354 dev_count = 0;
355
356 if (ircc_fir > 0 && ircc_sir > 0) {
337 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir); 357 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
338 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir); 358 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
339 359
340 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq) == 0) 360 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq))
341 return 0; 361 ret = -ENODEV;
342 362 } else {
343 return -ENODEV; 363 ret = -ENODEV;
344 } 364
365 /* try user provided configuration register base address */
366 if (ircc_cfg > 0) {
367 IRDA_MESSAGE(" Overriding configuration address "
368 "0x%04x\n", ircc_cfg);
369 if (!smsc_superio_fdc(ircc_cfg))
370 ret = 0;
371 if (!smsc_superio_lpc(ircc_cfg))
372 ret = 0;
373 }
345 374
346 /* try user provided configuration register base address */ 375 if (smsc_ircc_look_for_chips() > 0)
347 if (ircc_cfg>0) {
348 IRDA_MESSAGE(" Overriding configuration address 0x%04x\n",
349 ircc_cfg);
350 if (!smsc_superio_fdc(ircc_cfg))
351 ret = 0;
352 if (!smsc_superio_lpc(ircc_cfg))
353 ret = 0; 376 ret = 0;
354 } 377 }
355 378
356 if(smsc_ircc_look_for_chips()>0) ret = 0; 379 if (ret)
357 380 driver_unregister(&smsc_ircc_driver);
381
358 return ret; 382 return ret;
359} 383}
360 384
@@ -369,15 +393,15 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
369 struct smsc_ircc_cb *self; 393 struct smsc_ircc_cb *self;
370 struct net_device *dev; 394 struct net_device *dev;
371 int err; 395 int err;
372 396
373 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 397 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
374 398
375 err = smsc_ircc_present(fir_base, sir_base); 399 err = smsc_ircc_present(fir_base, sir_base);
376 if(err) 400 if (err)
377 goto err_out; 401 goto err_out;
378 402
379 err = -ENOMEM; 403 err = -ENOMEM;
380 if (dev_count > DIM(dev_self)) { 404 if (dev_count >= ARRAY_SIZE(dev_self)) {
381 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__); 405 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
382 goto err_out1; 406 goto err_out1;
383 } 407 }
@@ -396,14 +420,14 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
396 dev->hard_start_xmit = smsc_ircc_hard_xmit_sir; 420 dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
397#if SMSC_IRCC2_C_NET_TIMEOUT 421#if SMSC_IRCC2_C_NET_TIMEOUT
398 dev->tx_timeout = smsc_ircc_timeout; 422 dev->tx_timeout = smsc_ircc_timeout;
399 dev->watchdog_timeo = HZ*2; /* Allow enough time for speed change */ 423 dev->watchdog_timeo = HZ * 2; /* Allow enough time for speed change */
400#endif 424#endif
401 dev->open = smsc_ircc_net_open; 425 dev->open = smsc_ircc_net_open;
402 dev->stop = smsc_ircc_net_close; 426 dev->stop = smsc_ircc_net_close;
403 dev->do_ioctl = smsc_ircc_net_ioctl; 427 dev->do_ioctl = smsc_ircc_net_ioctl;
404 dev->get_stats = smsc_ircc_net_get_stats; 428 dev->get_stats = smsc_ircc_net_get_stats;
405 429
406 self = dev->priv; 430 self = netdev_priv(dev);
407 self->netdev = dev; 431 self->netdev = dev;
408 432
409 /* Make ifconfig display some details */ 433 /* Make ifconfig display some details */
@@ -411,10 +435,10 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
411 dev->irq = self->io.irq = irq; 435 dev->irq = self->io.irq = irq;
412 436
413 /* Need to store self somewhere */ 437 /* Need to store self somewhere */
414 dev_self[dev_count++] = self; 438 dev_self[dev_count] = self;
415 spin_lock_init(&self->lock); 439 spin_lock_init(&self->lock);
416 440
417 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE; 441 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
418 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE; 442 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
419 443
420 self->rx_buff.head = 444 self->rx_buff.head =
@@ -442,33 +466,40 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
442 self->rx_buff.state = OUTSIDE_FRAME; 466 self->rx_buff.state = OUTSIDE_FRAME;
443 self->tx_buff.data = self->tx_buff.head; 467 self->tx_buff.data = self->tx_buff.head;
444 self->rx_buff.data = self->rx_buff.head; 468 self->rx_buff.data = self->rx_buff.head;
445
446 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
447 469
470 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
448 smsc_ircc_setup_qos(self); 471 smsc_ircc_setup_qos(self);
449
450 smsc_ircc_init_chip(self); 472 smsc_ircc_init_chip(self);
451 473
452 if(ircc_transceiver > 0 && 474 if (ircc_transceiver > 0 &&
453 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS) 475 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
454 self->transceiver = ircc_transceiver; 476 self->transceiver = ircc_transceiver;
455 else 477 else
456 smsc_ircc_probe_transceiver(self); 478 smsc_ircc_probe_transceiver(self);
457 479
458 err = register_netdev(self->netdev); 480 err = register_netdev(self->netdev);
459 if(err) { 481 if (err) {
460 IRDA_ERROR("%s, Network device registration failed!\n", 482 IRDA_ERROR("%s, Network device registration failed!\n",
461 driver_name); 483 driver_name);
462 goto err_out4; 484 goto err_out4;
463 } 485 }
464 486
465 self->pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, smsc_ircc_pmproc); 487 self->pldev = platform_device_register_simple(SMSC_IRCC2_DRIVER_NAME,
466 if (self->pmdev) 488 dev_count, NULL, 0);
467 self->pmdev->data = self; 489 if (IS_ERR(self->pldev)) {
490 err = PTR_ERR(self->pldev);
491 goto err_out5;
492 }
493 dev_set_drvdata(&self->pldev->dev, self);
468 494
469 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); 495 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
496 dev_count++;
470 497
471 return 0; 498 return 0;
499
500 err_out5:
501 unregister_netdev(self->netdev);
502
472 err_out4: 503 err_out4:
473 dma_free_coherent(NULL, self->tx_buff.truesize, 504 dma_free_coherent(NULL, self->tx_buff.truesize,
474 self->tx_buff.head, self->tx_buff_dma); 505 self->tx_buff.head, self->tx_buff_dma);
@@ -477,7 +508,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u
477 self->rx_buff.head, self->rx_buff_dma); 508 self->rx_buff.head, self->rx_buff_dma);
478 err_out2: 509 err_out2:
479 free_netdev(self->netdev); 510 free_netdev(self->netdev);
480 dev_self[--dev_count] = NULL; 511 dev_self[dev_count] = NULL;
481 err_out1: 512 err_out1:
482 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT); 513 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
483 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT); 514 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
@@ -511,16 +542,16 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
511 542
512 register_bank(fir_base, 3); 543 register_bank(fir_base, 3);
513 544
514 high = inb(fir_base+IRCC_ID_HIGH); 545 high = inb(fir_base + IRCC_ID_HIGH);
515 low = inb(fir_base+IRCC_ID_LOW); 546 low = inb(fir_base + IRCC_ID_LOW);
516 chip = inb(fir_base+IRCC_CHIP_ID); 547 chip = inb(fir_base + IRCC_CHIP_ID);
517 version = inb(fir_base+IRCC_VERSION); 548 version = inb(fir_base + IRCC_VERSION);
518 config = inb(fir_base+IRCC_INTERFACE); 549 config = inb(fir_base + IRCC_INTERFACE);
519 dma = config & IRCC_INTERFACE_DMA_MASK; 550 dma = config & IRCC_INTERFACE_DMA_MASK;
520 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; 551 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
521 552
522 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) { 553 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
523 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", 554 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
524 __FUNCTION__, fir_base); 555 __FUNCTION__, fir_base);
525 goto out3; 556 goto out3;
526 } 557 }
@@ -529,6 +560,7 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
529 chip & 0x0f, version, fir_base, sir_base, dma, irq); 560 chip & 0x0f, version, fir_base, sir_base, dma, irq);
530 561
531 return 0; 562 return 0;
563
532 out3: 564 out3:
533 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT); 565 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
534 out2: 566 out2:
@@ -543,16 +575,16 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
543 * Setup I/O 575 * Setup I/O
544 * 576 *
545 */ 577 */
546static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, 578static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
547 unsigned int fir_base, unsigned int sir_base, 579 unsigned int fir_base, unsigned int sir_base,
548 u8 dma, u8 irq) 580 u8 dma, u8 irq)
549{ 581{
550 unsigned char config, chip_dma, chip_irq; 582 unsigned char config, chip_dma, chip_irq;
551 583
552 register_bank(fir_base, 3); 584 register_bank(fir_base, 3);
553 config = inb(fir_base+IRCC_INTERFACE); 585 config = inb(fir_base + IRCC_INTERFACE);
554 chip_dma = config & IRCC_INTERFACE_DMA_MASK; 586 chip_dma = config & IRCC_INTERFACE_DMA_MASK;
555 chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; 587 chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
556 588
557 self->io.fir_base = fir_base; 589 self->io.fir_base = fir_base;
558 self->io.sir_base = sir_base; 590 self->io.sir_base = sir_base;
@@ -566,17 +598,15 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
566 IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n", 598 IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
567 driver_name, chip_irq, irq); 599 driver_name, chip_irq, irq);
568 self->io.irq = irq; 600 self->io.irq = irq;
569 } 601 } else
570 else
571 self->io.irq = chip_irq; 602 self->io.irq = chip_irq;
572 603
573 if (dma < 255) { 604 if (dma < 255) {
574 if (dma != chip_dma) 605 if (dma != chip_dma)
575 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n", 606 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
576 driver_name, chip_dma, dma); 607 driver_name, chip_dma, dma);
577 self->io.dma = dma; 608 self->io.dma = dma;
578 } 609 } else
579 else
580 self->io.dma = chip_dma; 610 self->io.dma = chip_dma;
581 611
582} 612}
@@ -591,7 +621,7 @@ static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
591{ 621{
592 /* Initialize QoS for this device */ 622 /* Initialize QoS for this device */
593 irda_init_max_qos_capabilies(&self->qos); 623 irda_init_max_qos_capabilies(&self->qos);
594 624
595 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| 625 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
596 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); 626 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
597 627
@@ -608,43 +638,43 @@ static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
608 */ 638 */
609static void smsc_ircc_init_chip(struct smsc_ircc_cb *self) 639static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
610{ 640{
611 int iobase, ir_mode, ctrl, fast; 641 int iobase, ir_mode, ctrl, fast;
612 642
613 IRDA_ASSERT( self != NULL, return; ); 643 IRDA_ASSERT(self != NULL, return;);
614 iobase = self->io.fir_base;
615 644
645 iobase = self->io.fir_base;
616 ir_mode = IRCC_CFGA_IRDA_SIR_A; 646 ir_mode = IRCC_CFGA_IRDA_SIR_A;
617 ctrl = 0; 647 ctrl = 0;
618 fast = 0; 648 fast = 0;
619 649
620 register_bank(iobase, 0); 650 register_bank(iobase, 0);
621 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER); 651 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
622 outb(0x00, iobase+IRCC_MASTER); 652 outb(0x00, iobase + IRCC_MASTER);
623 653
624 register_bank(iobase, 1); 654 register_bank(iobase, 1);
625 outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode), 655 outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | ir_mode),
626 iobase+IRCC_SCE_CFGA); 656 iobase + IRCC_SCE_CFGA);
627 657
628#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */ 658#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
629 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), 659 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
630 iobase+IRCC_SCE_CFGB); 660 iobase + IRCC_SCE_CFGB);
631#else 661#else
632 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), 662 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
633 iobase+IRCC_SCE_CFGB); 663 iobase + IRCC_SCE_CFGB);
634#endif 664#endif
635 (void) inb(iobase+IRCC_FIFO_THRESHOLD); 665 (void) inb(iobase + IRCC_FIFO_THRESHOLD);
636 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD); 666 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
637 667
638 register_bank(iobase, 4); 668 register_bank(iobase, 4);
639 outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL); 669 outb((inb(iobase + IRCC_CONTROL) & 0x30) | ctrl, iobase + IRCC_CONTROL);
640 670
641 register_bank(iobase, 0); 671 register_bank(iobase, 0);
642 outb(fast, iobase+IRCC_LCR_A); 672 outb(fast, iobase + IRCC_LCR_A);
643 673
644 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED); 674 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
645 675
646 /* Power on device */ 676 /* Power on device */
647 outb(0x00, iobase+IRCC_MASTER); 677 outb(0x00, iobase + IRCC_MASTER);
648} 678}
649 679
650/* 680/*
@@ -662,12 +692,12 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd
662 692
663 IRDA_ASSERT(dev != NULL, return -1;); 693 IRDA_ASSERT(dev != NULL, return -1;);
664 694
665 self = dev->priv; 695 self = netdev_priv(dev);
666 696
667 IRDA_ASSERT(self != NULL, return -1;); 697 IRDA_ASSERT(self != NULL, return -1;);
668 698
669 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); 699 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
670 700
671 switch (cmd) { 701 switch (cmd) {
672 case SIOCSBANDWIDTH: /* Set bandwidth */ 702 case SIOCSBANDWIDTH: /* Set bandwidth */
673 if (!capable(CAP_NET_ADMIN)) 703 if (!capable(CAP_NET_ADMIN))
@@ -703,14 +733,14 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd
703 default: 733 default:
704 ret = -EOPNOTSUPP; 734 ret = -EOPNOTSUPP;
705 } 735 }
706 736
707 return ret; 737 return ret;
708} 738}
709 739
710static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev) 740static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
711{ 741{
712 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv; 742 struct smsc_ircc_cb *self = netdev_priv(dev);
713 743
714 return &self->stats; 744 return &self->stats;
715} 745}
716 746
@@ -724,11 +754,9 @@ static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
724 754
725static void smsc_ircc_timeout(struct net_device *dev) 755static void smsc_ircc_timeout(struct net_device *dev)
726{ 756{
727 struct smsc_ircc_cb *self; 757 struct smsc_ircc_cb *self = netdev_priv(dev);
728 unsigned long flags; 758 unsigned long flags;
729 759
730 self = (struct smsc_ircc_cb *) dev->priv;
731
732 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n", 760 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
733 dev->name, self->io.speed); 761 dev->name, self->io.speed);
734 spin_lock_irqsave(&self->lock, flags); 762 spin_lock_irqsave(&self->lock, flags);
@@ -751,26 +779,23 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
751{ 779{
752 struct smsc_ircc_cb *self; 780 struct smsc_ircc_cb *self;
753 unsigned long flags; 781 unsigned long flags;
754 int iobase;
755 s32 speed; 782 s32 speed;
756 783
757 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 784 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
758 785
759 IRDA_ASSERT(dev != NULL, return 0;); 786 IRDA_ASSERT(dev != NULL, return 0;);
760
761 self = (struct smsc_ircc_cb *) dev->priv;
762 IRDA_ASSERT(self != NULL, return 0;);
763 787
764 iobase = self->io.sir_base; 788 self = netdev_priv(dev);
789 IRDA_ASSERT(self != NULL, return 0;);
765 790
766 netif_stop_queue(dev); 791 netif_stop_queue(dev);
767 792
768 /* Make sure test of self->io.speed & speed change are atomic */ 793 /* Make sure test of self->io.speed & speed change are atomic */
769 spin_lock_irqsave(&self->lock, flags); 794 spin_lock_irqsave(&self->lock, flags);
770 795
771 /* Check if we need to change the speed */ 796 /* Check if we need to change the speed */
772 speed = irda_get_next_speed(skb); 797 speed = irda_get_next_speed(skb);
773 if ((speed != self->io.speed) && (speed != -1)) { 798 if (speed != self->io.speed && speed != -1) {
774 /* Check for empty frame */ 799 /* Check for empty frame */
775 if (!skb->len) { 800 if (!skb->len) {
776 /* 801 /*
@@ -787,27 +812,26 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
787 spin_unlock_irqrestore(&self->lock, flags); 812 spin_unlock_irqrestore(&self->lock, flags);
788 dev_kfree_skb(skb); 813 dev_kfree_skb(skb);
789 return 0; 814 return 0;
790 } else {
791 self->new_speed = speed;
792 } 815 }
816 self->new_speed = speed;
793 } 817 }
794 818
795 /* Init tx buffer */ 819 /* Init tx buffer */
796 self->tx_buff.data = self->tx_buff.head; 820 self->tx_buff.data = self->tx_buff.head;
797 821
798 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */ 822 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
799 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, 823 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
800 self->tx_buff.truesize); 824 self->tx_buff.truesize);
801 825
802 self->stats.tx_bytes += self->tx_buff.len; 826 self->stats.tx_bytes += self->tx_buff.len;
803 827
804 /* Turn on transmit finished interrupt. Will fire immediately! */ 828 /* Turn on transmit finished interrupt. Will fire immediately! */
805 outb(UART_IER_THRI, iobase+UART_IER); 829 outb(UART_IER_THRI, self->io.sir_base + UART_IER);
806 830
807 spin_unlock_irqrestore(&self->lock, flags); 831 spin_unlock_irqrestore(&self->lock, flags);
808 832
809 dev_kfree_skb(skb); 833 dev_kfree_skb(skb);
810 834
811 return 0; 835 return 0;
812} 836}
813 837
@@ -826,9 +850,9 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
826 850
827 self->io.speed = speed; 851 self->io.speed = speed;
828 852
829 switch(speed) { 853 switch (speed) {
830 default: 854 default:
831 case 576000: 855 case 576000:
832 ir_mode = IRCC_CFGA_IRDA_HDLC; 856 ir_mode = IRCC_CFGA_IRDA_HDLC;
833 ctrl = IRCC_CRC; 857 ctrl = IRCC_CRC;
834 fast = 0; 858 fast = 0;
@@ -853,14 +877,14 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
853 Now in tranceiver! 877 Now in tranceiver!
854 /* This causes an interrupt */ 878 /* This causes an interrupt */
855 register_bank(fir_base, 0); 879 register_bank(fir_base, 0);
856 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast, fir_base+IRCC_LCR_A); 880 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast, fir_base + IRCC_LCR_A);
857 #endif 881 #endif
858 882
859 register_bank(fir_base, 1); 883 register_bank(fir_base, 1);
860 outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base+IRCC_SCE_CFGA); 884 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
861 885
862 register_bank(fir_base, 4); 886 register_bank(fir_base, 4);
863 outb((inb(fir_base+IRCC_CONTROL) & 0x30) | ctrl, fir_base+IRCC_CONTROL); 887 outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
864} 888}
865 889
866/* 890/*
@@ -885,31 +909,31 @@ static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
885 /* Reset everything */ 909 /* Reset everything */
886 910
887 /* Install FIR transmit handler */ 911 /* Install FIR transmit handler */
888 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir; 912 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
889 913
890 /* Clear FIFO */ 914 /* Clear FIFO */
891 outb(inb(fir_base+IRCC_LCR_A)|IRCC_LCR_A_FIFO_RESET, fir_base+IRCC_LCR_A); 915 outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
892 916
893 /* Enable interrupt */ 917 /* Enable interrupt */
894 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base+IRCC_IER);*/ 918 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
895 919
896 register_bank(fir_base, 1); 920 register_bank(fir_base, 1);
897 921
898 /* Select the TX/RX interface */ 922 /* Select the TX/RX interface */
899#ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */ 923#ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
900 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), 924 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
901 fir_base+IRCC_SCE_CFGB); 925 fir_base + IRCC_SCE_CFGB);
902#else 926#else
903 outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), 927 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
904 fir_base+IRCC_SCE_CFGB); 928 fir_base + IRCC_SCE_CFGB);
905#endif 929#endif
906 (void) inb(fir_base+IRCC_FIFO_THRESHOLD); 930 (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
907 931
908 /* Enable SCE interrupts */ 932 /* Enable SCE interrupts */
909 outb(0, fir_base+IRCC_MASTER); 933 outb(0, fir_base + IRCC_MASTER);
910 register_bank(fir_base, 0); 934 register_bank(fir_base, 0);
911 outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base+IRCC_IER); 935 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
912 outb(IRCC_MASTER_INT_EN, fir_base+IRCC_MASTER); 936 outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
913} 937}
914 938
915/* 939/*
@@ -923,13 +947,13 @@ static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
923 int fir_base; 947 int fir_base;
924 948
925 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 949 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
926 950
927 IRDA_ASSERT(self != NULL, return;); 951 IRDA_ASSERT(self != NULL, return;);
928 952
929 fir_base = self->io.fir_base; 953 fir_base = self->io.fir_base;
930 register_bank(fir_base, 0); 954 register_bank(fir_base, 0);
931 /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/ 955 /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
932 outb(inb(fir_base+IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base+IRCC_LCR_B); 956 outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
933} 957}
934 958
935 959
@@ -941,18 +965,15 @@ static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
941 * This function *must* be called with spinlock held, because it may 965 * This function *must* be called with spinlock held, because it may
942 * be called from the irq handler. - Jean II 966 * be called from the irq handler. - Jean II
943 */ 967 */
944static void smsc_ircc_change_speed(void *priv, u32 speed) 968static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed)
945{ 969{
946 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
947 struct net_device *dev; 970 struct net_device *dev;
948 int iobase;
949 int last_speed_was_sir; 971 int last_speed_was_sir;
950 972
951 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed); 973 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
952 974
953 IRDA_ASSERT(self != NULL, return;); 975 IRDA_ASSERT(self != NULL, return;);
954 dev = self->netdev; 976 dev = self->netdev;
955 iobase = self->io.fir_base;
956 977
957 last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED; 978 last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
958 979
@@ -961,30 +982,30 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
961 speed= 1152000; 982 speed= 1152000;
962 self->io.speed = speed; 983 self->io.speed = speed;
963 last_speed_was_sir = 0; 984 last_speed_was_sir = 0;
964 smsc_ircc_fir_start(self); 985 smsc_ircc_fir_start(self);
965 #endif 986 #endif
966 987
967 if(self->io.speed == 0) 988 if (self->io.speed == 0)
968 smsc_ircc_sir_start(self); 989 smsc_ircc_sir_start(self);
969 990
970 #if 0 991 #if 0
971 if(!last_speed_was_sir) speed = self->io.speed; 992 if (!last_speed_was_sir) speed = self->io.speed;
972 #endif 993 #endif
973 994
974 if(self->io.speed != speed) smsc_ircc_set_transceiver_for_speed(self, speed); 995 if (self->io.speed != speed)
996 smsc_ircc_set_transceiver_for_speed(self, speed);
975 997
976 self->io.speed = speed; 998 self->io.speed = speed;
977 999
978 if(speed <= SMSC_IRCC2_MAX_SIR_SPEED) { 1000 if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
979 if(!last_speed_was_sir) { 1001 if (!last_speed_was_sir) {
980 smsc_ircc_fir_stop(self); 1002 smsc_ircc_fir_stop(self);
981 smsc_ircc_sir_start(self); 1003 smsc_ircc_sir_start(self);
982 } 1004 }
983 smsc_ircc_set_sir_speed(self, speed); 1005 smsc_ircc_set_sir_speed(self, speed);
984 } 1006 } else {
985 else { 1007 if (last_speed_was_sir) {
986 if(last_speed_was_sir) { 1008 #if SMSC_IRCC2_C_SIR_STOP
987 #if SMSC_IRCC2_C_SIR_STOP
988 smsc_ircc_sir_stop(self); 1009 smsc_ircc_sir_stop(self);
989 #endif 1010 #endif
990 smsc_ircc_fir_start(self); 1011 smsc_ircc_fir_start(self);
@@ -994,13 +1015,13 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
994 #if 0 1015 #if 0
995 self->tx_buff.len = 10; 1016 self->tx_buff.len = 10;
996 self->tx_buff.data = self->tx_buff.head; 1017 self->tx_buff.data = self->tx_buff.head;
997 1018
998 smsc_ircc_dma_xmit(self, iobase, 4000); 1019 smsc_ircc_dma_xmit(self, 4000);
999 #endif 1020 #endif
1000 /* Be ready for incoming frames */ 1021 /* Be ready for incoming frames */
1001 smsc_ircc_dma_receive(self, iobase); 1022 smsc_ircc_dma_receive(self);
1002 } 1023 }
1003 1024
1004 netif_wake_queue(dev); 1025 netif_wake_queue(dev);
1005} 1026}
1006 1027
@@ -1010,10 +1031,9 @@ static void smsc_ircc_change_speed(void *priv, u32 speed)
1010 * Set speed of IrDA port to specified baudrate 1031 * Set speed of IrDA port to specified baudrate
1011 * 1032 *
1012 */ 1033 */
1013void smsc_ircc_set_sir_speed(void *priv, __u32 speed) 1034void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed)
1014{ 1035{
1015 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv; 1036 int iobase;
1016 int iobase;
1017 int fcr; /* FIFO control reg */ 1037 int fcr; /* FIFO control reg */
1018 int lcr; /* Line control reg */ 1038 int lcr; /* Line control reg */
1019 int divisor; 1039 int divisor;
@@ -1022,38 +1042,36 @@ void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
1022 1042
1023 IRDA_ASSERT(self != NULL, return;); 1043 IRDA_ASSERT(self != NULL, return;);
1024 iobase = self->io.sir_base; 1044 iobase = self->io.sir_base;
1025 1045
1026 /* Update accounting for new speed */ 1046 /* Update accounting for new speed */
1027 self->io.speed = speed; 1047 self->io.speed = speed;
1028 1048
1029 /* Turn off interrupts */ 1049 /* Turn off interrupts */
1030 outb(0, iobase+UART_IER); 1050 outb(0, iobase + UART_IER);
1051
1052 divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1031 1053
1032 divisor = SMSC_IRCC2_MAX_SIR_SPEED/speed;
1033
1034 fcr = UART_FCR_ENABLE_FIFO; 1054 fcr = UART_FCR_ENABLE_FIFO;
1035 1055
1036 /* 1056 /*
1037 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and 1057 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1038 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget 1058 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1039 * about this timeout since it will always be fast enough. 1059 * about this timeout since it will always be fast enough.
1040 */ 1060 */
1041 if (self->io.speed < 38400) 1061 fcr |= self->io.speed < 38400 ?
1042 fcr |= UART_FCR_TRIGGER_1; 1062 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1043 else 1063
1044 fcr |= UART_FCR_TRIGGER_14;
1045
1046 /* IrDA ports use 8N1 */ 1064 /* IrDA ports use 8N1 */
1047 lcr = UART_LCR_WLEN8; 1065 lcr = UART_LCR_WLEN8;
1048 1066
1049 outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ 1067 outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1050 outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ 1068 outb(divisor & 0xff, iobase + UART_DLL); /* Set speed */
1051 outb(divisor >> 8, iobase+UART_DLM); 1069 outb(divisor >> 8, iobase + UART_DLM);
1052 outb(lcr, iobase+UART_LCR); /* Set 8N1 */ 1070 outb(lcr, iobase + UART_LCR); /* Set 8N1 */
1053 outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ 1071 outb(fcr, iobase + UART_FCR); /* Enable FIFO's */
1054 1072
1055 /* Turn on interrups */ 1073 /* Turn on interrups */
1056 outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, iobase+UART_IER); 1074 outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1057 1075
1058 IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed); 1076 IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1059} 1077}
@@ -1070,15 +1088,12 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1070 struct smsc_ircc_cb *self; 1088 struct smsc_ircc_cb *self;
1071 unsigned long flags; 1089 unsigned long flags;
1072 s32 speed; 1090 s32 speed;
1073 int iobase;
1074 int mtt; 1091 int mtt;
1075 1092
1076 IRDA_ASSERT(dev != NULL, return 0;); 1093 IRDA_ASSERT(dev != NULL, return 0;);
1077 self = (struct smsc_ircc_cb *) dev->priv; 1094 self = netdev_priv(dev);
1078 IRDA_ASSERT(self != NULL, return 0;); 1095 IRDA_ASSERT(self != NULL, return 0;);
1079 1096
1080 iobase = self->io.fir_base;
1081
1082 netif_stop_queue(dev); 1097 netif_stop_queue(dev);
1083 1098
1084 /* Make sure test of self->io.speed & speed change are atomic */ 1099 /* Make sure test of self->io.speed & speed change are atomic */
@@ -1086,30 +1101,31 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1086 1101
1087 /* Check if we need to change the speed after this frame */ 1102 /* Check if we need to change the speed after this frame */
1088 speed = irda_get_next_speed(skb); 1103 speed = irda_get_next_speed(skb);
1089 if ((speed != self->io.speed) && (speed != -1)) { 1104 if (speed != self->io.speed && speed != -1) {
1090 /* Check for empty frame */ 1105 /* Check for empty frame */
1091 if (!skb->len) { 1106 if (!skb->len) {
1092 /* Note : you should make sure that speed changes 1107 /* Note : you should make sure that speed changes
1093 * are not going to corrupt any outgoing frame. 1108 * are not going to corrupt any outgoing frame.
1094 * Look at nsc-ircc for the gory details - Jean II */ 1109 * Look at nsc-ircc for the gory details - Jean II */
1095 smsc_ircc_change_speed(self, speed); 1110 smsc_ircc_change_speed(self, speed);
1096 spin_unlock_irqrestore(&self->lock, flags); 1111 spin_unlock_irqrestore(&self->lock, flags);
1097 dev_kfree_skb(skb); 1112 dev_kfree_skb(skb);
1098 return 0; 1113 return 0;
1099 } else 1114 }
1100 self->new_speed = speed; 1115
1116 self->new_speed = speed;
1101 } 1117 }
1102 1118
1103 memcpy(self->tx_buff.head, skb->data, skb->len); 1119 memcpy(self->tx_buff.head, skb->data, skb->len);
1104 1120
1105 self->tx_buff.len = skb->len; 1121 self->tx_buff.len = skb->len;
1106 self->tx_buff.data = self->tx_buff.head; 1122 self->tx_buff.data = self->tx_buff.head;
1107 1123
1108 mtt = irda_get_mtt(skb); 1124 mtt = irda_get_mtt(skb);
1109 if (mtt) { 1125 if (mtt) {
1110 int bofs; 1126 int bofs;
1111 1127
1112 /* 1128 /*
1113 * Compute how many BOFs (STA or PA's) we need to waste the 1129 * Compute how many BOFs (STA or PA's) we need to waste the
1114 * min turn time given the speed of the link. 1130 * min turn time given the speed of the link.
1115 */ 1131 */
@@ -1117,11 +1133,12 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1117 if (bofs > 4095) 1133 if (bofs > 4095)
1118 bofs = 4095; 1134 bofs = 4095;
1119 1135
1120 smsc_ircc_dma_xmit(self, iobase, bofs); 1136 smsc_ircc_dma_xmit(self, bofs);
1121 } else { 1137 } else {
1122 /* Transmit frame */ 1138 /* Transmit frame */
1123 smsc_ircc_dma_xmit(self, iobase, 0); 1139 smsc_ircc_dma_xmit(self, 0);
1124 } 1140 }
1141
1125 spin_unlock_irqrestore(&self->lock, flags); 1142 spin_unlock_irqrestore(&self->lock, flags);
1126 dev_kfree_skb(skb); 1143 dev_kfree_skb(skb);
1127 1144
@@ -1129,43 +1146,44 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1129} 1146}
1130 1147
1131/* 1148/*
1132 * Function smsc_ircc_dma_xmit (self, iobase) 1149 * Function smsc_ircc_dma_xmit (self, bofs)
1133 * 1150 *
1134 * Transmit data using DMA 1151 * Transmit data using DMA
1135 * 1152 *
1136 */ 1153 */
1137static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs) 1154static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1138{ 1155{
1156 int iobase = self->io.fir_base;
1139 u8 ctrl; 1157 u8 ctrl;
1140 1158
1141 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1159 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1142#if 1 1160#if 1
1143 /* Disable Rx */ 1161 /* Disable Rx */
1144 register_bank(iobase, 0); 1162 register_bank(iobase, 0);
1145 outb(0x00, iobase+IRCC_LCR_B); 1163 outb(0x00, iobase + IRCC_LCR_B);
1146#endif 1164#endif
1147 register_bank(iobase, 1); 1165 register_bank(iobase, 1);
1148 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1166 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1149 iobase+IRCC_SCE_CFGB); 1167 iobase + IRCC_SCE_CFGB);
1150 1168
1151 self->io.direction = IO_XMIT; 1169 self->io.direction = IO_XMIT;
1152 1170
1153 /* Set BOF additional count for generating the min turn time */ 1171 /* Set BOF additional count for generating the min turn time */
1154 register_bank(iobase, 4); 1172 register_bank(iobase, 4);
1155 outb(bofs & 0xff, iobase+IRCC_BOF_COUNT_LO); 1173 outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1156 ctrl = inb(iobase+IRCC_CONTROL) & 0xf0; 1174 ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1157 outb(ctrl | ((bofs >> 8) & 0x0f), iobase+IRCC_BOF_COUNT_HI); 1175 outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1158 1176
1159 /* Set max Tx frame size */ 1177 /* Set max Tx frame size */
1160 outb(self->tx_buff.len >> 8, iobase+IRCC_TX_SIZE_HI); 1178 outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1161 outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO); 1179 outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1162 1180
1163 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/ 1181 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1164 1182
1165 /* Enable burst mode chip Tx DMA */ 1183 /* Enable burst mode chip Tx DMA */
1166 register_bank(iobase, 1); 1184 register_bank(iobase, 1);
1167 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | 1185 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1168 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB); 1186 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1169 1187
1170 /* Setup DMA controller (must be done after enabling chip DMA) */ 1188 /* Setup DMA controller (must be done after enabling chip DMA) */
1171 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len, 1189 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
@@ -1174,50 +1192,52 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1174 /* Enable interrupt */ 1192 /* Enable interrupt */
1175 1193
1176 register_bank(iobase, 0); 1194 register_bank(iobase, 0);
1177 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER); 1195 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1178 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER); 1196 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1179 1197
1180 /* Enable transmit */ 1198 /* Enable transmit */
1181 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B); 1199 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1182} 1200}
1183 1201
1184/* 1202/*
1185 * Function smsc_ircc_dma_xmit_complete (self) 1203 * Function smsc_ircc_dma_xmit_complete (self)
1186 * 1204 *
1187 * The transfer of a frame in finished. This function will only be called 1205 * The transfer of a frame in finished. This function will only be called
1188 * by the interrupt handler 1206 * by the interrupt handler
1189 * 1207 *
1190 */ 1208 */
1191static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase) 1209static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1192{ 1210{
1211 int iobase = self->io.fir_base;
1212
1193 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1213 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1194#if 0 1214#if 0
1195 /* Disable Tx */ 1215 /* Disable Tx */
1196 register_bank(iobase, 0); 1216 register_bank(iobase, 0);
1197 outb(0x00, iobase+IRCC_LCR_B); 1217 outb(0x00, iobase + IRCC_LCR_B);
1198#endif 1218#endif
1199 register_bank(self->io.fir_base, 1); 1219 register_bank(iobase, 1);
1200 outb(inb(self->io.fir_base+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1220 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1201 self->io.fir_base+IRCC_SCE_CFGB); 1221 iobase + IRCC_SCE_CFGB);
1202 1222
1203 /* Check for underrun! */ 1223 /* Check for underrun! */
1204 register_bank(iobase, 0); 1224 register_bank(iobase, 0);
1205 if (inb(iobase+IRCC_LSR) & IRCC_LSR_UNDERRUN) { 1225 if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1206 self->stats.tx_errors++; 1226 self->stats.tx_errors++;
1207 self->stats.tx_fifo_errors++; 1227 self->stats.tx_fifo_errors++;
1208 1228
1209 /* Reset error condition */ 1229 /* Reset error condition */
1210 register_bank(iobase, 0); 1230 register_bank(iobase, 0);
1211 outb(IRCC_MASTER_ERROR_RESET, iobase+IRCC_MASTER); 1231 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1212 outb(0x00, iobase+IRCC_MASTER); 1232 outb(0x00, iobase + IRCC_MASTER);
1213 } else { 1233 } else {
1214 self->stats.tx_packets++; 1234 self->stats.tx_packets++;
1215 self->stats.tx_bytes += self->tx_buff.len; 1235 self->stats.tx_bytes += self->tx_buff.len;
1216 } 1236 }
1217 1237
1218 /* Check if it's time to change the speed */ 1238 /* Check if it's time to change the speed */
1219 if (self->new_speed) { 1239 if (self->new_speed) {
1220 smsc_ircc_change_speed(self, self->new_speed); 1240 smsc_ircc_change_speed(self, self->new_speed);
1221 self->new_speed = 0; 1241 self->new_speed = 0;
1222 } 1242 }
1223 1243
@@ -1231,31 +1251,32 @@ static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase)
1231 * if it starts to receive a frame. 1251 * if it starts to receive a frame.
1232 * 1252 *
1233 */ 1253 */
1234static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase) 1254static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1235{ 1255{
1256 int iobase = self->io.fir_base;
1236#if 0 1257#if 0
1237 /* Turn off chip DMA */ 1258 /* Turn off chip DMA */
1238 register_bank(iobase, 1); 1259 register_bank(iobase, 1);
1239 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1260 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1240 iobase+IRCC_SCE_CFGB); 1261 iobase + IRCC_SCE_CFGB);
1241#endif 1262#endif
1242 1263
1243 /* Disable Tx */ 1264 /* Disable Tx */
1244 register_bank(iobase, 0); 1265 register_bank(iobase, 0);
1245 outb(0x00, iobase+IRCC_LCR_B); 1266 outb(0x00, iobase + IRCC_LCR_B);
1246 1267
1247 /* Turn off chip DMA */ 1268 /* Turn off chip DMA */
1248 register_bank(iobase, 1); 1269 register_bank(iobase, 1);
1249 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, 1270 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1250 iobase+IRCC_SCE_CFGB); 1271 iobase + IRCC_SCE_CFGB);
1251 1272
1252 self->io.direction = IO_RECV; 1273 self->io.direction = IO_RECV;
1253 self->rx_buff.data = self->rx_buff.head; 1274 self->rx_buff.data = self->rx_buff.head;
1254 1275
1255 /* Set max Rx frame size */ 1276 /* Set max Rx frame size */
1256 register_bank(iobase, 4); 1277 register_bank(iobase, 4);
1257 outb((2050 >> 8) & 0x0f, iobase+IRCC_RX_SIZE_HI); 1278 outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1258 outb(2050 & 0xff, iobase+IRCC_RX_SIZE_LO); 1279 outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1259 1280
1260 /* Setup DMA controller */ 1281 /* Setup DMA controller */
1261 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, 1282 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
@@ -1263,83 +1284,83 @@ static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
1263 1284
1264 /* Enable burst mode chip Rx DMA */ 1285 /* Enable burst mode chip Rx DMA */
1265 register_bank(iobase, 1); 1286 register_bank(iobase, 1);
1266 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | 1287 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1267 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB); 1288 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1268 1289
1269 /* Enable interrupt */ 1290 /* Enable interrupt */
1270 register_bank(iobase, 0); 1291 register_bank(iobase, 0);
1271 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER); 1292 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1272 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER); 1293 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1273
1274 1294
1275 /* Enable receiver */ 1295 /* Enable receiver */
1276 register_bank(iobase, 0); 1296 register_bank(iobase, 0);
1277 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE, 1297 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1278 iobase+IRCC_LCR_B); 1298 iobase + IRCC_LCR_B);
1279 1299
1280 return 0; 1300 return 0;
1281} 1301}
1282 1302
1283/* 1303/*
1284 * Function smsc_ircc_dma_receive_complete(self, iobase) 1304 * Function smsc_ircc_dma_receive_complete(self)
1285 * 1305 *
1286 * Finished with receiving frames 1306 * Finished with receiving frames
1287 * 1307 *
1288 */ 1308 */
1289static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase) 1309static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1290{ 1310{
1291 struct sk_buff *skb; 1311 struct sk_buff *skb;
1292 int len, msgcnt, lsr; 1312 int len, msgcnt, lsr;
1293 1313 int iobase = self->io.fir_base;
1314
1294 register_bank(iobase, 0); 1315 register_bank(iobase, 0);
1295 1316
1296 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1317 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1297#if 0 1318#if 0
1298 /* Disable Rx */ 1319 /* Disable Rx */
1299 register_bank(iobase, 0); 1320 register_bank(iobase, 0);
1300 outb(0x00, iobase+IRCC_LCR_B); 1321 outb(0x00, iobase + IRCC_LCR_B);
1301#endif 1322#endif
1302 register_bank(iobase, 0); 1323 register_bank(iobase, 0);
1303 outb(inb(iobase+IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase+IRCC_LSAR); 1324 outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1304 lsr= inb(iobase+IRCC_LSR); 1325 lsr= inb(iobase + IRCC_LSR);
1305 msgcnt = inb(iobase+IRCC_LCR_B) & 0x08; 1326 msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1306 1327
1307 IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__, 1328 IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1308 get_dma_residue(self->io.dma)); 1329 get_dma_residue(self->io.dma));
1309 1330
1310 len = self->rx_buff.truesize - get_dma_residue(self->io.dma); 1331 len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1311 1332
1312 /* Look for errors 1333 /* Look for errors */
1313 */ 1334 if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1314
1315 if(lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1316 self->stats.rx_errors++; 1335 self->stats.rx_errors++;
1317 if(lsr & IRCC_LSR_FRAME_ERROR) self->stats.rx_frame_errors++; 1336 if (lsr & IRCC_LSR_FRAME_ERROR)
1318 if(lsr & IRCC_LSR_CRC_ERROR) self->stats.rx_crc_errors++; 1337 self->stats.rx_frame_errors++;
1319 if(lsr & IRCC_LSR_SIZE_ERROR) self->stats.rx_length_errors++; 1338 if (lsr & IRCC_LSR_CRC_ERROR)
1320 if(lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN)) self->stats.rx_length_errors++; 1339 self->stats.rx_crc_errors++;
1340 if (lsr & IRCC_LSR_SIZE_ERROR)
1341 self->stats.rx_length_errors++;
1342 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1343 self->stats.rx_length_errors++;
1321 return; 1344 return;
1322 } 1345 }
1346
1323 /* Remove CRC */ 1347 /* Remove CRC */
1324 if (self->io.speed < 4000000) 1348 len -= self->io.speed < 4000000 ? 2 : 4;
1325 len -= 2;
1326 else
1327 len -= 4;
1328 1349
1329 if ((len < 2) || (len > 2050)) { 1350 if (len < 2 || len > 2050) {
1330 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len); 1351 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1331 return; 1352 return;
1332 } 1353 }
1333 IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len); 1354 IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1334 1355
1335 skb = dev_alloc_skb(len+1); 1356 skb = dev_alloc_skb(len + 1);
1336 if (!skb) { 1357 if (!skb) {
1337 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n", 1358 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1338 __FUNCTION__); 1359 __FUNCTION__);
1339 return; 1360 return;
1340 } 1361 }
1341 /* Make sure IP header gets aligned */ 1362 /* Make sure IP header gets aligned */
1342 skb_reserve(skb, 1); 1363 skb_reserve(skb, 1);
1343 1364
1344 memcpy(skb_put(skb, len), self->rx_buff.data, len); 1365 memcpy(skb_put(skb, len), self->rx_buff.data, len);
1345 self->stats.rx_packets++; 1366 self->stats.rx_packets++;
@@ -1357,7 +1378,7 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase
1357 * Receive one frame from the infrared port 1378 * Receive one frame from the infrared port
1358 * 1379 *
1359 */ 1380 */
1360static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self) 1381static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1361{ 1382{
1362 int boguscount = 0; 1383 int boguscount = 0;
1363 int iobase; 1384 int iobase;
@@ -1366,20 +1387,20 @@ static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1366 1387
1367 iobase = self->io.sir_base; 1388 iobase = self->io.sir_base;
1368 1389
1369 /* 1390 /*
1370 * Receive all characters in Rx FIFO, unwrap and unstuff them. 1391 * Receive all characters in Rx FIFO, unwrap and unstuff them.
1371 * async_unwrap_char will deliver all found frames 1392 * async_unwrap_char will deliver all found frames
1372 */ 1393 */
1373 do { 1394 do {
1374 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff, 1395 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1375 inb(iobase+UART_RX)); 1396 inb(iobase + UART_RX));
1376 1397
1377 /* Make sure we don't stay here to long */ 1398 /* Make sure we don't stay here to long */
1378 if (boguscount++ > 32) { 1399 if (boguscount++ > 32) {
1379 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__); 1400 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1380 break; 1401 break;
1381 } 1402 }
1382 } while (inb(iobase+UART_LSR) & UART_LSR_DR); 1403 } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1383} 1404}
1384 1405
1385 1406
@@ -1397,18 +1418,19 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1397 irqreturn_t ret = IRQ_NONE; 1418 irqreturn_t ret = IRQ_NONE;
1398 1419
1399 if (dev == NULL) { 1420 if (dev == NULL) {
1400 printk(KERN_WARNING "%s: irq %d for unknown device.\n", 1421 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1401 driver_name, irq); 1422 driver_name, irq);
1402 goto irq_ret; 1423 goto irq_ret;
1403 } 1424 }
1404 self = (struct smsc_ircc_cb *) dev->priv; 1425
1426 self = netdev_priv(dev);
1405 IRDA_ASSERT(self != NULL, return IRQ_NONE;); 1427 IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1406 1428
1407 /* Serialise the interrupt handler in various CPUs, stop Tx path */ 1429 /* Serialise the interrupt handler in various CPUs, stop Tx path */
1408 spin_lock(&self->lock); 1430 spin_lock(&self->lock);
1409 1431
1410 /* Check if we should use the SIR interrupt handler */ 1432 /* Check if we should use the SIR interrupt handler */
1411 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) { 1433 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1412 ret = smsc_ircc_interrupt_sir(dev); 1434 ret = smsc_ircc_interrupt_sir(dev);
1413 goto irq_ret_unlock; 1435 goto irq_ret_unlock;
1414 } 1436 }
@@ -1416,25 +1438,25 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1416 iobase = self->io.fir_base; 1438 iobase = self->io.fir_base;
1417 1439
1418 register_bank(iobase, 0); 1440 register_bank(iobase, 0);
1419 iir = inb(iobase+IRCC_IIR); 1441 iir = inb(iobase + IRCC_IIR);
1420 if (iir == 0) 1442 if (iir == 0)
1421 goto irq_ret_unlock; 1443 goto irq_ret_unlock;
1422 ret = IRQ_HANDLED; 1444 ret = IRQ_HANDLED;
1423 1445
1424 /* Disable interrupts */ 1446 /* Disable interrupts */
1425 outb(0, iobase+IRCC_IER); 1447 outb(0, iobase + IRCC_IER);
1426 lcra = inb(iobase+IRCC_LCR_A); 1448 lcra = inb(iobase + IRCC_LCR_A);
1427 lsr = inb(iobase+IRCC_LSR); 1449 lsr = inb(iobase + IRCC_LSR);
1428 1450
1429 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir); 1451 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1430 1452
1431 if (iir & IRCC_IIR_EOM) { 1453 if (iir & IRCC_IIR_EOM) {
1432 if (self->io.direction == IO_RECV) 1454 if (self->io.direction == IO_RECV)
1433 smsc_ircc_dma_receive_complete(self, iobase); 1455 smsc_ircc_dma_receive_complete(self);
1434 else 1456 else
1435 smsc_ircc_dma_xmit_complete(self, iobase); 1457 smsc_ircc_dma_xmit_complete(self);
1436 1458
1437 smsc_ircc_dma_receive(self, iobase); 1459 smsc_ircc_dma_receive(self);
1438 } 1460 }
1439 1461
1440 if (iir & IRCC_IIR_ACTIVE_FRAME) { 1462 if (iir & IRCC_IIR_ACTIVE_FRAME) {
@@ -1444,7 +1466,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1444 /* Enable interrupts again */ 1466 /* Enable interrupts again */
1445 1467
1446 register_bank(iobase, 0); 1468 register_bank(iobase, 0);
1447 outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, iobase+IRCC_IER); 1469 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1448 1470
1449 irq_ret_unlock: 1471 irq_ret_unlock:
1450 spin_unlock(&self->lock); 1472 spin_unlock(&self->lock);
@@ -1459,7 +1481,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re
1459 */ 1481 */
1460static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev) 1482static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1461{ 1483{
1462 struct smsc_ircc_cb *self = dev->priv; 1484 struct smsc_ircc_cb *self = netdev_priv(dev);
1463 int boguscount = 0; 1485 int boguscount = 0;
1464 int iobase; 1486 int iobase;
1465 int iir, lsr; 1487 int iir, lsr;
@@ -1469,14 +1491,14 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1469 1491
1470 iobase = self->io.sir_base; 1492 iobase = self->io.sir_base;
1471 1493
1472 iir = inb(iobase+UART_IIR) & UART_IIR_ID; 1494 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1473 if (iir == 0) 1495 if (iir == 0)
1474 return IRQ_NONE; 1496 return IRQ_NONE;
1475 while (iir) { 1497 while (iir) {
1476 /* Clear interrupt */ 1498 /* Clear interrupt */
1477 lsr = inb(iobase+UART_LSR); 1499 lsr = inb(iobase + UART_LSR);
1478 1500
1479 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", 1501 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1480 __FUNCTION__, iir, lsr, iobase); 1502 __FUNCTION__, iir, lsr, iobase);
1481 1503
1482 switch (iir) { 1504 switch (iir) {
@@ -1496,13 +1518,13 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1496 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", 1518 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1497 __FUNCTION__, iir); 1519 __FUNCTION__, iir);
1498 break; 1520 break;
1499 } 1521 }
1500 1522
1501 /* Make sure we don't stay here to long */ 1523 /* Make sure we don't stay here to long */
1502 if (boguscount++ > 100) 1524 if (boguscount++ > 100)
1503 break; 1525 break;
1504 1526
1505 iir = inb(iobase + UART_IIR) & UART_IIR_ID; 1527 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1506 } 1528 }
1507 /*spin_unlock(&self->lock);*/ 1529 /*spin_unlock(&self->lock);*/
1508 return IRQ_HANDLED; 1530 return IRQ_HANDLED;
@@ -1529,7 +1551,7 @@ static int ircc_is_receiving(struct smsc_ircc_cb *self)
1529 get_dma_residue(self->io.dma)); 1551 get_dma_residue(self->io.dma));
1530 1552
1531 status = (self->rx_buff.state != OUTSIDE_FRAME); 1553 status = (self->rx_buff.state != OUTSIDE_FRAME);
1532 1554
1533 return status; 1555 return status;
1534} 1556}
1535#endif /* unused */ 1557#endif /* unused */
@@ -1544,19 +1566,16 @@ static int ircc_is_receiving(struct smsc_ircc_cb *self)
1544static int smsc_ircc_net_open(struct net_device *dev) 1566static int smsc_ircc_net_open(struct net_device *dev)
1545{ 1567{
1546 struct smsc_ircc_cb *self; 1568 struct smsc_ircc_cb *self;
1547 int iobase;
1548 char hwname[16]; 1569 char hwname[16];
1549 unsigned long flags; 1570 unsigned long flags;
1550 1571
1551 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 1572 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1552 1573
1553 IRDA_ASSERT(dev != NULL, return -1;); 1574 IRDA_ASSERT(dev != NULL, return -1;);
1554 self = (struct smsc_ircc_cb *) dev->priv; 1575 self = netdev_priv(dev);
1555 IRDA_ASSERT(self != NULL, return 0;); 1576 IRDA_ASSERT(self != NULL, return 0;);
1556
1557 iobase = self->io.fir_base;
1558 1577
1559 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name, 1578 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1560 (void *) dev)) { 1579 (void *) dev)) {
1561 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n", 1580 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1562 __FUNCTION__, self->io.irq); 1581 __FUNCTION__, self->io.irq);
@@ -1568,14 +1587,14 @@ static int smsc_ircc_net_open(struct net_device *dev)
1568 self->io.speed = 0; 1587 self->io.speed = 0;
1569 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED); 1588 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1570 spin_unlock_irqrestore(&self->lock, flags); 1589 spin_unlock_irqrestore(&self->lock, flags);
1571 1590
1572 /* Give self a hardware name */ 1591 /* Give self a hardware name */
1573 /* It would be cool to offer the chip revision here - Jean II */ 1592 /* It would be cool to offer the chip revision here - Jean II */
1574 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base); 1593 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1575 1594
1576 /* 1595 /*
1577 * Open new IrLAP layer instance, now that everything should be 1596 * Open new IrLAP layer instance, now that everything should be
1578 * initialized properly 1597 * initialized properly
1579 */ 1598 */
1580 self->irlap = irlap_open(dev, &self->qos, hwname); 1599 self->irlap = irlap_open(dev, &self->qos, hwname);
1581 1600
@@ -1590,7 +1609,7 @@ static int smsc_ircc_net_open(struct net_device *dev)
1590 __FUNCTION__, self->io.dma); 1609 __FUNCTION__, self->io.dma);
1591 return -EAGAIN; 1610 return -EAGAIN;
1592 } 1611 }
1593 1612
1594 netif_start_queue(dev); 1613 netif_start_queue(dev);
1595 1614
1596 return 0; 1615 return 0;
@@ -1605,73 +1624,53 @@ static int smsc_ircc_net_open(struct net_device *dev)
1605static int smsc_ircc_net_close(struct net_device *dev) 1624static int smsc_ircc_net_close(struct net_device *dev)
1606{ 1625{
1607 struct smsc_ircc_cb *self; 1626 struct smsc_ircc_cb *self;
1608 int iobase;
1609 1627
1610 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 1628 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1611 1629
1612 IRDA_ASSERT(dev != NULL, return -1;); 1630 IRDA_ASSERT(dev != NULL, return -1;);
1613 self = (struct smsc_ircc_cb *) dev->priv; 1631 self = netdev_priv(dev);
1614 IRDA_ASSERT(self != NULL, return 0;); 1632 IRDA_ASSERT(self != NULL, return 0;);
1615
1616 iobase = self->io.fir_base;
1617 1633
1618 /* Stop device */ 1634 /* Stop device */
1619 netif_stop_queue(dev); 1635 netif_stop_queue(dev);
1620 1636
1621 /* Stop and remove instance of IrLAP */ 1637 /* Stop and remove instance of IrLAP */
1622 if (self->irlap) 1638 if (self->irlap)
1623 irlap_close(self->irlap); 1639 irlap_close(self->irlap);
1624 self->irlap = NULL; 1640 self->irlap = NULL;
1625 1641
1626 free_irq(self->io.irq, dev); 1642 free_irq(self->io.irq, dev);
1627
1628 disable_dma(self->io.dma); 1643 disable_dma(self->io.dma);
1629
1630 free_dma(self->io.dma); 1644 free_dma(self->io.dma);
1631 1645
1632 return 0; 1646 return 0;
1633} 1647}
1634 1648
1635 1649static int smsc_ircc_suspend(struct device *dev, pm_message_t state, u32 level)
1636static void smsc_ircc_suspend(struct smsc_ircc_cb *self)
1637{ 1650{
1638 IRDA_MESSAGE("%s, Suspending\n", driver_name); 1651 struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1639 1652
1640 if (self->io.suspended) 1653 IRDA_MESSAGE("%s, Suspending\n", driver_name);
1641 return;
1642 1654
1643 smsc_ircc_net_close(self->netdev); 1655 if (level == SUSPEND_DISABLE && !self->io.suspended) {
1656 smsc_ircc_net_close(self->netdev);
1657 self->io.suspended = 1;
1658 }
1644 1659
1645 self->io.suspended = 1; 1660 return 0;
1646} 1661}
1647 1662
1648static void smsc_ircc_wakeup(struct smsc_ircc_cb *self) 1663static int smsc_ircc_resume(struct device *dev, u32 level)
1649{ 1664{
1650 if (!self->io.suspended) 1665 struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1651 return;
1652 1666
1653 /* The code was doing a "cli()" here, but this can't be right. 1667 if (level == RESUME_ENABLE && self->io.suspended) {
1654 * If you need protection, do it in net_open with a spinlock
1655 * or give a good reason. - Jean II */
1656 1668
1657 smsc_ircc_net_open(self->netdev); 1669 smsc_ircc_net_open(self->netdev);
1658 1670 self->io.suspended = 0;
1659 IRDA_MESSAGE("%s, Waking up\n", driver_name);
1660}
1661 1671
1662static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data) 1672 IRDA_MESSAGE("%s, Waking up\n", driver_name);
1663{ 1673 }
1664 struct smsc_ircc_cb *self = (struct smsc_ircc_cb*) dev->data;
1665 if (self) {
1666 switch (rqst) {
1667 case PM_SUSPEND:
1668 smsc_ircc_suspend(self);
1669 break;
1670 case PM_RESUME:
1671 smsc_ircc_wakeup(self);
1672 break;
1673 }
1674 }
1675 return 0; 1674 return 0;
1676} 1675}
1677 1676
@@ -1690,10 +1689,7 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1690 1689
1691 IRDA_ASSERT(self != NULL, return -1;); 1690 IRDA_ASSERT(self != NULL, return -1;);
1692 1691
1693 iobase = self->io.fir_base; 1692 platform_device_unregister(self->pldev);
1694
1695 if (self->pmdev)
1696 pm_unregister(self->pmdev);
1697 1693
1698 /* Remove netdevice */ 1694 /* Remove netdevice */
1699 unregister_netdev(self->netdev); 1695 unregister_netdev(self->netdev);
@@ -1702,15 +1698,16 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1702 spin_lock_irqsave(&self->lock, flags); 1698 spin_lock_irqsave(&self->lock, flags);
1703 1699
1704 /* Stop interrupts */ 1700 /* Stop interrupts */
1701 iobase = self->io.fir_base;
1705 register_bank(iobase, 0); 1702 register_bank(iobase, 0);
1706 outb(0, iobase+IRCC_IER); 1703 outb(0, iobase + IRCC_IER);
1707 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER); 1704 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1708 outb(0x00, iobase+IRCC_MASTER); 1705 outb(0x00, iobase + IRCC_MASTER);
1709#if 0 1706#if 0
1710 /* Reset to SIR mode */ 1707 /* Reset to SIR mode */
1711 register_bank(iobase, 1); 1708 register_bank(iobase, 1);
1712 outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase+IRCC_SCE_CFGA); 1709 outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase + IRCC_SCE_CFGA);
1713 outb(IRCC_CFGB_IR, iobase+IRCC_SCE_CFGB); 1710 outb(IRCC_CFGB_IR, iobase + IRCC_SCE_CFGB);
1714#endif 1711#endif
1715 spin_unlock_irqrestore(&self->lock, flags); 1712 spin_unlock_irqrestore(&self->lock, flags);
1716 1713
@@ -1720,7 +1717,7 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1720 1717
1721 release_region(self->io.fir_base, self->io.fir_ext); 1718 release_region(self->io.fir_base, self->io.fir_ext);
1722 1719
1723 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__, 1720 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1724 self->io.sir_base); 1721 self->io.sir_base);
1725 1722
1726 release_region(self->io.sir_base, self->io.sir_ext); 1723 release_region(self->io.sir_base, self->io.sir_ext);
@@ -1728,7 +1725,7 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1728 if (self->tx_buff.head) 1725 if (self->tx_buff.head)
1729 dma_free_coherent(NULL, self->tx_buff.truesize, 1726 dma_free_coherent(NULL, self->tx_buff.truesize,
1730 self->tx_buff.head, self->tx_buff_dma); 1727 self->tx_buff.head, self->tx_buff_dma);
1731 1728
1732 if (self->rx_buff.head) 1729 if (self->rx_buff.head)
1733 dma_free_coherent(NULL, self->rx_buff.truesize, 1730 dma_free_coherent(NULL, self->rx_buff.truesize,
1734 self->rx_buff.head, self->rx_buff_dma); 1731 self->rx_buff.head, self->rx_buff_dma);
@@ -1744,10 +1741,12 @@ static void __exit smsc_ircc_cleanup(void)
1744 1741
1745 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 1742 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1746 1743
1747 for (i=0; i < 2; i++) { 1744 for (i = 0; i < 2; i++) {
1748 if (dev_self[i]) 1745 if (dev_self[i])
1749 smsc_ircc_close(dev_self[i]); 1746 smsc_ircc_close(dev_self[i]);
1750 } 1747 }
1748
1749 driver_unregister(&smsc_ircc_driver);
1751} 1750}
1752 1751
1753/* 1752/*
@@ -1763,34 +1762,34 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1763 1762
1764 IRDA_DEBUG(3, "%s\n", __FUNCTION__); 1763 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1765 1764
1766 IRDA_ASSERT(self != NULL, return;); 1765 IRDA_ASSERT(self != NULL, return;);
1767 dev= self->netdev; 1766 dev = self->netdev;
1768 IRDA_ASSERT(dev != NULL, return;); 1767 IRDA_ASSERT(dev != NULL, return;);
1769 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir; 1768 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1770 1769
1771 fir_base = self->io.fir_base; 1770 fir_base = self->io.fir_base;
1772 sir_base = self->io.sir_base; 1771 sir_base = self->io.sir_base;
1773 1772
1774 /* Reset everything */ 1773 /* Reset everything */
1775 outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER); 1774 outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1776 1775
1777 #if SMSC_IRCC2_C_SIR_STOP 1776 #if SMSC_IRCC2_C_SIR_STOP
1778 /*smsc_ircc_sir_stop(self);*/ 1777 /*smsc_ircc_sir_stop(self);*/
1779 #endif 1778 #endif
1780 1779
1781 register_bank(fir_base, 1); 1780 register_bank(fir_base, 1);
1782 outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base+IRCC_SCE_CFGA); 1781 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1783 1782
1784 /* Initialize UART */ 1783 /* Initialize UART */
1785 outb(UART_LCR_WLEN8, sir_base+UART_LCR); /* Reset DLAB */ 1784 outb(UART_LCR_WLEN8, sir_base + UART_LCR); /* Reset DLAB */
1786 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base+UART_MCR); 1785 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1787 1786
1788 /* Turn on interrups */ 1787 /* Turn on interrups */
1789 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base+UART_IER); 1788 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1790 1789
1791 IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__); 1790 IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1792 1791
1793 outb(0x00, fir_base+IRCC_MASTER); 1792 outb(0x00, fir_base + IRCC_MASTER);
1794} 1793}
1795 1794
1796#if SMSC_IRCC2_C_SIR_STOP 1795#if SMSC_IRCC2_C_SIR_STOP
@@ -1802,10 +1801,10 @@ void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1802 iobase = self->io.sir_base; 1801 iobase = self->io.sir_base;
1803 1802
1804 /* Reset UART */ 1803 /* Reset UART */
1805 outb(0, iobase+UART_MCR); 1804 outb(0, iobase + UART_MCR);
1806 1805
1807 /* Turn off interrupts */ 1806 /* Turn off interrupts */
1808 outb(0, iobase+UART_IER); 1807 outb(0, iobase + UART_IER);
1809} 1808}
1810#endif 1809#endif
1811 1810
@@ -1831,16 +1830,16 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1831 /* Finished with frame? */ 1830 /* Finished with frame? */
1832 if (self->tx_buff.len > 0) { 1831 if (self->tx_buff.len > 0) {
1833 /* Write data left in transmit buffer */ 1832 /* Write data left in transmit buffer */
1834 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size, 1833 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1835 self->tx_buff.data, self->tx_buff.len); 1834 self->tx_buff.data, self->tx_buff.len);
1836 self->tx_buff.data += actual; 1835 self->tx_buff.data += actual;
1837 self->tx_buff.len -= actual; 1836 self->tx_buff.len -= actual;
1838 } else { 1837 } else {
1839 1838
1840 /*if (self->tx_buff.len ==0) {*/ 1839 /*if (self->tx_buff.len ==0) {*/
1841 1840
1842 /* 1841 /*
1843 * Now serial buffer is almost free & we can start 1842 * Now serial buffer is almost free & we can start
1844 * transmission of another packet. But first we must check 1843 * transmission of another packet. But first we must check
1845 * if we need to change the speed of the hardware 1844 * if we need to change the speed of the hardware
1846 */ 1845 */
@@ -1856,21 +1855,19 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1856 } 1855 }
1857 self->stats.tx_packets++; 1856 self->stats.tx_packets++;
1858 1857
1859 if(self->io.speed <= 115200) { 1858 if (self->io.speed <= 115200) {
1860 /* 1859 /*
1861 * Reset Rx FIFO to make sure that all reflected transmit data 1860 * Reset Rx FIFO to make sure that all reflected transmit data
1862 * is discarded. This is needed for half duplex operation 1861 * is discarded. This is needed for half duplex operation
1863 */ 1862 */
1864 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR; 1863 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1865 if (self->io.speed < 38400) 1864 fcr |= self->io.speed < 38400 ?
1866 fcr |= UART_FCR_TRIGGER_1; 1865 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1867 else
1868 fcr |= UART_FCR_TRIGGER_14;
1869 1866
1870 outb(fcr, iobase+UART_FCR); 1867 outb(fcr, iobase + UART_FCR);
1871 1868
1872 /* Turn on receive interrupts */ 1869 /* Turn on receive interrupts */
1873 outb(UART_IER_RDI, iobase+UART_IER); 1870 outb(UART_IER_RDI, iobase + UART_IER);
1874 } 1871 }
1875 } 1872 }
1876} 1873}
@@ -1884,17 +1881,17 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1884static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) 1881static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1885{ 1882{
1886 int actual = 0; 1883 int actual = 0;
1887 1884
1888 /* Tx FIFO should be empty! */ 1885 /* Tx FIFO should be empty! */
1889 if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { 1886 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1890 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__); 1887 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1891 return 0; 1888 return 0;
1892 } 1889 }
1893 1890
1894 /* Fill FIFO with current frame */ 1891 /* Fill FIFO with current frame */
1895 while ((fifo_size-- > 0) && (actual < len)) { 1892 while (fifo_size-- > 0 && actual < len) {
1896 /* Transmit next byte */ 1893 /* Transmit next byte */
1897 outb(buf[actual], iobase+UART_TX); 1894 outb(buf[actual], iobase + UART_TX);
1898 actual++; 1895 actual++;
1899 } 1896 }
1900 return actual; 1897 return actual;
@@ -1921,20 +1918,21 @@ static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1921static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self) 1918static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1922{ 1919{
1923 unsigned int i; 1920 unsigned int i;
1924 1921
1925 IRDA_ASSERT(self != NULL, return;); 1922 IRDA_ASSERT(self != NULL, return;);
1926 1923
1927 for(i=0; smsc_transceivers[i].name!=NULL; i++) 1924 for (i = 0; smsc_transceivers[i].name != NULL; i++)
1928 if((*smsc_transceivers[i].probe)(self->io.fir_base)) { 1925 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1929 IRDA_MESSAGE(" %s transceiver found\n", 1926 IRDA_MESSAGE(" %s transceiver found\n",
1930 smsc_transceivers[i].name); 1927 smsc_transceivers[i].name);
1931 self->transceiver= i+1; 1928 self->transceiver= i + 1;
1932 return; 1929 return;
1933 } 1930 }
1931
1934 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n", 1932 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1935 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name); 1933 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1936 1934
1937 self->transceiver= SMSC_IRCC2_C_DEFAULT_TRANSCEIVER; 1935 self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1938} 1936}
1939 1937
1940 1938
@@ -1947,9 +1945,10 @@ static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1947static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed) 1945static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1948{ 1946{
1949 unsigned int trx; 1947 unsigned int trx;
1950 1948
1951 trx = self->transceiver; 1949 trx = self->transceiver;
1952 if(trx>0) (*smsc_transceivers[trx-1].set_for_speed)(self->io.fir_base, speed); 1950 if (trx > 0)
1951 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1953} 1952}
1954 1953
1955/* 1954/*
@@ -1977,16 +1976,14 @@ static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 s
1977 1976
1978static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self) 1977static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1979{ 1978{
1980 int iobase; 1979 int iobase = self->io.sir_base;
1981 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US; 1980 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
1982 1981
1983 iobase = self->io.sir_base;
1984
1985 /* Calibrated busy loop */ 1982 /* Calibrated busy loop */
1986 while((count-- > 0) && !(inb(iobase+UART_LSR) & UART_LSR_TEMT)) 1983 while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
1987 udelay(1); 1984 udelay(1);
1988 1985
1989 if(count == 0) 1986 if (count == 0)
1990 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__); 1987 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
1991} 1988}
1992 1989
@@ -1998,40 +1995,42 @@ static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1998 1995
1999static int __init smsc_ircc_look_for_chips(void) 1996static int __init smsc_ircc_look_for_chips(void)
2000{ 1997{
2001 smsc_chip_address_t *address; 1998 struct smsc_chip_address *address;
2002 char *type; 1999 char *type;
2003 unsigned int cfg_base, found; 2000 unsigned int cfg_base, found;
2004 2001
2005 found = 0; 2002 found = 0;
2006 address = possible_addresses; 2003 address = possible_addresses;
2007 2004
2008 while(address->cfg_base){ 2005 while (address->cfg_base) {
2009 cfg_base = address->cfg_base; 2006 cfg_base = address->cfg_base;
2010 2007
2011 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/ 2008 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2012 2009
2013 if( address->type & SMSCSIO_TYPE_FDC){ 2010 if (address->type & SMSCSIO_TYPE_FDC) {
2014 type = "FDC"; 2011 type = "FDC";
2015 if((address->type) & SMSCSIO_TYPE_FLAT) { 2012 if (address->type & SMSCSIO_TYPE_FLAT)
2016 if(!smsc_superio_flat(fdc_chips_flat,cfg_base, type)) found++; 2013 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2017 } 2014 found++;
2018 if((address->type) & SMSCSIO_TYPE_PAGED) { 2015
2019 if(!smsc_superio_paged(fdc_chips_paged,cfg_base, type)) found++; 2016 if (address->type & SMSCSIO_TYPE_PAGED)
2020 } 2017 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2018 found++;
2021 } 2019 }
2022 if( address->type & SMSCSIO_TYPE_LPC){ 2020 if (address->type & SMSCSIO_TYPE_LPC) {
2023 type = "LPC"; 2021 type = "LPC";
2024 if((address->type) & SMSCSIO_TYPE_FLAT) { 2022 if (address->type & SMSCSIO_TYPE_FLAT)
2025 if(!smsc_superio_flat(lpc_chips_flat,cfg_base,type)) found++; 2023 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2026 } 2024 found++;
2027 if((address->type) & SMSCSIO_TYPE_PAGED) { 2025
2028 if(!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) found++; 2026 if (address->type & SMSCSIO_TYPE_PAGED)
2029 } 2027 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2028 found++;
2030 } 2029 }
2031 address++; 2030 address++;
2032 } 2031 }
2033 return found; 2032 return found;
2034} 2033}
2035 2034
2036/* 2035/*
2037 * Function smsc_superio_flat (chip, base, type) 2036 * Function smsc_superio_flat (chip, base, type)
@@ -2039,7 +2038,7 @@ static int __init smsc_ircc_look_for_chips(void)
2039 * Try to get configuration of a smc SuperIO chip with flat register model 2038 * Try to get configuration of a smc SuperIO chip with flat register model
2040 * 2039 *
2041 */ 2040 */
2042static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfgbase, char *type) 2041static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2043{ 2042{
2044 unsigned short firbase, sirbase; 2043 unsigned short firbase, sirbase;
2045 u8 mode, dma, irq; 2044 u8 mode, dma, irq;
@@ -2047,39 +2046,37 @@ static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg
2047 2046
2048 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2047 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2049 2048
2050 if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type)==NULL) 2049 if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2051 return ret; 2050 return ret;
2052 2051
2053 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase); 2052 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2054 mode = inb(cfgbase+1); 2053 mode = inb(cfgbase + 1);
2055 2054
2056 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/ 2055 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2057 2056
2058 if(!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA)) 2057 if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2059 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__); 2058 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2060 2059
2061 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase); 2060 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2062 sirbase = inb(cfgbase+1) << 2; 2061 sirbase = inb(cfgbase + 1) << 2;
2063 2062
2064 /* FIR iobase */ 2063 /* FIR iobase */
2065 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase); 2064 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2066 firbase = inb(cfgbase+1) << 3; 2065 firbase = inb(cfgbase + 1) << 3;
2067 2066
2068 /* DMA */ 2067 /* DMA */
2069 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase); 2068 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2070 dma = inb(cfgbase+1) & SMSCSIOFLAT_FIRDMASELECT_MASK; 2069 dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2071 2070
2072 /* IRQ */ 2071 /* IRQ */
2073 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase); 2072 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2074 irq = inb(cfgbase+1) & SMSCSIOFLAT_UART2IRQSELECT_MASK; 2073 irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2075 2074
2076 IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode); 2075 IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2077 2076
2078 if (firbase) { 2077 if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2079 if (smsc_ircc_open(firbase, sirbase, dma, irq) == 0) 2078 ret = 0;
2080 ret=0; 2079
2081 }
2082
2083 /* Exit configuration */ 2080 /* Exit configuration */
2084 outb(SMSCSIO_CFGEXITKEY, cfgbase); 2081 outb(SMSCSIO_CFGEXITKEY, cfgbase);
2085 2082
@@ -2092,26 +2089,26 @@ static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg
2092 * Try to get configuration of a smc SuperIO chip with paged register model 2089 * Try to get configuration of a smc SuperIO chip with paged register model
2093 * 2090 *
2094 */ 2091 */
2095static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cfg_base, char *type) 2092static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2096{ 2093{
2097 unsigned short fir_io, sir_io; 2094 unsigned short fir_io, sir_io;
2098 int ret = -ENODEV; 2095 int ret = -ENODEV;
2099 2096
2100 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2097 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2101 2098
2102 if (smsc_ircc_probe(cfg_base,0x20,chips,type)==NULL) 2099 if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2103 return ret; 2100 return ret;
2104 2101
2105 /* Select logical device (UART2) */ 2102 /* Select logical device (UART2) */
2106 outb(0x07, cfg_base); 2103 outb(0x07, cfg_base);
2107 outb(0x05, cfg_base + 1); 2104 outb(0x05, cfg_base + 1);
2108 2105
2109 /* SIR iobase */ 2106 /* SIR iobase */
2110 outb(0x60, cfg_base); 2107 outb(0x60, cfg_base);
2111 sir_io = inb(cfg_base + 1) << 8; 2108 sir_io = inb(cfg_base + 1) << 8;
2112 outb(0x61, cfg_base); 2109 outb(0x61, cfg_base);
2113 sir_io |= inb(cfg_base + 1); 2110 sir_io |= inb(cfg_base + 1);
2114 2111
2115 /* Read FIR base */ 2112 /* Read FIR base */
2116 outb(0x62, cfg_base); 2113 outb(0x62, cfg_base);
2117 fir_io = inb(cfg_base + 1) << 8; 2114 fir_io = inb(cfg_base + 1) << 8;
@@ -2119,11 +2116,9 @@ static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cf
2119 fir_io |= inb(cfg_base + 1); 2116 fir_io |= inb(cfg_base + 1);
2120 outb(0x2b, cfg_base); /* ??? */ 2117 outb(0x2b, cfg_base); /* ??? */
2121 2118
2122 if (fir_io) { 2119 if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2123 if (smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0) 2120 ret = 0;
2124 ret=0; 2121
2125 }
2126
2127 /* Exit configuration */ 2122 /* Exit configuration */
2128 outb(SMSCSIO_CFGEXITKEY, cfg_base); 2123 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2129 2124
@@ -2131,21 +2126,17 @@ static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cf
2131} 2126}
2132 2127
2133 2128
2134static int __init smsc_access(unsigned short cfg_base,unsigned char reg) 2129static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2135{ 2130{
2136 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2131 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2137 2132
2138 outb(reg, cfg_base); 2133 outb(reg, cfg_base);
2139 2134 return inb(cfg_base) != reg ? -1 : 0;
2140 if (inb(cfg_base)!=reg)
2141 return -1;
2142
2143 return 0;
2144} 2135}
2145 2136
2146static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type) 2137static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2147{ 2138{
2148 u8 devid,xdevid,rev; 2139 u8 devid, xdevid, rev;
2149 2140
2150 IRDA_DEBUG(1, "%s\n", __FUNCTION__); 2141 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2151 2142
@@ -2158,7 +2149,7 @@ static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg
2158 2149
2159 outb(reg, cfg_base); 2150 outb(reg, cfg_base);
2160 2151
2161 xdevid=inb(cfg_base+1); 2152 xdevid = inb(cfg_base + 1);
2162 2153
2163 /* Enter configuration */ 2154 /* Enter configuration */
2164 2155
@@ -2168,51 +2159,49 @@ static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg
2168 if (smsc_access(cfg_base,0x55)) /* send second key and check */ 2159 if (smsc_access(cfg_base,0x55)) /* send second key and check */
2169 return NULL; 2160 return NULL;
2170 #endif 2161 #endif
2171 2162
2172 /* probe device ID */ 2163 /* probe device ID */
2173 2164
2174 if (smsc_access(cfg_base,reg)) 2165 if (smsc_access(cfg_base, reg))
2175 return NULL; 2166 return NULL;
2176 2167
2177 devid=inb(cfg_base+1); 2168 devid = inb(cfg_base + 1);
2178
2179 if (devid==0) /* typical value for unused port */
2180 return NULL;
2181 2169
2182 if (devid==0xff) /* typical value for unused port */ 2170 if (devid == 0 || devid == 0xff) /* typical values for unused port */
2183 return NULL; 2171 return NULL;
2184 2172
2185 /* probe revision ID */ 2173 /* probe revision ID */
2186 2174
2187 if (smsc_access(cfg_base,reg+1)) 2175 if (smsc_access(cfg_base, reg + 1))
2188 return NULL; 2176 return NULL;
2189 2177
2190 rev=inb(cfg_base+1); 2178 rev = inb(cfg_base + 1);
2191 2179
2192 if (rev>=128) /* i think this will make no sense */ 2180 if (rev >= 128) /* i think this will make no sense */
2193 return NULL; 2181 return NULL;
2194 2182
2195 if (devid==xdevid) /* protection against false positives */ 2183 if (devid == xdevid) /* protection against false positives */
2196 return NULL; 2184 return NULL;
2197 2185
2198 /* Check for expected device ID; are there others? */ 2186 /* Check for expected device ID; are there others? */
2199 2187
2200 while(chip->devid!=devid) { 2188 while (chip->devid != devid) {
2201 2189
2202 chip++; 2190 chip++;
2203 2191
2204 if (chip->name==NULL) 2192 if (chip->name == NULL)
2205 return NULL; 2193 return NULL;
2206 } 2194 }
2207 2195
2208 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",devid,rev,cfg_base,type,chip->name); 2196 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2197 devid, rev, cfg_base, type, chip->name);
2209 2198
2210 if (chip->rev>rev){ 2199 if (chip->rev > rev) {
2211 IRDA_MESSAGE("Revision higher than expected\n"); 2200 IRDA_MESSAGE("Revision higher than expected\n");
2212 return NULL; 2201 return NULL;
2213 } 2202 }
2214 2203
2215 if (chip->flags&NoIRDA) 2204 if (chip->flags & NoIRDA)
2216 IRDA_MESSAGE("chipset does not support IRDA\n"); 2205 IRDA_MESSAGE("chipset does not support IRDA\n");
2217 2206
2218 return chip; 2207 return chip;
@@ -2226,8 +2215,8 @@ static int __init smsc_superio_fdc(unsigned short cfg_base)
2226 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", 2215 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2227 __FUNCTION__, cfg_base); 2216 __FUNCTION__, cfg_base);
2228 } else { 2217 } else {
2229 if (!smsc_superio_flat(fdc_chips_flat,cfg_base,"FDC") 2218 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2230 ||!smsc_superio_paged(fdc_chips_paged,cfg_base,"FDC")) 2219 !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2231 ret = 0; 2220 ret = 0;
2232 2221
2233 release_region(cfg_base, 2); 2222 release_region(cfg_base, 2);
@@ -2244,9 +2233,10 @@ static int __init smsc_superio_lpc(unsigned short cfg_base)
2244 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", 2233 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2245 __FUNCTION__, cfg_base); 2234 __FUNCTION__, cfg_base);
2246 } else { 2235 } else {
2247 if (!smsc_superio_flat(lpc_chips_flat,cfg_base,"LPC") 2236 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2248 ||!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) 2237 !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2249 ret = 0; 2238 ret = 0;
2239
2250 release_region(cfg_base, 2); 2240 release_region(cfg_base, 2);
2251 } 2241 }
2252 return ret; 2242 return ret;
@@ -2269,18 +2259,23 @@ static int __init smsc_superio_lpc(unsigned short cfg_base)
2269static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed) 2259static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2270{ 2260{
2271 unsigned long jiffies_now, jiffies_timeout; 2261 unsigned long jiffies_now, jiffies_timeout;
2272 u8 val; 2262 u8 val;
2273 2263
2274 jiffies_now= jiffies; 2264 jiffies_now = jiffies;
2275 jiffies_timeout= jiffies+SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES; 2265 jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2276 2266
2277 /* ATC */ 2267 /* ATC */
2278 register_bank(fir_base, 4); 2268 register_bank(fir_base, 4);
2279 outb((inb(fir_base+IRCC_ATC) & IRCC_ATC_MASK) |IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE, fir_base+IRCC_ATC); 2269 outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2280 while((val=(inb(fir_base+IRCC_ATC) & IRCC_ATC_nPROGREADY)) && !time_after(jiffies, jiffies_timeout)); 2270 fir_base + IRCC_ATC);
2281 if(val) 2271
2272 while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2273 !time_after(jiffies, jiffies_timeout))
2274 /* empty */;
2275
2276 if (val)
2282 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__, 2277 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2283 inb(fir_base+IRCC_ATC)); 2278 inb(fir_base + IRCC_ATC));
2284} 2279}
2285 2280
2286/* 2281/*
@@ -2298,34 +2293,32 @@ static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2298/* 2293/*
2299 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed) 2294 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2300 * 2295 *
2301 * Set transceiver 2296 * Set transceiver
2302 * 2297 *
2303 */ 2298 */
2304 2299
2305static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed) 2300static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2306{ 2301{
2307 u8 fast_mode; 2302 u8 fast_mode;
2308 2303
2309 switch(speed) 2304 switch (speed) {
2310 { 2305 default:
2311 default: 2306 case 576000 :
2312 case 576000 : 2307 fast_mode = 0;
2313 fast_mode = 0;
2314 break; 2308 break;
2315 case 1152000 : 2309 case 1152000 :
2316 case 4000000 : 2310 case 4000000 :
2317 fast_mode = IRCC_LCR_A_FAST; 2311 fast_mode = IRCC_LCR_A_FAST;
2318 break; 2312 break;
2319
2320 } 2313 }
2321 register_bank(fir_base, 0); 2314 register_bank(fir_base, 0);
2322 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast_mode, fir_base+IRCC_LCR_A); 2315 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2323} 2316}
2324 2317
2325/* 2318/*
2326 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base) 2319 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2327 * 2320 *
2328 * Probe transceiver 2321 * Probe transceiver
2329 * 2322 *
2330 */ 2323 */
2331 2324
@@ -2337,35 +2330,34 @@ static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2337/* 2330/*
2338 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed) 2331 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2339 * 2332 *
2340 * Set transceiver 2333 * Set transceiver
2341 * 2334 *
2342 */ 2335 */
2343 2336
2344static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed) 2337static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2345{ 2338{
2346 u8 fast_mode; 2339 u8 fast_mode;
2347 2340
2348 switch(speed) 2341 switch (speed) {
2349 { 2342 default:
2350 default: 2343 case 576000 :
2351 case 576000 : 2344 fast_mode = 0;
2352 fast_mode = 0;
2353 break; 2345 break;
2354 case 1152000 : 2346 case 1152000 :
2355 case 4000000 : 2347 case 4000000 :
2356 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA; 2348 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2357 break; 2349 break;
2358 2350
2359 } 2351 }
2360 /* This causes an interrupt */ 2352 /* This causes an interrupt */
2361 register_bank(fir_base, 0); 2353 register_bank(fir_base, 0);
2362 outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast_mode, fir_base+IRCC_LCR_A); 2354 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2363} 2355}
2364 2356
2365/* 2357/*
2366 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base) 2358 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2367 * 2359 *
2368 * Probe transceiver 2360 * Probe transceiver
2369 * 2361 *
2370 */ 2362 */
2371 2363
@@ -2377,20 +2369,3 @@ static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2377 2369
2378module_init(smsc_ircc_init); 2370module_init(smsc_ircc_init);
2379module_exit(smsc_ircc_cleanup); 2371module_exit(smsc_ircc_cleanup);
2380
2381MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
2382MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
2383MODULE_LICENSE("GPL");
2384
2385module_param(ircc_dma, int, 0);
2386MODULE_PARM_DESC(ircc_dma, "DMA channel");
2387module_param(ircc_irq, int, 0);
2388MODULE_PARM_DESC(ircc_irq, "IRQ line");
2389module_param(ircc_fir, int, 0);
2390MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
2391module_param(ircc_sir, int, 0);
2392MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
2393module_param(ircc_cfg, int, 0);
2394MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
2395module_param(ircc_transceiver, int, 0);
2396MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 06:44:12 -0500