aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/igb
diff options
context:
space:
mode:
authorAlexander Duyck <alexander.h.duyck@intel.com>2009-11-12 13:37:00 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-13 23:46:49 -0500
commit115f459a53b0c56a699a76b34b82507452eb3df5 (patch)
tree8c8e4ec25f375d095a25264770898d689f9fa104 /drivers/net/igb
parent0e15439ae5fefe438056a26a00aa3c6a9de454e9 (diff)
igb: move timesync init into a seperate function
Current code is quite large and making igb_probe difficult to read. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb')
-rw-r--r--drivers/net/igb/igb_main.c115
1 files changed, 65 insertions, 50 deletions
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index b044c985df0b..d72d48476103 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -1566,56 +1566,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1566 } 1566 }
1567 1567
1568#endif 1568#endif
1569 switch (hw->mac.type) {
1570 case e1000_82576:
1571 /*
1572 * Initialize hardware timer: we keep it running just in case
1573 * that some program needs it later on.
1574 */
1575 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
1576 adapter->cycles.read = igb_read_clock;
1577 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
1578 adapter->cycles.mult = 1;
1579 /**
1580 * Scale the NIC clock cycle by a large factor so that
1581 * relatively small clock corrections can be added or
1582 * substracted at each clock tick. The drawbacks of a large
1583 * factor are a) that the clock register overflows more quickly
1584 * (not such a big deal) and b) that the increment per tick has
1585 * to fit into 24 bits. As a result we need to use a shift of
1586 * 19 so we can fit a value of 16 into the TIMINCA register.
1587 */
1588 adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
1589 wr32(E1000_TIMINCA,
1590 (1 << E1000_TIMINCA_16NS_SHIFT) |
1591 (16 << IGB_82576_TSYNC_SHIFT));
1592
1593 /* Set registers so that rollover occurs soon to test this. */
1594 wr32(E1000_SYSTIML, 0x00000000);
1595 wr32(E1000_SYSTIMH, 0xFF800000);
1596 wrfl();
1597
1598 timecounter_init(&adapter->clock,
1599 &adapter->cycles,
1600 ktime_to_ns(ktime_get_real()));
1601 /*
1602 * Synchronize our NIC clock against system wall clock. NIC
1603 * time stamp reading requires ~3us per sample, each sample
1604 * was pretty stable even under load => only require 10
1605 * samples for each offset comparison.
1606 */
1607 memset(&adapter->compare, 0, sizeof(adapter->compare));
1608 adapter->compare.source = &adapter->clock;
1609 adapter->compare.target = ktime_get_real;
1610 adapter->compare.num_samples = 10;
1611 timecompare_update(&adapter->compare, 0);
1612 break;
1613 case e1000_82575:
1614 /* 82575 does not support timesync */
1615 default:
1616 break;
1617 }
1618
1619 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); 1569 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1620 /* print bus type/speed/width info */ 1570 /* print bus type/speed/width info */
1621 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n", 1571 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
@@ -1781,6 +1731,70 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
1781#endif /* CONFIG_PCI_IOV */ 1731#endif /* CONFIG_PCI_IOV */
1782} 1732}
1783 1733
1734
1735/**
1736 * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
1737 * @adapter: board private structure to initialize
1738 *
1739 * igb_init_hw_timer initializes the function pointer and values for the hw
1740 * timer found in hardware.
1741 **/
1742static void igb_init_hw_timer(struct igb_adapter *adapter)
1743{
1744 struct e1000_hw *hw = &adapter->hw;
1745
1746 switch (hw->mac.type) {
1747 case e1000_82576:
1748 /*
1749 * Initialize hardware timer: we keep it running just in case
1750 * that some program needs it later on.
1751 */
1752 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
1753 adapter->cycles.read = igb_read_clock;
1754 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
1755 adapter->cycles.mult = 1;
1756 /**
1757 * Scale the NIC clock cycle by a large factor so that
1758 * relatively small clock corrections can be added or
1759 * substracted at each clock tick. The drawbacks of a large
1760 * factor are a) that the clock register overflows more quickly
1761 * (not such a big deal) and b) that the increment per tick has
1762 * to fit into 24 bits. As a result we need to use a shift of
1763 * 19 so we can fit a value of 16 into the TIMINCA register.
1764 */
1765 adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
1766 wr32(E1000_TIMINCA,
1767 (1 << E1000_TIMINCA_16NS_SHIFT) |
1768 (16 << IGB_82576_TSYNC_SHIFT));
1769
1770 /* Set registers so that rollover occurs soon to test this. */
1771 wr32(E1000_SYSTIML, 0x00000000);
1772 wr32(E1000_SYSTIMH, 0xFF800000);
1773 wrfl();
1774
1775 timecounter_init(&adapter->clock,
1776 &adapter->cycles,
1777 ktime_to_ns(ktime_get_real()));
1778 /*
1779 * Synchronize our NIC clock against system wall clock. NIC
1780 * time stamp reading requires ~3us per sample, each sample
1781 * was pretty stable even under load => only require 10
1782 * samples for each offset comparison.
1783 */
1784 memset(&adapter->compare, 0, sizeof(adapter->compare));
1785 adapter->compare.source = &adapter->clock;
1786 adapter->compare.target = ktime_get_real;
1787 adapter->compare.num_samples = 10;
1788 timecompare_update(&adapter->compare, 0);
1789 break;
1790 case e1000_82575:
1791 /* 82575 does not support timesync */
1792 default:
1793 break;
1794 }
1795
1796}
1797
1784/** 1798/**
1785 * igb_sw_init - Initialize general software structures (struct igb_adapter) 1799 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1786 * @adapter: board private structure to initialize 1800 * @adapter: board private structure to initialize
@@ -1816,6 +1830,7 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)
1816 return -ENOMEM; 1830 return -ENOMEM;
1817 } 1831 }
1818 1832
1833 igb_init_hw_timer(adapter);
1819 igb_probe_vfs(adapter); 1834 igb_probe_vfs(adapter);
1820 1835
1821 /* Explicitly disable IRQ since the NIC can be in any state. */ 1836 /* Explicitly disable IRQ since the NIC can be in any state. */