igb: add support for reporting 5GT/s during probe on PCIe Gen2

This change corrects the fact that we were not reporting Gen2 link speeds
when we were in fact connected at Gen2 rates.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

3 files changed, 21 insertions, 11 deletions

diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h
index 31d24e0e76de..24d9be64342f 100644
--- a/drivers/net/igb/e1000_defines.h
+++ b/drivers/net/igb/e1000_defines.h
@@ -610,11 +610,7 @@
 #define IGP_LED3_MODE           0x07000000
 
 /* PCI/PCI-X/PCI-EX Config space */
-#define PCIE_LINK_STATUS             0x12
 #define PCIE_DEVICE_CONTROL2         0x28
-
-#define PCIE_LINK_WIDTH_MASK         0x3F0
-#define PCIE_LINK_WIDTH_SHIFT        4
 #define PCIE_DEVICE_CONTROL2_16ms    0x0005
 
 #define PHY_REVISION_MASK      0xFFFFFFF0
diff --git a/drivers/net/igb/e1000_mac.c b/drivers/net/igb/e1000_mac.c
index be8d010e4021..90c5e01e9235 100644
--- a/drivers/net/igb/e1000_mac.c
+++ b/drivers/net/igb/e1000_mac.c
@@ -53,17 +53,30 @@ s32 igb_get_bus_info_pcie(struct e1000_hw *hw)
         u16 pcie_link_status;
 
         bus->type = e1000_bus_type_pci_express;
-        bus->speed = e1000_bus_speed_2500;
 
         ret_val = igb_read_pcie_cap_reg(hw,
-                                          PCIE_LINK_STATUS,
-                                          &pcie_link_status);
-        if (ret_val)
+                                        PCI_EXP_LNKSTA,
+                                        &pcie_link_status);
+        if (ret_val) {
                 bus->width = e1000_bus_width_unknown;
-        else
+                bus->speed = e1000_bus_speed_unknown;
+        } else {
+                switch (pcie_link_status & PCI_EXP_LNKSTA_CLS) {
+                case PCI_EXP_LNKSTA_CLS_2_5GB:
+                        bus->speed = e1000_bus_speed_2500;
+                        break;
+                case PCI_EXP_LNKSTA_CLS_5_0GB:
+                        bus->speed = e1000_bus_speed_5000;
+                        break;
+                default:
+                        bus->speed = e1000_bus_speed_unknown;
+                        break;
+                }
+
                 bus->width = (enum e1000_bus_width)((pcie_link_status &
-                                                     PCIE_LINK_WIDTH_MASK) >>
-                                                     PCIE_LINK_WIDTH_SHIFT);
+                                                     PCI_EXP_LNKSTA_NLW) >>
+                                                     PCI_EXP_LNKSTA_NLW_SHIFT);
+        }
 
         reg = rd32(E1000_STATUS);
         bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index a14303a0ad7b..919e36386675 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -1638,6 +1638,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
         dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
                  netdev->name,
                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
+                  (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
                                                             "unknown"),
                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :