diff options
author | Auke Kok <auke-jan.h.kok@intel.com> | 2008-06-27 14:00:18 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-07-04 08:46:59 -0400 |
commit | 652fff321490fc3fcc8e8d302826a9c2379f03d2 (patch) | |
tree | 00e9675980cbee174305533dd3d0274715afa5e6 /drivers/net/igb/e1000_phy.c | |
parent | d67ce5338c7c71313f01e508d893bb8104ce459a (diff) |
igb: eliminate hw from the hw_dbg macro arguments
Various cosmetic cleanups. Comment fixes. Eliminate the hw part out
of the hw_dbg macro since it's always used.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/igb/e1000_phy.c')
-rw-r--r-- | drivers/net/igb/e1000_phy.c | 76 |
1 files changed, 37 insertions, 39 deletions
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c index 220e4716da9e..17fddb91c9f5 100644 --- a/drivers/net/igb/e1000_phy.c +++ b/drivers/net/igb/e1000_phy.c | |||
@@ -144,7 +144,7 @@ static s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) | |||
144 | s32 ret_val = 0; | 144 | s32 ret_val = 0; |
145 | 145 | ||
146 | if (offset > MAX_PHY_REG_ADDRESS) { | 146 | if (offset > MAX_PHY_REG_ADDRESS) { |
147 | hw_dbg(hw, "PHY Address %d is out of range\n", offset); | 147 | hw_dbg("PHY Address %d is out of range\n", offset); |
148 | ret_val = -E1000_ERR_PARAM; | 148 | ret_val = -E1000_ERR_PARAM; |
149 | goto out; | 149 | goto out; |
150 | } | 150 | } |
@@ -172,12 +172,12 @@ static s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) | |||
172 | break; | 172 | break; |
173 | } | 173 | } |
174 | if (!(mdic & E1000_MDIC_READY)) { | 174 | if (!(mdic & E1000_MDIC_READY)) { |
175 | hw_dbg(hw, "MDI Read did not complete\n"); | 175 | hw_dbg("MDI Read did not complete\n"); |
176 | ret_val = -E1000_ERR_PHY; | 176 | ret_val = -E1000_ERR_PHY; |
177 | goto out; | 177 | goto out; |
178 | } | 178 | } |
179 | if (mdic & E1000_MDIC_ERROR) { | 179 | if (mdic & E1000_MDIC_ERROR) { |
180 | hw_dbg(hw, "MDI Error\n"); | 180 | hw_dbg("MDI Error\n"); |
181 | ret_val = -E1000_ERR_PHY; | 181 | ret_val = -E1000_ERR_PHY; |
182 | goto out; | 182 | goto out; |
183 | } | 183 | } |
@@ -202,7 +202,7 @@ static s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) | |||
202 | s32 ret_val = 0; | 202 | s32 ret_val = 0; |
203 | 203 | ||
204 | if (offset > MAX_PHY_REG_ADDRESS) { | 204 | if (offset > MAX_PHY_REG_ADDRESS) { |
205 | hw_dbg(hw, "PHY Address %d is out of range\n", offset); | 205 | hw_dbg("PHY Address %d is out of range\n", offset); |
206 | ret_val = -E1000_ERR_PARAM; | 206 | ret_val = -E1000_ERR_PARAM; |
207 | goto out; | 207 | goto out; |
208 | } | 208 | } |
@@ -231,12 +231,12 @@ static s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) | |||
231 | break; | 231 | break; |
232 | } | 232 | } |
233 | if (!(mdic & E1000_MDIC_READY)) { | 233 | if (!(mdic & E1000_MDIC_READY)) { |
234 | hw_dbg(hw, "MDI Write did not complete\n"); | 234 | hw_dbg("MDI Write did not complete\n"); |
235 | ret_val = -E1000_ERR_PHY; | 235 | ret_val = -E1000_ERR_PHY; |
236 | goto out; | 236 | goto out; |
237 | } | 237 | } |
238 | if (mdic & E1000_MDIC_ERROR) { | 238 | if (mdic & E1000_MDIC_ERROR) { |
239 | hw_dbg(hw, "MDI Error\n"); | 239 | hw_dbg("MDI Error\n"); |
240 | ret_val = -E1000_ERR_PHY; | 240 | ret_val = -E1000_ERR_PHY; |
241 | goto out; | 241 | goto out; |
242 | } | 242 | } |
@@ -423,7 +423,7 @@ s32 igb_copper_link_setup_m88(struct e1000_hw *hw) | |||
423 | /* Commit the changes. */ | 423 | /* Commit the changes. */ |
424 | ret_val = igb_phy_sw_reset(hw); | 424 | ret_val = igb_phy_sw_reset(hw); |
425 | if (ret_val) { | 425 | if (ret_val) { |
426 | hw_dbg(hw, "Error committing the PHY changes\n"); | 426 | hw_dbg("Error committing the PHY changes\n"); |
427 | goto out; | 427 | goto out; |
428 | } | 428 | } |
429 | 429 | ||
@@ -451,7 +451,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) | |||
451 | 451 | ||
452 | ret_val = hw->phy.ops.reset_phy(hw); | 452 | ret_val = hw->phy.ops.reset_phy(hw); |
453 | if (ret_val) { | 453 | if (ret_val) { |
454 | hw_dbg(hw, "Error resetting the PHY.\n"); | 454 | hw_dbg("Error resetting the PHY.\n"); |
455 | goto out; | 455 | goto out; |
456 | } | 456 | } |
457 | 457 | ||
@@ -467,7 +467,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) | |||
467 | if (hw->phy.ops.set_d3_lplu_state) | 467 | if (hw->phy.ops.set_d3_lplu_state) |
468 | ret_val = hw->phy.ops.set_d3_lplu_state(hw, false); | 468 | ret_val = hw->phy.ops.set_d3_lplu_state(hw, false); |
469 | if (ret_val) { | 469 | if (ret_val) { |
470 | hw_dbg(hw, "Error Disabling LPLU D3\n"); | 470 | hw_dbg("Error Disabling LPLU D3\n"); |
471 | goto out; | 471 | goto out; |
472 | } | 472 | } |
473 | } | 473 | } |
@@ -475,7 +475,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) | |||
475 | /* disable lplu d0 during driver init */ | 475 | /* disable lplu d0 during driver init */ |
476 | ret_val = hw->phy.ops.set_d0_lplu_state(hw, false); | 476 | ret_val = hw->phy.ops.set_d0_lplu_state(hw, false); |
477 | if (ret_val) { | 477 | if (ret_val) { |
478 | hw_dbg(hw, "Error Disabling LPLU D0\n"); | 478 | hw_dbg("Error Disabling LPLU D0\n"); |
479 | goto out; | 479 | goto out; |
480 | } | 480 | } |
481 | /* Configure mdi-mdix settings */ | 481 | /* Configure mdi-mdix settings */ |
@@ -597,13 +597,13 @@ s32 igb_copper_link_autoneg(struct e1000_hw *hw) | |||
597 | if (phy->autoneg_advertised == 0) | 597 | if (phy->autoneg_advertised == 0) |
598 | phy->autoneg_advertised = phy->autoneg_mask; | 598 | phy->autoneg_advertised = phy->autoneg_mask; |
599 | 599 | ||
600 | hw_dbg(hw, "Reconfiguring auto-neg advertisement params\n"); | 600 | hw_dbg("Reconfiguring auto-neg advertisement params\n"); |
601 | ret_val = igb_phy_setup_autoneg(hw); | 601 | ret_val = igb_phy_setup_autoneg(hw); |
602 | if (ret_val) { | 602 | if (ret_val) { |
603 | hw_dbg(hw, "Error Setting up Auto-Negotiation\n"); | 603 | hw_dbg("Error Setting up Auto-Negotiation\n"); |
604 | goto out; | 604 | goto out; |
605 | } | 605 | } |
606 | hw_dbg(hw, "Restarting Auto-Neg\n"); | 606 | hw_dbg("Restarting Auto-Neg\n"); |
607 | 607 | ||
608 | /* | 608 | /* |
609 | * Restart auto-negotiation by setting the Auto Neg Enable bit and | 609 | * Restart auto-negotiation by setting the Auto Neg Enable bit and |
@@ -625,8 +625,8 @@ s32 igb_copper_link_autoneg(struct e1000_hw *hw) | |||
625 | if (phy->autoneg_wait_to_complete) { | 625 | if (phy->autoneg_wait_to_complete) { |
626 | ret_val = igb_wait_autoneg(hw); | 626 | ret_val = igb_wait_autoneg(hw); |
627 | if (ret_val) { | 627 | if (ret_val) { |
628 | hw_dbg(hw, "Error while waiting for " | 628 | hw_dbg("Error while waiting for " |
629 | "autoneg to complete\n"); | 629 | "autoneg to complete\n"); |
630 | goto out; | 630 | goto out; |
631 | } | 631 | } |
632 | } | 632 | } |
@@ -689,39 +689,39 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) | |||
689 | NWAY_AR_10T_HD_CAPS); | 689 | NWAY_AR_10T_HD_CAPS); |
690 | mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS); | 690 | mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS); |
691 | 691 | ||
692 | hw_dbg(hw, "autoneg_advertised %x\n", phy->autoneg_advertised); | 692 | hw_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); |
693 | 693 | ||
694 | /* Do we want to advertise 10 Mb Half Duplex? */ | 694 | /* Do we want to advertise 10 Mb Half Duplex? */ |
695 | if (phy->autoneg_advertised & ADVERTISE_10_HALF) { | 695 | if (phy->autoneg_advertised & ADVERTISE_10_HALF) { |
696 | hw_dbg(hw, "Advertise 10mb Half duplex\n"); | 696 | hw_dbg("Advertise 10mb Half duplex\n"); |
697 | mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS; | 697 | mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS; |
698 | } | 698 | } |
699 | 699 | ||
700 | /* Do we want to advertise 10 Mb Full Duplex? */ | 700 | /* Do we want to advertise 10 Mb Full Duplex? */ |
701 | if (phy->autoneg_advertised & ADVERTISE_10_FULL) { | 701 | if (phy->autoneg_advertised & ADVERTISE_10_FULL) { |
702 | hw_dbg(hw, "Advertise 10mb Full duplex\n"); | 702 | hw_dbg("Advertise 10mb Full duplex\n"); |
703 | mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS; | 703 | mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS; |
704 | } | 704 | } |
705 | 705 | ||
706 | /* Do we want to advertise 100 Mb Half Duplex? */ | 706 | /* Do we want to advertise 100 Mb Half Duplex? */ |
707 | if (phy->autoneg_advertised & ADVERTISE_100_HALF) { | 707 | if (phy->autoneg_advertised & ADVERTISE_100_HALF) { |
708 | hw_dbg(hw, "Advertise 100mb Half duplex\n"); | 708 | hw_dbg("Advertise 100mb Half duplex\n"); |
709 | mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS; | 709 | mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS; |
710 | } | 710 | } |
711 | 711 | ||
712 | /* Do we want to advertise 100 Mb Full Duplex? */ | 712 | /* Do we want to advertise 100 Mb Full Duplex? */ |
713 | if (phy->autoneg_advertised & ADVERTISE_100_FULL) { | 713 | if (phy->autoneg_advertised & ADVERTISE_100_FULL) { |
714 | hw_dbg(hw, "Advertise 100mb Full duplex\n"); | 714 | hw_dbg("Advertise 100mb Full duplex\n"); |
715 | mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS; | 715 | mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS; |
716 | } | 716 | } |
717 | 717 | ||
718 | /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ | 718 | /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ |
719 | if (phy->autoneg_advertised & ADVERTISE_1000_HALF) | 719 | if (phy->autoneg_advertised & ADVERTISE_1000_HALF) |
720 | hw_dbg(hw, "Advertise 1000mb Half duplex request denied!\n"); | 720 | hw_dbg("Advertise 1000mb Half duplex request denied!\n"); |
721 | 721 | ||
722 | /* Do we want to advertise 1000 Mb Full Duplex? */ | 722 | /* Do we want to advertise 1000 Mb Full Duplex? */ |
723 | if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { | 723 | if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { |
724 | hw_dbg(hw, "Advertise 1000mb Full duplex\n"); | 724 | hw_dbg("Advertise 1000mb Full duplex\n"); |
725 | mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS; | 725 | mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS; |
726 | } | 726 | } |
727 | 727 | ||
@@ -780,7 +780,7 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) | |||
780 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); | 780 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); |
781 | break; | 781 | break; |
782 | default: | 782 | default: |
783 | hw_dbg(hw, "Flow control param set incorrectly\n"); | 783 | hw_dbg("Flow control param set incorrectly\n"); |
784 | ret_val = -E1000_ERR_CONFIG; | 784 | ret_val = -E1000_ERR_CONFIG; |
785 | goto out; | 785 | goto out; |
786 | } | 786 | } |
@@ -790,7 +790,7 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) | |||
790 | if (ret_val) | 790 | if (ret_val) |
791 | goto out; | 791 | goto out; |
792 | 792 | ||
793 | hw_dbg(hw, "Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); | 793 | hw_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); |
794 | 794 | ||
795 | if (phy->autoneg_mask & ADVERTISE_1000_FULL) { | 795 | if (phy->autoneg_mask & ADVERTISE_1000_FULL) { |
796 | ret_val = hw->phy.ops.write_phy_reg(hw, | 796 | ret_val = hw->phy.ops.write_phy_reg(hw, |
@@ -846,13 +846,12 @@ s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw) | |||
846 | if (ret_val) | 846 | if (ret_val) |
847 | goto out; | 847 | goto out; |
848 | 848 | ||
849 | hw_dbg(hw, "IGP PSCR: %X\n", phy_data); | 849 | hw_dbg("IGP PSCR: %X\n", phy_data); |
850 | 850 | ||
851 | udelay(1); | 851 | udelay(1); |
852 | 852 | ||
853 | if (phy->autoneg_wait_to_complete) { | 853 | if (phy->autoneg_wait_to_complete) { |
854 | hw_dbg(hw, | 854 | hw_dbg("Waiting for forced speed/duplex link on IGP phy.\n"); |
855 | "Waiting for forced speed/duplex link on IGP phy.\n"); | ||
856 | 855 | ||
857 | ret_val = igb_phy_has_link(hw, | 856 | ret_val = igb_phy_has_link(hw, |
858 | PHY_FORCE_LIMIT, | 857 | PHY_FORCE_LIMIT, |
@@ -862,7 +861,7 @@ s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw) | |||
862 | goto out; | 861 | goto out; |
863 | 862 | ||
864 | if (!link) | 863 | if (!link) |
865 | hw_dbg(hw, "Link taking longer than expected.\n"); | 864 | hw_dbg("Link taking longer than expected.\n"); |
866 | 865 | ||
867 | /* Try once more */ | 866 | /* Try once more */ |
868 | ret_val = igb_phy_has_link(hw, | 867 | ret_val = igb_phy_has_link(hw, |
@@ -909,7 +908,7 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
909 | if (ret_val) | 908 | if (ret_val) |
910 | goto out; | 909 | goto out; |
911 | 910 | ||
912 | hw_dbg(hw, "M88E1000 PSCR: %X\n", phy_data); | 911 | hw_dbg("M88E1000 PSCR: %X\n", phy_data); |
913 | 912 | ||
914 | ret_val = hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &phy_data); | 913 | ret_val = hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &phy_data); |
915 | if (ret_val) | 914 | if (ret_val) |
@@ -927,8 +926,7 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
927 | udelay(1); | 926 | udelay(1); |
928 | 927 | ||
929 | if (phy->autoneg_wait_to_complete) { | 928 | if (phy->autoneg_wait_to_complete) { |
930 | hw_dbg(hw, | 929 | hw_dbg("Waiting for forced speed/duplex link on M88 phy.\n"); |
931 | "Waiting for forced speed/duplex link on M88 phy.\n"); | ||
932 | 930 | ||
933 | ret_val = igb_phy_has_link(hw, | 931 | ret_val = igb_phy_has_link(hw, |
934 | PHY_FORCE_LIMIT, | 932 | PHY_FORCE_LIMIT, |
@@ -1028,11 +1026,11 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, | |||
1028 | if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { | 1026 | if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { |
1029 | ctrl &= ~E1000_CTRL_FD; | 1027 | ctrl &= ~E1000_CTRL_FD; |
1030 | *phy_ctrl &= ~MII_CR_FULL_DUPLEX; | 1028 | *phy_ctrl &= ~MII_CR_FULL_DUPLEX; |
1031 | hw_dbg(hw, "Half Duplex\n"); | 1029 | hw_dbg("Half Duplex\n"); |
1032 | } else { | 1030 | } else { |
1033 | ctrl |= E1000_CTRL_FD; | 1031 | ctrl |= E1000_CTRL_FD; |
1034 | *phy_ctrl |= MII_CR_FULL_DUPLEX; | 1032 | *phy_ctrl |= MII_CR_FULL_DUPLEX; |
1035 | hw_dbg(hw, "Full Duplex\n"); | 1033 | hw_dbg("Full Duplex\n"); |
1036 | } | 1034 | } |
1037 | 1035 | ||
1038 | /* Forcing 10mb or 100mb? */ | 1036 | /* Forcing 10mb or 100mb? */ |
@@ -1040,12 +1038,12 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, | |||
1040 | ctrl |= E1000_CTRL_SPD_100; | 1038 | ctrl |= E1000_CTRL_SPD_100; |
1041 | *phy_ctrl |= MII_CR_SPEED_100; | 1039 | *phy_ctrl |= MII_CR_SPEED_100; |
1042 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); | 1040 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); |
1043 | hw_dbg(hw, "Forcing 100mb\n"); | 1041 | hw_dbg("Forcing 100mb\n"); |
1044 | } else { | 1042 | } else { |
1045 | ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); | 1043 | ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); |
1046 | *phy_ctrl |= MII_CR_SPEED_10; | 1044 | *phy_ctrl |= MII_CR_SPEED_10; |
1047 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100); | 1045 | *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100); |
1048 | hw_dbg(hw, "Forcing 10mb\n"); | 1046 | hw_dbg("Forcing 10mb\n"); |
1049 | } | 1047 | } |
1050 | 1048 | ||
1051 | igb_config_collision_dist(hw); | 1049 | igb_config_collision_dist(hw); |
@@ -1459,7 +1457,7 @@ s32 igb_get_phy_info_m88(struct e1000_hw *hw) | |||
1459 | bool link; | 1457 | bool link; |
1460 | 1458 | ||
1461 | if (hw->phy.media_type != e1000_media_type_copper) { | 1459 | if (hw->phy.media_type != e1000_media_type_copper) { |
1462 | hw_dbg(hw, "Phy info is only valid for copper media\n"); | 1460 | hw_dbg("Phy info is only valid for copper media\n"); |
1463 | ret_val = -E1000_ERR_CONFIG; | 1461 | ret_val = -E1000_ERR_CONFIG; |
1464 | goto out; | 1462 | goto out; |
1465 | } | 1463 | } |
@@ -1469,7 +1467,7 @@ s32 igb_get_phy_info_m88(struct e1000_hw *hw) | |||
1469 | goto out; | 1467 | goto out; |
1470 | 1468 | ||
1471 | if (!link) { | 1469 | if (!link) { |
1472 | hw_dbg(hw, "Phy info is only valid if link is up\n"); | 1470 | hw_dbg("Phy info is only valid if link is up\n"); |
1473 | ret_val = -E1000_ERR_CONFIG; | 1471 | ret_val = -E1000_ERR_CONFIG; |
1474 | goto out; | 1472 | goto out; |
1475 | } | 1473 | } |
@@ -1543,7 +1541,7 @@ s32 igb_get_phy_info_igp(struct e1000_hw *hw) | |||
1543 | goto out; | 1541 | goto out; |
1544 | 1542 | ||
1545 | if (!link) { | 1543 | if (!link) { |
1546 | hw_dbg(hw, "Phy info is only valid if link is up\n"); | 1544 | hw_dbg("Phy info is only valid if link is up\n"); |
1547 | ret_val = -E1000_ERR_CONFIG; | 1545 | ret_val = -E1000_ERR_CONFIG; |
1548 | goto out; | 1546 | goto out; |
1549 | } | 1547 | } |
@@ -1728,7 +1726,7 @@ s32 igb_phy_force_speed_duplex(struct e1000_hw *hw) | |||
1728 | **/ | 1726 | **/ |
1729 | s32 igb_phy_init_script_igp3(struct e1000_hw *hw) | 1727 | s32 igb_phy_init_script_igp3(struct e1000_hw *hw) |
1730 | { | 1728 | { |
1731 | hw_dbg(hw, "Running IGP 3 PHY init script\n"); | 1729 | hw_dbg("Running IGP 3 PHY init script\n"); |
1732 | 1730 | ||
1733 | /* PHY init IGP 3 */ | 1731 | /* PHY init IGP 3 */ |
1734 | /* Enable rise/fall, 10-mode work in class-A */ | 1732 | /* Enable rise/fall, 10-mode work in class-A */ |