igb: add locking to reads of the i2c interface

The current implementation of sgmii support isn't correctly locking the
interfaces for reads/writes.  This change pulls the read/write
functionality out of 82575.c and moves it to phy.c.  In addition it
replaces the implementation in 82575.c with one that uses locking around
the relocated i2c interface calls.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 20 insertions, 65 deletions

diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index 65b900028bca..78971815bbce 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -277,45 +277,23 @@ static void igb_release_phy_82575(struct e1000_hw *hw)
 static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
                                           u16 *data)
 {
-        struct e1000_phy_info *phy = &hw->phy;
-        u32 i, i2ccmd = 0;
+        s32 ret_val = -E1000_ERR_PARAM;
 
         if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
                 hw_dbg("PHY Address %u is out of range\n", offset);
-                return -E1000_ERR_PARAM;
+                goto out;
         }
 
-        /*
-         * Set up Op-code, Phy Address, and register address in the I2CCMD
-         * register.  The MAC will take care of interfacing with the
-         * PHY to retrieve the desired data.
-         */
-        i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
-                  (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
-                  (E1000_I2CCMD_OPCODE_READ));
+        ret_val = hw->phy.ops.acquire(hw);
+        if (ret_val)
+                goto out;
 
-        wr32(E1000_I2CCMD, i2ccmd);
+        ret_val = igb_read_phy_reg_i2c(hw, offset, data);
 
-        /* Poll the ready bit to see if the I2C read completed */
-        for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
-                udelay(50);
-                i2ccmd = rd32(E1000_I2CCMD);
-                if (i2ccmd & E1000_I2CCMD_READY)
-                        break;
-        }
-        if (!(i2ccmd & E1000_I2CCMD_READY)) {
-                hw_dbg("I2CCMD Read did not complete\n");
-                return -E1000_ERR_PHY;
-        }
-        if (i2ccmd & E1000_I2CCMD_ERROR) {
-                hw_dbg("I2CCMD Error bit set\n");
-                return -E1000_ERR_PHY;
-        }
-
-        /* Need to byte-swap the 16-bit value. */
-        *data = ((i2ccmd >> 8) & 0x00FF) | ((i2ccmd << 8) & 0xFF00);
+        hw->phy.ops.release(hw);
 
-        return 0;
+out:
+        return ret_val;
 }
 
 /**
@@ -330,47 +308,24 @@ static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
                                            u16 data)
 {
-        struct e1000_phy_info *phy = &hw->phy;
-        u32 i, i2ccmd = 0;
-        u16 phy_data_swapped;
+        s32 ret_val = -E1000_ERR_PARAM;
+
 
         if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
                 hw_dbg("PHY Address %d is out of range\n", offset);
-                return -E1000_ERR_PARAM;
+                goto out;
         }
 
-        /* Swap the data bytes for the I2C interface */
-        phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
+        ret_val = hw->phy.ops.acquire(hw);
+        if (ret_val)
+                goto out;
 
-        /*
-         * Set up Op-code, Phy Address, and register address in the I2CCMD
-         * register.  The MAC will take care of interfacing with the
-         * PHY to retrieve the desired data.
-         */
-        i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
-                  (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
-                  E1000_I2CCMD_OPCODE_WRITE |
-                  phy_data_swapped);
-
-        wr32(E1000_I2CCMD, i2ccmd);
-
-        /* Poll the ready bit to see if the I2C read completed */
-        for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
-                udelay(50);
-                i2ccmd = rd32(E1000_I2CCMD);
-                if (i2ccmd & E1000_I2CCMD_READY)
-                        break;
-        }
-        if (!(i2ccmd & E1000_I2CCMD_READY)) {
-                hw_dbg("I2CCMD Write did not complete\n");
-                return -E1000_ERR_PHY;
-        }
-        if (i2ccmd & E1000_I2CCMD_ERROR) {
-                hw_dbg("I2CCMD Error bit set\n");
-                return -E1000_ERR_PHY;
-        }
+        ret_val = igb_write_phy_reg_i2c(hw, offset, data);
 
-        return 0;
+        hw->phy.ops.release(hw);
+
+out:
+        return ret_val;
 }
 
 /**