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authorGrant Erickson <gerickson@nuovations.com>2008-07-08 11:03:06 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-14 22:39:05 -0400
commit004ea683d96ff51131789e78a3de7dafcdbf912d (patch)
treec69691250a6e6def9521bd66269f9cd26b34b242 /drivers/net/ibm_newemac
parentb6f6b98a4e91fcf31db7de54c3aa86252fc6fb5f (diff)
ibm_newemac: Add MII mode support to the EMAC RGMII bridge.
This patch adds support to the RGMII handler in the EMAC driver for the MII PHY mode such that device tree entries of the form `phy-mode = "mii";' are recognized and handled appropriately. While logically, in software, "gmii" and "mii" modes are the same, they are wired differently, so it makes sense to allow DTS authors to specify each explicitly. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'drivers/net/ibm_newemac')
-rw-r--r--drivers/net/ibm_newemac/rgmii.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/ibm_newemac/rgmii.c b/drivers/net/ibm_newemac/rgmii.c
index e32da3de2695..1d5379de6900 100644
--- a/drivers/net/ibm_newemac/rgmii.c
+++ b/drivers/net/ibm_newemac/rgmii.c
@@ -39,6 +39,7 @@
39#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4)) 39#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
40#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4)) 40#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
41#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4)) 41#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
42#define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
42 43
43/* RGMIIx_SSR */ 44/* RGMIIx_SSR */
44#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8)) 45#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
@@ -49,6 +50,7 @@
49static inline int rgmii_valid_mode(int phy_mode) 50static inline int rgmii_valid_mode(int phy_mode)
50{ 51{
51 return phy_mode == PHY_MODE_GMII || 52 return phy_mode == PHY_MODE_GMII ||
53 phy_mode == PHY_MODE_MII ||
52 phy_mode == PHY_MODE_RGMII || 54 phy_mode == PHY_MODE_RGMII ||
53 phy_mode == PHY_MODE_TBI || 55 phy_mode == PHY_MODE_TBI ||
54 phy_mode == PHY_MODE_RTBI; 56 phy_mode == PHY_MODE_RTBI;
@@ -63,6 +65,8 @@ static inline const char *rgmii_mode_name(int mode)
63 return "TBI"; 65 return "TBI";
64 case PHY_MODE_GMII: 66 case PHY_MODE_GMII:
65 return "GMII"; 67 return "GMII";
68 case PHY_MODE_MII:
69 return "MII";
66 case PHY_MODE_RTBI: 70 case PHY_MODE_RTBI:
67 return "RTBI"; 71 return "RTBI";
68 default: 72 default:
@@ -79,6 +83,8 @@ static inline u32 rgmii_mode_mask(int mode, int input)
79 return RGMII_FER_TBI(input); 83 return RGMII_FER_TBI(input);
80 case PHY_MODE_GMII: 84 case PHY_MODE_GMII:
81 return RGMII_FER_GMII(input); 85 return RGMII_FER_GMII(input);
86 case PHY_MODE_MII:
87 return RGMII_FER_MII(input);
82 case PHY_MODE_RTBI: 88 case PHY_MODE_RTBI:
83 return RGMII_FER_RTBI(input); 89 return RGMII_FER_RTBI(input);
84 default: 90 default: