diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2007-08-22 23:56:01 -0400 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-10 19:51:52 -0400 |
| commit | 1d3bb996481e116f5f2b127cbd29b83365d2cf62 (patch) | |
| tree | b612a1dbf51c920fb5a9758a6d35f9ed37eb927f /drivers/net/ibm_newemac/tah.h | |
| parent | 03233b90b0977d577322a6e1ddd56d9cc570d406 (diff) | |
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/ibm_newemac/tah.h')
| -rw-r--r-- | drivers/net/ibm_newemac/tah.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/drivers/net/ibm_newemac/tah.h b/drivers/net/ibm_newemac/tah.h new file mode 100644 index 000000000000..bc41853b6e26 --- /dev/null +++ b/drivers/net/ibm_newemac/tah.h | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | /* | ||
| 2 | * drivers/net/ibm_newemac/tah.h | ||
| 3 | * | ||
| 4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. | ||
| 5 | * | ||
| 6 | * Copyright 2004 MontaVista Software, Inc. | ||
| 7 | * Matt Porter <mporter@kernel.crashing.org> | ||
| 8 | * | ||
| 9 | * Copyright (c) 2005 Eugene Surovegin <ebs@ebshome.net> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify it | ||
| 12 | * under the terms of the GNU General Public License as published by the | ||
| 13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 14 | * option) any later version. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef __IBM_NEWEMAC_TAH_H | ||
| 18 | #define __IBM_NEWEMAC_TAH_H | ||
| 19 | |||
| 20 | /* TAH */ | ||
| 21 | struct tah_regs { | ||
| 22 | u32 revid; | ||
| 23 | u32 pad[3]; | ||
| 24 | u32 mr; | ||
| 25 | u32 ssr0; | ||
| 26 | u32 ssr1; | ||
| 27 | u32 ssr2; | ||
| 28 | u32 ssr3; | ||
| 29 | u32 ssr4; | ||
| 30 | u32 ssr5; | ||
| 31 | u32 tsr; | ||
| 32 | }; | ||
| 33 | |||
| 34 | |||
| 35 | /* TAH device */ | ||
| 36 | struct tah_instance { | ||
| 37 | struct tah_regs __iomem *base; | ||
| 38 | |||
| 39 | /* Only one EMAC whacks us at a time */ | ||
| 40 | struct mutex lock; | ||
| 41 | |||
| 42 | /* number of EMACs using this TAH */ | ||
| 43 | int users; | ||
| 44 | |||
| 45 | /* OF device instance */ | ||
| 46 | struct of_device *ofdev; | ||
| 47 | }; | ||
| 48 | |||
| 49 | |||
| 50 | /* TAH engine */ | ||
| 51 | #define TAH_MR_CVR 0x80000000 | ||
| 52 | #define TAH_MR_SR 0x40000000 | ||
| 53 | #define TAH_MR_ST_256 0x01000000 | ||
| 54 | #define TAH_MR_ST_512 0x02000000 | ||
| 55 | #define TAH_MR_ST_768 0x03000000 | ||
| 56 | #define TAH_MR_ST_1024 0x04000000 | ||
| 57 | #define TAH_MR_ST_1280 0x05000000 | ||
| 58 | #define TAH_MR_ST_1536 0x06000000 | ||
| 59 | #define TAH_MR_TFS_16KB 0x00000000 | ||
| 60 | #define TAH_MR_TFS_2KB 0x00200000 | ||
| 61 | #define TAH_MR_TFS_4KB 0x00400000 | ||
| 62 | #define TAH_MR_TFS_6KB 0x00600000 | ||
| 63 | #define TAH_MR_TFS_8KB 0x00800000 | ||
| 64 | #define TAH_MR_TFS_10KB 0x00a00000 | ||
| 65 | #define TAH_MR_DTFP 0x00100000 | ||
| 66 | #define TAH_MR_DIG 0x00080000 | ||
| 67 | |||
| 68 | #ifdef CONFIG_IBM_NEW_EMAC_TAH | ||
| 69 | |||
| 70 | extern int tah_init(void); | ||
| 71 | extern void tah_exit(void); | ||
| 72 | extern int tah_attach(struct of_device *ofdev, int channel); | ||
| 73 | extern void tah_detach(struct of_device *ofdev, int channel); | ||
| 74 | extern void tah_reset(struct of_device *ofdev); | ||
| 75 | extern int tah_get_regs_len(struct of_device *ofdev); | ||
| 76 | extern void *tah_dump_regs(struct of_device *ofdev, void *buf); | ||
| 77 | |||
| 78 | #else | ||
| 79 | |||
| 80 | # define tah_init() 0 | ||
| 81 | # define tah_exit() do { } while(0) | ||
| 82 | # define tah_attach(x,y) (-ENXIO) | ||
| 83 | # define tah_detach(x,y) do { } while(0) | ||
| 84 | # define tah_reset(x) do { } while(0) | ||
| 85 | # define tah_get_regs_len(x) 0 | ||
| 86 | # define tah_dump_regs(x,buf) (buf) | ||
| 87 | |||
| 88 | #endif /* !CONFIG_IBM_NEW_EMAC_TAH */ | ||
| 89 | |||
| 90 | #endif /* __IBM_NEWEMAC_TAH_H */ | ||
