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authorJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
committerJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
commit6aa20a2235535605db6d6d2bd850298b2fe7f31e (patch)
treedf0b855043407b831d57f2f2c271f8aab48444f4 /drivers/net/gt96100eth.h
parent7a291083225af6e22ffaa46b3d91cfc1a1ccaab4 (diff)
drivers/net: Trim trailing whitespace
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/gt96100eth.h')
-rw-r--r--drivers/net/gt96100eth.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/gt96100eth.h b/drivers/net/gt96100eth.h
index 3b62a87c7d7f..509d8166bb59 100644
--- a/drivers/net/gt96100eth.h
+++ b/drivers/net/gt96100eth.h
@@ -22,7 +22,7 @@
22 * 22 *
23 * Ethernet driver definitions for the MIPS GT96100 Advanced 23 * Ethernet driver definitions for the MIPS GT96100 Advanced
24 * Communication Controller. 24 * Communication Controller.
25 * 25 *
26 */ 26 */
27#ifndef _GT96100ETH_H 27#ifndef _GT96100ETH_H
28#define _GT96100ETH_H 28#define _GT96100ETH_H
@@ -314,7 +314,7 @@ struct gt96100_private {
314 // The Hash Table must be 8-byte aligned 314 // The Hash Table must be 8-byte aligned
315 dma_addr_t hash_table_dma; 315 dma_addr_t hash_table_dma;
316 int hash_mode; 316 int hash_mode;
317 317
318 // The Rx buffers must be 8-byte aligned 318 // The Rx buffers must be 8-byte aligned
319 char* rx_buff; 319 char* rx_buff;
320 dma_addr_t rx_buff_dma; 320 dma_addr_t rx_buff_dma;
@@ -327,14 +327,14 @@ struct gt96100_private {
327 int tx_count; /* current # of pkts waiting to be sent in Tx ring */ 327 int tx_count; /* current # of pkts waiting to be sent in Tx ring */
328 int intr_work_done; /* number of Rx and Tx pkts processed in the isr */ 328 int intr_work_done; /* number of Rx and Tx pkts processed in the isr */
329 int tx_full; /* Tx ring is full */ 329 int tx_full; /* Tx ring is full */
330 330
331 mib_counters_t mib; 331 mib_counters_t mib;
332 struct net_device_stats stats; 332 struct net_device_stats stats;
333 333
334 int port_num; // 0 or 1 334 int port_num; // 0 or 1
335 int chip_rev; 335 int chip_rev;
336 u32 port_offset; 336 u32 port_offset;
337 337
338 int phy_addr; // PHY address 338 int phy_addr; // PHY address
339 u32 last_psr; // last value of the port status register 339 u32 last_psr; // last value of the port status register
340 340