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authorAndy Fleming <afleming@freescale.com>2006-12-01 13:01:06 -0500
committerJeff Garzik <jeff@garzik.org>2006-12-02 00:33:11 -0500
commite8a2b6a4207332a2d59628a12cece9e8c1d769e4 (patch)
tree31028a18413517ed3024450c20cd2e919441b437 /drivers/net/gianfar.c
parentcabdfb373ae74036225826ce260c16a8e260eb0b (diff)
[PATCH] PHY: Add support for configuring the PHY connection interface
Most PHYs connect to an ethernet controller over a GMII or MII interface. However, a growing number are connected over different interfaces, such as RGMII or SGMII. The ethernet driver will tell the PHY what type of connection it is by setting it manually, or passing it in through phy_connect (or phy_attach). Changes include: * Updates to documentation * Updates to PHY Lib consumers * Changes to PHY Lib to add interface support * Some minor changes to whitespace in phy.h * gianfar driver now detects interface and passes appropriate value to PHY Lib Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/gianfar.c')
-rw-r--r--drivers/net/gianfar.c39
1 files changed, 37 insertions, 2 deletions
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 6bf18c82083d..baa35144134c 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -9,7 +9,7 @@
9 * Author: Andy Fleming 9 * Author: Andy Fleming
10 * Maintainer: Kumar Gala 10 * Maintainer: Kumar Gala
11 * 11 *
12 * Copyright (c) 2002-2004 Freescale Semiconductor, Inc. 12 * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13 * 13 *
14 * This program is free software; you can redistribute it and/or modify it 14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the 15 * under the terms of the GNU General Public License as published by the
@@ -398,6 +398,38 @@ static int gfar_remove(struct platform_device *pdev)
398} 398}
399 399
400 400
401/* Reads the controller's registers to determine what interface
402 * connects it to the PHY.
403 */
404static phy_interface_t gfar_get_interface(struct net_device *dev)
405{
406 struct gfar_private *priv = netdev_priv(dev);
407 u32 ecntrl = gfar_read(&priv->regs->ecntrl);
408
409 if (ecntrl & ECNTRL_SGMII_MODE)
410 return PHY_INTERFACE_MODE_SGMII;
411
412 if (ecntrl & ECNTRL_TBI_MODE) {
413 if (ecntrl & ECNTRL_REDUCED_MODE)
414 return PHY_INTERFACE_MODE_RTBI;
415 else
416 return PHY_INTERFACE_MODE_TBI;
417 }
418
419 if (ecntrl & ECNTRL_REDUCED_MODE) {
420 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
421 return PHY_INTERFACE_MODE_RMII;
422 else
423 return PHY_INTERFACE_MODE_RGMII;
424 }
425
426 if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
427 return PHY_INTERFACE_MODE_GMII;
428
429 return PHY_INTERFACE_MODE_MII;
430}
431
432
401/* Initializes driver's PHY state, and attaches to the PHY. 433/* Initializes driver's PHY state, and attaches to the PHY.
402 * Returns 0 on success. 434 * Returns 0 on success.
403 */ 435 */
@@ -409,6 +441,7 @@ static int init_phy(struct net_device *dev)
409 SUPPORTED_1000baseT_Full : 0; 441 SUPPORTED_1000baseT_Full : 0;
410 struct phy_device *phydev; 442 struct phy_device *phydev;
411 char phy_id[BUS_ID_SIZE]; 443 char phy_id[BUS_ID_SIZE];
444 phy_interface_t interface;
412 445
413 priv->oldlink = 0; 446 priv->oldlink = 0;
414 priv->oldspeed = 0; 447 priv->oldspeed = 0;
@@ -416,7 +449,9 @@ static int init_phy(struct net_device *dev)
416 449
417 snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, priv->einfo->bus_id, priv->einfo->phy_id); 450 snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, priv->einfo->bus_id, priv->einfo->phy_id);
418 451
419 phydev = phy_connect(dev, phy_id, &adjust_link, 0); 452 interface = gfar_get_interface(dev);
453
454 phydev = phy_connect(dev, phy_id, &adjust_link, 0, interface);
420 455
421 if (IS_ERR(phydev)) { 456 if (IS_ERR(phydev)) {
422 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); 457 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);