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authorAyaz Abdulla <aabdulla@nvidia.com>2006-06-10 22:48:18 -0400
committerJeff Garzik <jeff@garzik.org>2006-06-11 09:25:16 -0400
commit69fe3fd7b1adac55f794cb2b34cb1c13a0b19f05 (patch)
tree7c5e668c6bbb8a8b1abd17c3b5c649304023475c /drivers/net/forcedeth.c
parent9589c77a0de19c0c95370d5212eb1f9006d8abcb (diff)
[PATCH] forcedeth config: module parameters
This patch adds (and modifies) module parameter support. Signed-Off-By: Ayaz Abdulla <aabdulla@nvidia.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/forcedeth.c')
-rw-r--r--drivers/net/forcedeth.c67
1 files changed, 45 insertions, 22 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 6ee3e8d5a04d..e69a043c473e 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -761,8 +761,10 @@ static int max_interrupt_work = 5;
761 * Throughput Mode: Every tx and rx packet will generate an interrupt. 761 * Throughput Mode: Every tx and rx packet will generate an interrupt.
762 * CPU Mode: Interrupts are controlled by a timer. 762 * CPU Mode: Interrupts are controlled by a timer.
763 */ 763 */
764#define NV_OPTIMIZATION_MODE_THROUGHPUT 0 764enum {
765#define NV_OPTIMIZATION_MODE_CPU 1 765 NV_OPTIMIZATION_MODE_THROUGHPUT,
766 NV_OPTIMIZATION_MODE_CPU
767};
766static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; 768static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
767 769
768/* 770/*
@@ -775,14 +777,31 @@ static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
775static int poll_interval = -1; 777static int poll_interval = -1;
776 778
777/* 779/*
778 * Disable MSI interrupts 780 * MSI interrupts
779 */ 781 */
780static int disable_msi = 0; 782enum {
783 NV_MSI_INT_DISABLED,
784 NV_MSI_INT_ENABLED
785};
786static int msi = NV_MSI_INT_ENABLED;
781 787
782/* 788/*
783 * Disable MSIX interrupts 789 * MSIX interrupts
784 */ 790 */
785static int disable_msix = 0; 791enum {
792 NV_MSIX_INT_DISABLED,
793 NV_MSIX_INT_ENABLED
794};
795static int msix = NV_MSIX_INT_ENABLED;
796
797/*
798 * DMA 64bit
799 */
800enum {
801 NV_DMA_64BIT_DISABLED,
802 NV_DMA_64BIT_ENABLED
803};
804static int dma_64bit = NV_DMA_64BIT_ENABLED;
786 805
787static inline struct fe_priv *get_nvpriv(struct net_device *dev) 806static inline struct fe_priv *get_nvpriv(struct net_device *dev)
788{ 807{
@@ -4115,16 +4134,18 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
4115 /* packet format 3: supports 40-bit addressing */ 4134 /* packet format 3: supports 40-bit addressing */
4116 np->desc_ver = DESC_VER_3; 4135 np->desc_ver = DESC_VER_3;
4117 np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; 4136 np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
4118 if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) { 4137 if (dma_64bit) {
4119 printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n", 4138 if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
4120 pci_name(pci_dev)); 4139 printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
4121 } else { 4140 pci_name(pci_dev));
4122 dev->features |= NETIF_F_HIGHDMA; 4141 } else {
4123 printk(KERN_INFO "forcedeth: using HIGHDMA\n"); 4142 dev->features |= NETIF_F_HIGHDMA;
4124 } 4143 printk(KERN_INFO "forcedeth: using HIGHDMA\n");
4125 if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) { 4144 }
4126 printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n", 4145 if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) {
4127 pci_name(pci_dev)); 4146 printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed, using 32-bit ring buffers for device %s.\n",
4147 pci_name(pci_dev));
4148 }
4128 } 4149 }
4129 } else if (id->driver_data & DEV_HAS_LARGEDESC) { 4150 } else if (id->driver_data & DEV_HAS_LARGEDESC) {
4130 /* packet format 2: supports jumbo frames */ 4151 /* packet format 2: supports jumbo frames */
@@ -4157,10 +4178,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
4157 } 4178 }
4158 4179
4159 np->msi_flags = 0; 4180 np->msi_flags = 0;
4160 if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) { 4181 if ((id->driver_data & DEV_HAS_MSI) && msi) {
4161 np->msi_flags |= NV_MSI_CAPABLE; 4182 np->msi_flags |= NV_MSI_CAPABLE;
4162 } 4183 }
4163 if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) { 4184 if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
4164 np->msi_flags |= NV_MSI_X_CAPABLE; 4185 np->msi_flags |= NV_MSI_X_CAPABLE;
4165 } 4186 }
4166 4187
@@ -4473,10 +4494,12 @@ module_param(optimization_mode, int, 0);
4473MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer."); 4494MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
4474module_param(poll_interval, int, 0); 4495module_param(poll_interval, int, 0);
4475MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); 4496MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
4476module_param(disable_msi, int, 0); 4497module_param(msi, int, 0);
4477MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1."); 4498MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0.");
4478module_param(disable_msix, int, 0); 4499module_param(msix, int, 0);
4479MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1."); 4500MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
4501module_param(dma_64bit, int, 0);
4502MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
4480 4503
4481MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); 4504MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
4482MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); 4505MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");