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authorAyaz Abdulla <aabdulla@nvidia.com>2008-02-04 15:14:09 -0500
committerJeff Garzik <jeff@garzik.org>2008-02-06 06:42:02 -0500
commit4e84f9b10461ad3c869ced4373dd85771dd67d20 (patch)
treef5ef2a69b4c04743f9dbc2dafad9fb94e6a4766c /drivers/net/forcedeth.c
parenteb79842838b6a3860d70be404fbb6e3b8f2a65de (diff)
forcedeth: preserve registers
Various registers need to be preserved before resetting the device. Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/forcedeth.c')
-rw-r--r--drivers/net/forcedeth.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 6d5cd94f33ae..d4843d014bc9 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -1435,16 +1435,30 @@ static void nv_mac_reset(struct net_device *dev)
1435{ 1435{
1436 struct fe_priv *np = netdev_priv(dev); 1436 struct fe_priv *np = netdev_priv(dev);
1437 u8 __iomem *base = get_hwbase(dev); 1437 u8 __iomem *base = get_hwbase(dev);
1438 u32 temp1, temp2, temp3;
1438 1439
1439 dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name); 1440 dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
1441
1440 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); 1442 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
1441 pci_push(base); 1443 pci_push(base);
1444
1445 /* save registers since they will be cleared on reset */
1446 temp1 = readl(base + NvRegMacAddrA);
1447 temp2 = readl(base + NvRegMacAddrB);
1448 temp3 = readl(base + NvRegTransmitPoll);
1449
1442 writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); 1450 writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
1443 pci_push(base); 1451 pci_push(base);
1444 udelay(NV_MAC_RESET_DELAY); 1452 udelay(NV_MAC_RESET_DELAY);
1445 writel(0, base + NvRegMacReset); 1453 writel(0, base + NvRegMacReset);
1446 pci_push(base); 1454 pci_push(base);
1447 udelay(NV_MAC_RESET_DELAY); 1455 udelay(NV_MAC_RESET_DELAY);
1456
1457 /* restore saved registers */
1458 writel(temp1, base + NvRegMacAddrA);
1459 writel(temp2, base + NvRegMacAddrB);
1460 writel(temp3, base + NvRegTransmitPoll);
1461
1448 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); 1462 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
1449 pci_push(base); 1463 pci_push(base);
1450} 1464}