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authorAyaz Abdulla <aabdulla@nvidia.com>2009-03-05 03:02:30 -0500
committerDavid S. Miller <davem@davemloft.net>2009-03-10 08:29:50 -0400
commit6cef67a02f7994c97dbd716dbeb592265fb5b7b0 (patch)
tree711f8fd66f7717651e5661ed81c93305d03c9989 /drivers/net/forcedeth.c
parent4145ade2bb265b34331265bfa2221e40b069b3ca (diff)
forcedeth: performance changes
This patch modifies the throughput mode poll settings to reduce the number of interrupts. This is only used by older hardware that need a timer irq in throughput mode. Secondly, this patch increases the default rx ring from 128 to 512. This drastically improves bandwidth utilization for small packets sizes i.e 512 bytes. Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/forcedeth.c')
-rw-r--r--drivers/net/forcedeth.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 341a35117eae..28fc3357268a 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -128,7 +128,7 @@ enum {
128 * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms 128 * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
129 */ 129 */
130 NvRegPollingInterval = 0x00c, 130 NvRegPollingInterval = 0x00c,
131#define NVREG_POLL_DEFAULT_THROUGHPUT 970 /* backup tx cleanup if loop max reached */ 131#define NVREG_POLL_DEFAULT_THROUGHPUT 65535 /* backup tx cleanup if loop max reached */
132#define NVREG_POLL_DEFAULT_CPU 13 132#define NVREG_POLL_DEFAULT_CPU 13
133 NvRegMSIMap0 = 0x020, 133 NvRegMSIMap0 = 0x020,
134 NvRegMSIMap1 = 0x024, 134 NvRegMSIMap1 = 0x024,
@@ -463,7 +463,7 @@ union ring_type {
463/* General driver defaults */ 463/* General driver defaults */
464#define NV_WATCHDOG_TIMEO (5*HZ) 464#define NV_WATCHDOG_TIMEO (5*HZ)
465 465
466#define RX_RING_DEFAULT 128 466#define RX_RING_DEFAULT 512
467#define TX_RING_DEFAULT 256 467#define TX_RING_DEFAULT 256
468#define RX_RING_MIN 128 468#define RX_RING_MIN 128
469#define TX_RING_MIN 64 469#define TX_RING_MIN 64