diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-09-13 13:24:59 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-09-13 13:24:59 -0400 |
commit | 6aa20a2235535605db6d6d2bd850298b2fe7f31e (patch) | |
tree | df0b855043407b831d57f2f2c271f8aab48444f4 /drivers/net/fec.c | |
parent | 7a291083225af6e22ffaa46b3d91cfc1a1ccaab4 (diff) |
drivers/net: Trim trailing whitespace
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/fec.c')
-rw-r--r-- | drivers/net/fec.c | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index 9eedb27dd695..55d86bc4c104 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c | |||
@@ -256,7 +256,7 @@ static mii_list_t *mii_free; | |||
256 | static mii_list_t *mii_head; | 256 | static mii_list_t *mii_head; |
257 | static mii_list_t *mii_tail; | 257 | static mii_list_t *mii_tail; |
258 | 258 | ||
259 | static int mii_queue(struct net_device *dev, int request, | 259 | static int mii_queue(struct net_device *dev, int request, |
260 | void (*func)(uint, struct net_device *)); | 260 | void (*func)(uint, struct net_device *)); |
261 | 261 | ||
262 | /* Make MII read/write commands for the FEC. | 262 | /* Make MII read/write commands for the FEC. |
@@ -277,7 +277,7 @@ static int mii_queue(struct net_device *dev, int request, | |||
277 | #define MII_REG_SR 1 /* Status Register */ | 277 | #define MII_REG_SR 1 /* Status Register */ |
278 | #define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ | 278 | #define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ |
279 | #define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ | 279 | #define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ |
280 | #define MII_REG_ANAR 4 /* A-N Advertisement Register */ | 280 | #define MII_REG_ANAR 4 /* A-N Advertisement Register */ |
281 | #define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ | 281 | #define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ |
282 | #define MII_REG_ANER 6 /* A-N Expansion Register */ | 282 | #define MII_REG_ANER 6 /* A-N Expansion Register */ |
283 | #define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ | 283 | #define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ |
@@ -289,18 +289,18 @@ static int mii_queue(struct net_device *dev, int request, | |||
289 | #define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ | 289 | #define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ |
290 | #define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ | 290 | #define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ |
291 | #define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ | 291 | #define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ |
292 | #define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ | 292 | #define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ |
293 | #define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ | 293 | #define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ |
294 | #define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ | 294 | #define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ |
295 | 295 | ||
296 | #define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ | 296 | #define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ |
297 | #define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ | 297 | #define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ |
298 | #define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ | 298 | #define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ |
299 | #define PHY_STAT_SPMASK 0xf000 /* mask for speed */ | 299 | #define PHY_STAT_SPMASK 0xf000 /* mask for speed */ |
300 | #define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ | 300 | #define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ |
301 | #define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ | 301 | #define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ |
302 | #define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ | 302 | #define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ |
303 | #define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ | 303 | #define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ |
304 | 304 | ||
305 | 305 | ||
306 | static int | 306 | static int |
@@ -360,7 +360,7 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
360 | 360 | ||
361 | fep->stats.tx_bytes += skb->len; | 361 | fep->stats.tx_bytes += skb->len; |
362 | fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; | 362 | fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; |
363 | 363 | ||
364 | /* Push the data cache so the CPM does not get stale memory | 364 | /* Push the data cache so the CPM does not get stale memory |
365 | * data. | 365 | * data. |
366 | */ | 366 | */ |
@@ -422,7 +422,7 @@ fec_timeout(struct net_device *dev) | |||
422 | bdp = fep->tx_bd_base; | 422 | bdp = fep->tx_bd_base; |
423 | printk(" tx: %u buffers\n", TX_RING_SIZE); | 423 | printk(" tx: %u buffers\n", TX_RING_SIZE); |
424 | for (i = 0 ; i < TX_RING_SIZE; i++) { | 424 | for (i = 0 ; i < TX_RING_SIZE; i++) { |
425 | printk(" %08x: %04x %04x %08x\n", | 425 | printk(" %08x: %04x %04x %08x\n", |
426 | (uint) bdp, | 426 | (uint) bdp, |
427 | bdp->cbd_sc, | 427 | bdp->cbd_sc, |
428 | bdp->cbd_datlen, | 428 | bdp->cbd_datlen, |
@@ -484,7 +484,7 @@ fec_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs) | |||
484 | handled = 1; | 484 | handled = 1; |
485 | fec_enet_mii(dev); | 485 | fec_enet_mii(dev); |
486 | } | 486 | } |
487 | 487 | ||
488 | } | 488 | } |
489 | return IRQ_RETVAL(handled); | 489 | return IRQ_RETVAL(handled); |
490 | } | 490 | } |
@@ -534,20 +534,20 @@ fec_enet_tx(struct net_device *dev) | |||
534 | */ | 534 | */ |
535 | if (status & BD_ENET_TX_DEF) | 535 | if (status & BD_ENET_TX_DEF) |
536 | fep->stats.collisions++; | 536 | fep->stats.collisions++; |
537 | 537 | ||
538 | /* Free the sk buffer associated with this last transmit. | 538 | /* Free the sk buffer associated with this last transmit. |
539 | */ | 539 | */ |
540 | dev_kfree_skb_any(skb); | 540 | dev_kfree_skb_any(skb); |
541 | fep->tx_skbuff[fep->skb_dirty] = NULL; | 541 | fep->tx_skbuff[fep->skb_dirty] = NULL; |
542 | fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; | 542 | fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; |
543 | 543 | ||
544 | /* Update pointer to next buffer descriptor to be transmitted. | 544 | /* Update pointer to next buffer descriptor to be transmitted. |
545 | */ | 545 | */ |
546 | if (status & BD_ENET_TX_WRAP) | 546 | if (status & BD_ENET_TX_WRAP) |
547 | bdp = fep->tx_bd_base; | 547 | bdp = fep->tx_bd_base; |
548 | else | 548 | else |
549 | bdp++; | 549 | bdp++; |
550 | 550 | ||
551 | /* Since we have freed up a buffer, the ring is no longer | 551 | /* Since we have freed up a buffer, the ring is no longer |
552 | * full. | 552 | * full. |
553 | */ | 553 | */ |
@@ -577,10 +577,10 @@ fec_enet_rx(struct net_device *dev) | |||
577 | struct sk_buff *skb; | 577 | struct sk_buff *skb; |
578 | ushort pkt_len; | 578 | ushort pkt_len; |
579 | __u8 *data; | 579 | __u8 *data; |
580 | 580 | ||
581 | #ifdef CONFIG_M532x | 581 | #ifdef CONFIG_M532x |
582 | flush_cache_all(); | 582 | flush_cache_all(); |
583 | #endif | 583 | #endif |
584 | 584 | ||
585 | fep = netdev_priv(dev); | 585 | fep = netdev_priv(dev); |
586 | fecp = (volatile fec_t*)dev->base_addr; | 586 | fecp = (volatile fec_t*)dev->base_addr; |
@@ -606,7 +606,7 @@ while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) { | |||
606 | /* Check for errors. */ | 606 | /* Check for errors. */ |
607 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | | 607 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | |
608 | BD_ENET_RX_CR | BD_ENET_RX_OV)) { | 608 | BD_ENET_RX_CR | BD_ENET_RX_OV)) { |
609 | fep->stats.rx_errors++; | 609 | fep->stats.rx_errors++; |
610 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { | 610 | if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { |
611 | /* Frame too long or too short. */ | 611 | /* Frame too long or too short. */ |
612 | fep->stats.rx_length_errors++; | 612 | fep->stats.rx_length_errors++; |
@@ -670,7 +670,7 @@ while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) { | |||
670 | bdp = fep->rx_bd_base; | 670 | bdp = fep->rx_bd_base; |
671 | else | 671 | else |
672 | bdp++; | 672 | bdp++; |
673 | 673 | ||
674 | #if 1 | 674 | #if 1 |
675 | /* Doing this here will keep the FEC running while we process | 675 | /* Doing this here will keep the FEC running while we process |
676 | * incoming frames. On a heavily loaded network, we should be | 676 | * incoming frames. On a heavily loaded network, we should be |
@@ -708,7 +708,7 @@ fec_enet_mii(struct net_device *dev) | |||
708 | mii_reg = ep->fec_mii_data; | 708 | mii_reg = ep->fec_mii_data; |
709 | 709 | ||
710 | spin_lock(&fep->lock); | 710 | spin_lock(&fep->lock); |
711 | 711 | ||
712 | if ((mip = mii_head) == NULL) { | 712 | if ((mip = mii_head) == NULL) { |
713 | printk("MII and no head!\n"); | 713 | printk("MII and no head!\n"); |
714 | goto unlock; | 714 | goto unlock; |
@@ -886,14 +886,14 @@ static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */ | |||
886 | { mk_mii_end, } | 886 | { mk_mii_end, } |
887 | }; | 887 | }; |
888 | static phy_info_t const phy_info_lxt970 = { | 888 | static phy_info_t const phy_info_lxt970 = { |
889 | .id = 0x07810000, | 889 | .id = 0x07810000, |
890 | .name = "LXT970", | 890 | .name = "LXT970", |
891 | .config = phy_cmd_lxt970_config, | 891 | .config = phy_cmd_lxt970_config, |
892 | .startup = phy_cmd_lxt970_startup, | 892 | .startup = phy_cmd_lxt970_startup, |
893 | .ack_int = phy_cmd_lxt970_ack_int, | 893 | .ack_int = phy_cmd_lxt970_ack_int, |
894 | .shutdown = phy_cmd_lxt970_shutdown | 894 | .shutdown = phy_cmd_lxt970_shutdown |
895 | }; | 895 | }; |
896 | 896 | ||
897 | /* ------------------------------------------------------------------------- */ | 897 | /* ------------------------------------------------------------------------- */ |
898 | /* The Level one LXT971 is used on some of my custom boards */ | 898 | /* The Level one LXT971 is used on some of my custom boards */ |
899 | 899 | ||
@@ -906,7 +906,7 @@ static phy_info_t const phy_info_lxt970 = { | |||
906 | #define MII_LXT971_LCR 20 /* LED Control Register */ | 906 | #define MII_LXT971_LCR 20 /* LED Control Register */ |
907 | #define MII_LXT971_TCR 30 /* Transmit Control Register */ | 907 | #define MII_LXT971_TCR 30 /* Transmit Control Register */ |
908 | 908 | ||
909 | /* | 909 | /* |
910 | * I had some nice ideas of running the MDIO faster... | 910 | * I had some nice ideas of running the MDIO faster... |
911 | * The 971 should support 8MHz and I tried it, but things acted really | 911 | * The 971 should support 8MHz and I tried it, but things acted really |
912 | * weird, so 2.5 MHz ought to be enough for anyone... | 912 | * weird, so 2.5 MHz ought to be enough for anyone... |
@@ -944,9 +944,9 @@ static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) | |||
944 | 944 | ||
945 | *s = status; | 945 | *s = status; |
946 | } | 946 | } |
947 | 947 | ||
948 | static phy_cmd_t const phy_cmd_lxt971_config[] = { | 948 | static phy_cmd_t const phy_cmd_lxt971_config[] = { |
949 | /* limit to 10MBit because my prototype board | 949 | /* limit to 10MBit because my prototype board |
950 | * doesn't work with 100. */ | 950 | * doesn't work with 100. */ |
951 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, | 951 | { mk_mii_read(MII_REG_CR), mii_parse_cr }, |
952 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, | 952 | { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, |
@@ -960,7 +960,7 @@ static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */ | |||
960 | /* Somehow does the 971 tell me that the link is down | 960 | /* Somehow does the 971 tell me that the link is down |
961 | * the first read after power-up. | 961 | * the first read after power-up. |
962 | * read here to get a valid value in ack_int */ | 962 | * read here to get a valid value in ack_int */ |
963 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, | 963 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
964 | { mk_mii_end, } | 964 | { mk_mii_end, } |
965 | }; | 965 | }; |
966 | static phy_cmd_t const phy_cmd_lxt971_ack_int[] = { | 966 | static phy_cmd_t const phy_cmd_lxt971_ack_int[] = { |
@@ -976,7 +976,7 @@ static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */ | |||
976 | { mk_mii_end, } | 976 | { mk_mii_end, } |
977 | }; | 977 | }; |
978 | static phy_info_t const phy_info_lxt971 = { | 978 | static phy_info_t const phy_info_lxt971 = { |
979 | .id = 0x0001378e, | 979 | .id = 0x0001378e, |
980 | .name = "LXT971", | 980 | .name = "LXT971", |
981 | .config = phy_cmd_lxt971_config, | 981 | .config = phy_cmd_lxt971_config, |
982 | .startup = phy_cmd_lxt971_startup, | 982 | .startup = phy_cmd_lxt971_startup, |
@@ -1015,7 +1015,7 @@ static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) | |||
1015 | } | 1015 | } |
1016 | 1016 | ||
1017 | static phy_cmd_t const phy_cmd_qs6612_config[] = { | 1017 | static phy_cmd_t const phy_cmd_qs6612_config[] = { |
1018 | /* The PHY powers up isolated on the RPX, | 1018 | /* The PHY powers up isolated on the RPX, |
1019 | * so send a command to allow operation. | 1019 | * so send a command to allow operation. |
1020 | */ | 1020 | */ |
1021 | { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, | 1021 | { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, |
@@ -1045,7 +1045,7 @@ static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */ | |||
1045 | { mk_mii_end, } | 1045 | { mk_mii_end, } |
1046 | }; | 1046 | }; |
1047 | static phy_info_t const phy_info_qs6612 = { | 1047 | static phy_info_t const phy_info_qs6612 = { |
1048 | .id = 0x00181440, | 1048 | .id = 0x00181440, |
1049 | .name = "QS6612", | 1049 | .name = "QS6612", |
1050 | .config = phy_cmd_qs6612_config, | 1050 | .config = phy_cmd_qs6612_config, |
1051 | .startup = phy_cmd_qs6612_startup, | 1051 | .startup = phy_cmd_qs6612_startup, |
@@ -1093,7 +1093,7 @@ static phy_cmd_t const phy_cmd_am79c874_config[] = { | |||
1093 | static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */ | 1093 | static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */ |
1094 | { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, | 1094 | { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, |
1095 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ | 1095 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
1096 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, | 1096 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
1097 | { mk_mii_end, } | 1097 | { mk_mii_end, } |
1098 | }; | 1098 | }; |
1099 | static phy_cmd_t const phy_cmd_am79c874_ack_int[] = { | 1099 | static phy_cmd_t const phy_cmd_am79c874_ack_int[] = { |
@@ -1135,7 +1135,7 @@ static phy_cmd_t const phy_cmd_ks8721bl_config[] = { | |||
1135 | static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */ | 1135 | static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */ |
1136 | { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL }, | 1136 | { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL }, |
1137 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ | 1137 | { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ |
1138 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, | 1138 | { mk_mii_read(MII_REG_SR), mii_parse_sr }, |
1139 | { mk_mii_end, } | 1139 | { mk_mii_end, } |
1140 | }; | 1140 | }; |
1141 | static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = { | 1141 | static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = { |
@@ -1150,7 +1150,7 @@ static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */ | |||
1150 | { mk_mii_end, } | 1150 | { mk_mii_end, } |
1151 | }; | 1151 | }; |
1152 | static phy_info_t const phy_info_ks8721bl = { | 1152 | static phy_info_t const phy_info_ks8721bl = { |
1153 | .id = 0x00022161, | 1153 | .id = 0x00022161, |
1154 | .name = "KS8721BL", | 1154 | .name = "KS8721BL", |
1155 | .config = phy_cmd_ks8721bl_config, | 1155 | .config = phy_cmd_ks8721bl_config, |
1156 | .startup = phy_cmd_ks8721bl_startup, | 1156 | .startup = phy_cmd_ks8721bl_startup, |
@@ -1420,7 +1420,7 @@ static void __inline__ fec_request_intrs(struct net_device *dev) | |||
1420 | { | 1420 | { |
1421 | volatile u16 *gpio_paspar; | 1421 | volatile u16 *gpio_paspar; |
1422 | volatile u8 *gpio_pehlpar; | 1422 | volatile u8 *gpio_pehlpar; |
1423 | 1423 | ||
1424 | gpio_paspar = (volatile u16 *) (MCF_IPSBAR + 0x100056); | 1424 | gpio_paspar = (volatile u16 *) (MCF_IPSBAR + 0x100056); |
1425 | gpio_pehlpar = (volatile u16 *) (MCF_IPSBAR + 0x100058); | 1425 | gpio_pehlpar = (volatile u16 *) (MCF_IPSBAR + 0x100058); |
1426 | *gpio_paspar |= 0x0f00; | 1426 | *gpio_paspar |= 0x0f00; |
@@ -1667,7 +1667,7 @@ static void __inline__ fec_request_intrs(struct net_device *dev) | |||
1667 | /* Setup interrupt handlers. */ | 1667 | /* Setup interrupt handlers. */ |
1668 | for (idp = id; idp->name; idp++) { | 1668 | for (idp = id; idp->name; idp++) { |
1669 | if (request_irq(b+idp->irq,fec_enet_interrupt,0,idp->name,dev)!=0) | 1669 | if (request_irq(b+idp->irq,fec_enet_interrupt,0,idp->name,dev)!=0) |
1670 | printk("FEC: Could not allocate %s IRQ(%d)!\n", | 1670 | printk("FEC: Could not allocate %s IRQ(%d)!\n", |
1671 | idp->name, b+idp->irq); | 1671 | idp->name, b+idp->irq); |
1672 | } | 1672 | } |
1673 | 1673 | ||
@@ -1856,10 +1856,10 @@ static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_priva | |||
1856 | immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */ | 1856 | immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */ |
1857 | else | 1857 | else |
1858 | immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */ | 1858 | immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */ |
1859 | 1859 | ||
1860 | /* Set MII speed to 2.5 MHz | 1860 | /* Set MII speed to 2.5 MHz |
1861 | */ | 1861 | */ |
1862 | fecp->fec_mii_speed = fep->phy_speed = | 1862 | fecp->fec_mii_speed = fep->phy_speed = |
1863 | ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e; | 1863 | ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e; |
1864 | } | 1864 | } |
1865 | 1865 | ||
@@ -1869,7 +1869,7 @@ static void __inline__ fec_enable_phy_intr(void) | |||
1869 | 1869 | ||
1870 | fecp = fep->hwp; | 1870 | fecp = fep->hwp; |
1871 | 1871 | ||
1872 | /* Enable MII command finished interrupt | 1872 | /* Enable MII command finished interrupt |
1873 | */ | 1873 | */ |
1874 | fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; | 1874 | fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; |
1875 | } | 1875 | } |
@@ -1971,7 +1971,7 @@ static void mii_display_config(struct net_device *dev) | |||
1971 | 1971 | ||
1972 | if (status & PHY_CONF_LOOP) | 1972 | if (status & PHY_CONF_LOOP) |
1973 | printk(", loopback enabled"); | 1973 | printk(", loopback enabled"); |
1974 | 1974 | ||
1975 | printk(".\n"); | 1975 | printk(".\n"); |
1976 | 1976 | ||
1977 | fep->sequence_done = 1; | 1977 | fep->sequence_done = 1; |
@@ -1993,7 +1993,7 @@ static void mii_relink(struct net_device *dev) | |||
1993 | 1993 | ||
1994 | if (fep->link) { | 1994 | if (fep->link) { |
1995 | duplex = 0; | 1995 | duplex = 0; |
1996 | if (fep->phy_status | 1996 | if (fep->phy_status |
1997 | & (PHY_STAT_100FDX | PHY_STAT_10FDX)) | 1997 | & (PHY_STAT_100FDX | PHY_STAT_10FDX)) |
1998 | duplex = 1; | 1998 | duplex = 1; |
1999 | fec_restart(dev, duplex); | 1999 | fec_restart(dev, duplex); |
@@ -2070,7 +2070,7 @@ mii_discover_phy3(uint mii_reg, struct net_device *dev) | |||
2070 | printk(" -- %s\n", phy_info[i]->name); | 2070 | printk(" -- %s\n", phy_info[i]->name); |
2071 | else | 2071 | else |
2072 | printk(" -- unknown PHY!\n"); | 2072 | printk(" -- unknown PHY!\n"); |
2073 | 2073 | ||
2074 | fep->phy = phy_info[i]; | 2074 | fep->phy = phy_info[i]; |
2075 | fep->phy_id_done = 1; | 2075 | fep->phy_id_done = 1; |
2076 | } | 2076 | } |
@@ -2090,7 +2090,7 @@ mii_discover_phy(uint mii_reg, struct net_device *dev) | |||
2090 | 2090 | ||
2091 | if (fep->phy_addr < 32) { | 2091 | if (fep->phy_addr < 32) { |
2092 | if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { | 2092 | if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { |
2093 | 2093 | ||
2094 | /* Got first part of ID, now get remainder. | 2094 | /* Got first part of ID, now get remainder. |
2095 | */ | 2095 | */ |
2096 | fep->phy_id = phytype << 16; | 2096 | fep->phy_id = phytype << 16; |
@@ -2243,7 +2243,7 @@ static void set_multicast_list(struct net_device *dev) | |||
2243 | */ | 2243 | */ |
2244 | ep->fec_hash_table_high = 0; | 2244 | ep->fec_hash_table_high = 0; |
2245 | ep->fec_hash_table_low = 0; | 2245 | ep->fec_hash_table_low = 0; |
2246 | 2246 | ||
2247 | dmi = dev->mc_list; | 2247 | dmi = dev->mc_list; |
2248 | 2248 | ||
2249 | for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) | 2249 | for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) |
@@ -2252,7 +2252,7 @@ static void set_multicast_list(struct net_device *dev) | |||
2252 | */ | 2252 | */ |
2253 | if (!(dmi->dmi_addr[0] & 1)) | 2253 | if (!(dmi->dmi_addr[0] & 1)) |
2254 | continue; | 2254 | continue; |
2255 | 2255 | ||
2256 | /* calculate crc32 value of mac address | 2256 | /* calculate crc32 value of mac address |
2257 | */ | 2257 | */ |
2258 | crc = 0xffffffff; | 2258 | crc = 0xffffffff; |
@@ -2271,7 +2271,7 @@ static void set_multicast_list(struct net_device *dev) | |||
2271 | which point to specific bit in he hash registers | 2271 | which point to specific bit in he hash registers |
2272 | */ | 2272 | */ |
2273 | hash = (crc >> (32 - HASH_BITS)) & 0x3f; | 2273 | hash = (crc >> (32 - HASH_BITS)) & 0x3f; |
2274 | 2274 | ||
2275 | if (hash > 31) | 2275 | if (hash > 31) |
2276 | ep->fec_hash_table_high |= 1 << (hash - 32); | 2276 | ep->fec_hash_table_high |= 1 << (hash - 32); |
2277 | else | 2277 | else |