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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-31 21:43:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-31 21:43:13 -0400
commitfd37ce34bd512f2b1a503f82abf8768da556a955 (patch)
tree557ff43ff5291d1704527e31293633fbc2f956d5 /drivers/net/ethernet
parent4b24ff71108164e047cf2c95990b77651163e315 (diff)
parentcaacf05e5ad1abf0a2864863da4e33024bc68ec6 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking update from David S. Miller: "I think Eric Dumazet and I have dealt with all of the known routing cache removal fallout. Some other minor fixes all around. 1) Fix RCU of cached routes, particular of output routes which require liberation via call_rcu() instead of call_rcu_bh(). From Eric Dumazet. 2) Make sure we purge net device references in cached routes properly. 3) TG3 driver bug fixes from Michael Chan. 4) Fix reported 'expires' value in ipv6 routes, from Li Wei. 5) TUN driver ioctl leaks kernel bytes to userspace, from Mathias Krause." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (22 commits) ipv4: Properly purge netdev references on uncached routes. ipv4: Cache routes in nexthop exception entries. ipv4: percpu nh_rth_output cache ipv4: Restore old dst_free() behavior. bridge: make port attributes const ipv4: remove rt_cache_rebuild_count net: ipv4: fix RCU races on dst refcounts net: TCP early demux cleanup tun: Fix formatting. net/tun: fix ioctl() based info leaks tg3: Update version to 3.124 tg3: Fix race condition in tg3_get_stats64() tg3: Add New 5719 Read DMA workaround tg3: Fix Read DMA workaround for 5719 A0. tg3: Request APE_LOCK_PHY before PHY access ipv6: fix incorrect route 'expires' value passed to userspace mISDN: Bugfix only few bytes are transfered on a connection seeq: use PTR_RET at init_module of driver bnx2x: remove cast around the kmalloc in bnx2x_prev_mark_path ipv4: clean up put_child ...
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c3
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c71
-rw-r--r--drivers/net/ethernet/broadcom/tg3.h8
-rw-r--r--drivers/net/ethernet/qlogic/qlge/qlge_main.c1
-rw-r--r--drivers/net/ethernet/seeq/seeq8005.c4
5 files changed, 76 insertions, 11 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 9aaf863b4237..dd451c3dd83d 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -9360,8 +9360,7 @@ static int __devinit bnx2x_prev_mark_path(struct bnx2x *bp)
9360 struct bnx2x_prev_path_list *tmp_list; 9360 struct bnx2x_prev_path_list *tmp_list;
9361 int rc; 9361 int rc;
9362 9362
9363 tmp_list = (struct bnx2x_prev_path_list *) 9363 tmp_list = kmalloc(sizeof(struct bnx2x_prev_path_list), GFP_KERNEL);
9364 kmalloc(sizeof(struct bnx2x_prev_path_list), GFP_KERNEL);
9365 if (!tmp_list) { 9364 if (!tmp_list) {
9366 BNX2X_ERR("Failed to allocate 'bnx2x_prev_path_list'\n"); 9365 BNX2X_ERR("Failed to allocate 'bnx2x_prev_path_list'\n");
9367 return -ENOMEM; 9366 return -ENOMEM;
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 9a009fd6ea1b..bf906c51d82a 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -92,7 +92,7 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
92 92
93#define DRV_MODULE_NAME "tg3" 93#define DRV_MODULE_NAME "tg3"
94#define TG3_MAJ_NUM 3 94#define TG3_MAJ_NUM 3
95#define TG3_MIN_NUM 123 95#define TG3_MIN_NUM 124
96#define DRV_MODULE_VERSION \ 96#define DRV_MODULE_VERSION \
97 __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM) 97 __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
98#define DRV_MODULE_RELDATE "March 21, 2012" 98#define DRV_MODULE_RELDATE "March 21, 2012"
@@ -672,6 +672,12 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
672 else 672 else
673 bit = 1 << tp->pci_fn; 673 bit = 1 << tp->pci_fn;
674 break; 674 break;
675 case TG3_APE_LOCK_PHY0:
676 case TG3_APE_LOCK_PHY1:
677 case TG3_APE_LOCK_PHY2:
678 case TG3_APE_LOCK_PHY3:
679 bit = APE_LOCK_REQ_DRIVER;
680 break;
675 default: 681 default:
676 return -EINVAL; 682 return -EINVAL;
677 } 683 }
@@ -723,6 +729,12 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum)
723 else 729 else
724 bit = 1 << tp->pci_fn; 730 bit = 1 << tp->pci_fn;
725 break; 731 break;
732 case TG3_APE_LOCK_PHY0:
733 case TG3_APE_LOCK_PHY1:
734 case TG3_APE_LOCK_PHY2:
735 case TG3_APE_LOCK_PHY3:
736 bit = APE_LOCK_GRANT_DRIVER;
737 break;
726 default: 738 default:
727 return; 739 return;
728 } 740 }
@@ -1052,6 +1064,8 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
1052 udelay(80); 1064 udelay(80);
1053 } 1065 }
1054 1066
1067 tg3_ape_lock(tp, tp->phy_ape_lock);
1068
1055 *val = 0x0; 1069 *val = 0x0;
1056 1070
1057 frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & 1071 frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) &
@@ -1086,6 +1100,8 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
1086 udelay(80); 1100 udelay(80);
1087 } 1101 }
1088 1102
1103 tg3_ape_unlock(tp, tp->phy_ape_lock);
1104
1089 return ret; 1105 return ret;
1090} 1106}
1091 1107
@@ -1105,6 +1121,8 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
1105 udelay(80); 1121 udelay(80);
1106 } 1122 }
1107 1123
1124 tg3_ape_lock(tp, tp->phy_ape_lock);
1125
1108 frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & 1126 frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) &
1109 MI_COM_PHY_ADDR_MASK); 1127 MI_COM_PHY_ADDR_MASK);
1110 frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & 1128 frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
@@ -1135,6 +1153,8 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
1135 udelay(80); 1153 udelay(80);
1136 } 1154 }
1137 1155
1156 tg3_ape_unlock(tp, tp->phy_ape_lock);
1157
1138 return ret; 1158 return ret;
1139} 1159}
1140 1160
@@ -9066,8 +9086,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
9066 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || 9086 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
9067 tg3_flag(tp, 57765_PLUS)) { 9087 tg3_flag(tp, 57765_PLUS)) {
9068 val = tr32(TG3_RDMA_RSRVCTRL_REG); 9088 val = tr32(TG3_RDMA_RSRVCTRL_REG);
9069 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || 9089 if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0) {
9070 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
9071 val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK | 9090 val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK |
9072 TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK | 9091 TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK |
9073 TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK); 9092 TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK);
@@ -9257,6 +9276,19 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
9257 tw32_f(RDMAC_MODE, rdmac_mode); 9276 tw32_f(RDMAC_MODE, rdmac_mode);
9258 udelay(40); 9277 udelay(40);
9259 9278
9279 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
9280 for (i = 0; i < TG3_NUM_RDMA_CHANNELS; i++) {
9281 if (tr32(TG3_RDMA_LENGTH + (i << 2)) > TG3_MAX_MTU(tp))
9282 break;
9283 }
9284 if (i < TG3_NUM_RDMA_CHANNELS) {
9285 val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL);
9286 val |= TG3_LSO_RD_DMA_TX_LENGTH_WA;
9287 tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val);
9288 tg3_flag_set(tp, 5719_RDMA_BUG);
9289 }
9290 }
9291
9260 tw32(RCVDCC_MODE, RCVDCC_MODE_ENABLE | RCVDCC_MODE_ATTN_ENABLE); 9292 tw32(RCVDCC_MODE, RCVDCC_MODE_ENABLE | RCVDCC_MODE_ATTN_ENABLE);
9261 if (!tg3_flag(tp, 5705_PLUS)) 9293 if (!tg3_flag(tp, 5705_PLUS))
9262 tw32(MBFREE_MODE, MBFREE_MODE_ENABLE); 9294 tw32(MBFREE_MODE, MBFREE_MODE_ENABLE);
@@ -9616,6 +9648,16 @@ static void tg3_periodic_fetch_stats(struct tg3 *tp)
9616 TG3_STAT_ADD32(&sp->tx_ucast_packets, MAC_TX_STATS_UCAST); 9648 TG3_STAT_ADD32(&sp->tx_ucast_packets, MAC_TX_STATS_UCAST);
9617 TG3_STAT_ADD32(&sp->tx_mcast_packets, MAC_TX_STATS_MCAST); 9649 TG3_STAT_ADD32(&sp->tx_mcast_packets, MAC_TX_STATS_MCAST);
9618 TG3_STAT_ADD32(&sp->tx_bcast_packets, MAC_TX_STATS_BCAST); 9650 TG3_STAT_ADD32(&sp->tx_bcast_packets, MAC_TX_STATS_BCAST);
9651 if (unlikely(tg3_flag(tp, 5719_RDMA_BUG) &&
9652 (sp->tx_ucast_packets.low + sp->tx_mcast_packets.low +
9653 sp->tx_bcast_packets.low) > TG3_NUM_RDMA_CHANNELS)) {
9654 u32 val;
9655
9656 val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL);
9657 val &= ~TG3_LSO_RD_DMA_TX_LENGTH_WA;
9658 tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val);
9659 tg3_flag_clear(tp, 5719_RDMA_BUG);
9660 }
9619 9661
9620 TG3_STAT_ADD32(&sp->rx_octets, MAC_RX_STATS_OCTETS); 9662 TG3_STAT_ADD32(&sp->rx_octets, MAC_RX_STATS_OCTETS);
9621 TG3_STAT_ADD32(&sp->rx_fragments, MAC_RX_STATS_FRAGMENTS); 9663 TG3_STAT_ADD32(&sp->rx_fragments, MAC_RX_STATS_FRAGMENTS);
@@ -12482,10 +12524,12 @@ static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev,
12482{ 12524{
12483 struct tg3 *tp = netdev_priv(dev); 12525 struct tg3 *tp = netdev_priv(dev);
12484 12526
12485 if (!tp->hw_stats) 12527 spin_lock_bh(&tp->lock);
12528 if (!tp->hw_stats) {
12529 spin_unlock_bh(&tp->lock);
12486 return &tp->net_stats_prev; 12530 return &tp->net_stats_prev;
12531 }
12487 12532
12488 spin_lock_bh(&tp->lock);
12489 tg3_get_nstats(tp, stats); 12533 tg3_get_nstats(tp, stats);
12490 spin_unlock_bh(&tp->lock); 12534 spin_unlock_bh(&tp->lock);
12491 12535
@@ -13648,6 +13692,23 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
13648 tg3_flag_set(tp, PAUSE_AUTONEG); 13692 tg3_flag_set(tp, PAUSE_AUTONEG);
13649 tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; 13693 tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
13650 13694
13695 if (tg3_flag(tp, ENABLE_APE)) {
13696 switch (tp->pci_fn) {
13697 case 0:
13698 tp->phy_ape_lock = TG3_APE_LOCK_PHY0;
13699 break;
13700 case 1:
13701 tp->phy_ape_lock = TG3_APE_LOCK_PHY1;
13702 break;
13703 case 2:
13704 tp->phy_ape_lock = TG3_APE_LOCK_PHY2;
13705 break;
13706 case 3:
13707 tp->phy_ape_lock = TG3_APE_LOCK_PHY3;
13708 break;
13709 }
13710 }
13711
13651 if (tg3_flag(tp, USE_PHYLIB)) 13712 if (tg3_flag(tp, USE_PHYLIB))
13652 return tg3_phy_init(tp); 13713 return tg3_phy_init(tp);
13653 13714
diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h
index a1b75cd67b9d..6d52cb286826 100644
--- a/drivers/net/ethernet/broadcom/tg3.h
+++ b/drivers/net/ethernet/broadcom/tg3.h
@@ -1376,7 +1376,11 @@
1376#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910 1376#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910
1377#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K 0x00030000 1377#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K 0x00030000
1378#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K 0x000c0000 1378#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K 0x000c0000
1379/* 0x4914 --> 0x4c00 unused */ 1379#define TG3_LSO_RD_DMA_TX_LENGTH_WA 0x02000000
1380/* 0x4914 --> 0x4be0 unused */
1381
1382#define TG3_NUM_RDMA_CHANNELS 4
1383#define TG3_RDMA_LENGTH 0x00004be0
1380 1384
1381/* Write DMA control registers */ 1385/* Write DMA control registers */
1382#define WDMAC_MODE 0x00004c00 1386#define WDMAC_MODE 0x00004c00
@@ -2959,6 +2963,7 @@ enum TG3_FLAGS {
2959 TG3_FLAG_L1PLLPD_EN, 2963 TG3_FLAG_L1PLLPD_EN,
2960 TG3_FLAG_APE_HAS_NCSI, 2964 TG3_FLAG_APE_HAS_NCSI,
2961 TG3_FLAG_4K_FIFO_LIMIT, 2965 TG3_FLAG_4K_FIFO_LIMIT,
2966 TG3_FLAG_5719_RDMA_BUG,
2962 TG3_FLAG_RESET_TASK_PENDING, 2967 TG3_FLAG_RESET_TASK_PENDING,
2963 TG3_FLAG_5705_PLUS, 2968 TG3_FLAG_5705_PLUS,
2964 TG3_FLAG_IS_5788, 2969 TG3_FLAG_IS_5788,
@@ -3107,6 +3112,7 @@ struct tg3 {
3107 int old_link; 3112 int old_link;
3108 3113
3109 u8 phy_addr; 3114 u8 phy_addr;
3115 u8 phy_ape_lock;
3110 3116
3111 /* PHY info */ 3117 /* PHY info */
3112 u32 phy_id; 3118 u32 phy_id;
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
index 3769f5711cc3..b53a3b60b648 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
@@ -4682,6 +4682,7 @@ static int __devinit qlge_probe(struct pci_dev *pdev,
4682 NETIF_F_HW_VLAN_TX | NETIF_F_RXCSUM; 4682 NETIF_F_HW_VLAN_TX | NETIF_F_RXCSUM;
4683 ndev->features = ndev->hw_features | 4683 ndev->features = ndev->hw_features |
4684 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; 4684 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
4685 ndev->vlan_features = ndev->hw_features;
4685 4686
4686 if (test_bit(QL_DMA64, &qdev->flags)) 4687 if (test_bit(QL_DMA64, &qdev->flags))
4687 ndev->features |= NETIF_F_HIGHDMA; 4688 ndev->features |= NETIF_F_HIGHDMA;
diff --git a/drivers/net/ethernet/seeq/seeq8005.c b/drivers/net/ethernet/seeq/seeq8005.c
index 698edbbfc149..d6e50de71186 100644
--- a/drivers/net/ethernet/seeq/seeq8005.c
+++ b/drivers/net/ethernet/seeq/seeq8005.c
@@ -736,9 +736,7 @@ MODULE_PARM_DESC(irq, "SEEQ 8005 IRQ number");
736int __init init_module(void) 736int __init init_module(void)
737{ 737{
738 dev_seeq = seeq8005_probe(-1); 738 dev_seeq = seeq8005_probe(-1);
739 if (IS_ERR(dev_seeq)) 739 return PTR_RET(dev_seeq);
740 return PTR_ERR(dev_seeq);
741 return 0;
742} 740}
743 741
744void __exit cleanup_module(void) 742void __exit cleanup_module(void)