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authorRafał Miłecki <zajec5@gmail.com>2013-09-14 18:22:47 -0400
committerDavid S. Miller <davem@davemloft.net>2013-09-16 21:30:59 -0400
commit6a391e7bf26c04a6df5f77290e1146941d210d49 (patch)
tree68e71e78a580c477d9c0187819d8a2f8d36456af /drivers/net/ethernet
parent7a3a62128388a6af771e99df8628ddee2e8be7ca (diff)
bgmac: fix internal switch initialization
Some devices (BCM4749, BCM5357, BCM53572) have internal switch that requires initialization. We already have code for this, but because of the typo in code it was never working. This resulted in network not working for some routers and possibility of soft-bricking them. Use correct bit for switch initialization and fix typo in the define. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.c2
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index eec0af45b859..1c6bc9678774 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -908,7 +908,7 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
908 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc; 908 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
909 u8 et_swtype = 0; 909 u8 et_swtype = 0;
910 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY | 910 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
911 BGMAC_CHIPCTL_1_IF_TYPE_RMII; 911 BGMAC_CHIPCTL_1_IF_TYPE_MII;
912 char buf[2]; 912 char buf[2];
913 913
914 if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) { 914 if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
diff --git a/drivers/net/ethernet/broadcom/bgmac.h b/drivers/net/ethernet/broadcom/bgmac.h
index 98d4b5fcc070..12a35cf9bb81 100644
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -333,7 +333,7 @@
333 333
334#define BGMAC_CHIPCTL_1_IF_TYPE_MASK 0x00000030 334#define BGMAC_CHIPCTL_1_IF_TYPE_MASK 0x00000030
335#define BGMAC_CHIPCTL_1_IF_TYPE_RMII 0x00000000 335#define BGMAC_CHIPCTL_1_IF_TYPE_RMII 0x00000000
336#define BGMAC_CHIPCTL_1_IF_TYPE_MI 0x00000010 336#define BGMAC_CHIPCTL_1_IF_TYPE_MII 0x00000010
337#define BGMAC_CHIPCTL_1_IF_TYPE_RGMII 0x00000020 337#define BGMAC_CHIPCTL_1_IF_TYPE_RGMII 0x00000020
338#define BGMAC_CHIPCTL_1_SW_TYPE_MASK 0x000000C0 338#define BGMAC_CHIPCTL_1_SW_TYPE_MASK 0x000000C0
339#define BGMAC_CHIPCTL_1_SW_TYPE_EPHY 0x00000000 339#define BGMAC_CHIPCTL_1_SW_TYPE_EPHY 0x00000000