diff options
author | John Fastabend <john.r.fastabend@intel.com> | 2011-09-26 23:51:56 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-10-06 06:23:11 -0400 |
commit | 32701dc2e616ca64e3d24b41c78671c4528671c1 (patch) | |
tree | 27911ab1fb1b2b99be48e8c77d9b5b38600e1497 /drivers/net/ethernet | |
parent | 2ad30e2633430717dbdf857962ba0c697dc471ef (diff) |
ixgbe: fixup hard dependencies on supporting 8 traffic classes
This patch correctly configures DCB when less than 8 traffic classes
are available in hardware.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c | 20 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c | 38 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 60 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 12 |
6 files changed, 101 insertions, 34 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c index 3d44b15fb286..318caf4bf623 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c | |||
@@ -231,6 +231,18 @@ void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction, | |||
231 | } | 231 | } |
232 | } | 232 | } |
233 | 233 | ||
234 | void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *cfg, int direction, u8 *map) | ||
235 | { | ||
236 | int i, up; | ||
237 | unsigned long bitmap; | ||
238 | |||
239 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | ||
240 | bitmap = cfg->tc_config[i].path[direction].up_to_tc_bitmap; | ||
241 | for_each_set_bit(up, &bitmap, MAX_USER_PRIORITY) | ||
242 | map[up] = i; | ||
243 | } | ||
244 | } | ||
245 | |||
234 | /** | 246 | /** |
235 | * ixgbe_dcb_hw_config - Config and enable DCB | 247 | * ixgbe_dcb_hw_config - Config and enable DCB |
236 | * @hw: pointer to hardware structure | 248 | * @hw: pointer to hardware structure |
@@ -245,10 +257,9 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, | |||
245 | u8 pfc_en; | 257 | u8 pfc_en; |
246 | u8 ptype[MAX_TRAFFIC_CLASS]; | 258 | u8 ptype[MAX_TRAFFIC_CLASS]; |
247 | u8 bwgid[MAX_TRAFFIC_CLASS]; | 259 | u8 bwgid[MAX_TRAFFIC_CLASS]; |
260 | u8 prio_tc[MAX_TRAFFIC_CLASS]; | ||
248 | u16 refill[MAX_TRAFFIC_CLASS]; | 261 | u16 refill[MAX_TRAFFIC_CLASS]; |
249 | u16 max[MAX_TRAFFIC_CLASS]; | 262 | u16 max[MAX_TRAFFIC_CLASS]; |
250 | /* CEE does not define a priority to tc mapping so map 1:1 */ | ||
251 | u8 prio_tc[MAX_TRAFFIC_CLASS] = {0, 1, 2, 3, 4, 5, 6, 7}; | ||
252 | 263 | ||
253 | /* Unpack CEE standard containers */ | 264 | /* Unpack CEE standard containers */ |
254 | ixgbe_dcb_unpack_pfc(dcb_config, &pfc_en); | 265 | ixgbe_dcb_unpack_pfc(dcb_config, &pfc_en); |
@@ -256,6 +267,7 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, | |||
256 | ixgbe_dcb_unpack_max(dcb_config, max); | 267 | ixgbe_dcb_unpack_max(dcb_config, max); |
257 | ixgbe_dcb_unpack_bwgid(dcb_config, DCB_TX_CONFIG, bwgid); | 268 | ixgbe_dcb_unpack_bwgid(dcb_config, DCB_TX_CONFIG, bwgid); |
258 | ixgbe_dcb_unpack_prio(dcb_config, DCB_TX_CONFIG, ptype); | 269 | ixgbe_dcb_unpack_prio(dcb_config, DCB_TX_CONFIG, ptype); |
270 | ixgbe_dcb_unpack_map(dcb_config, DCB_TX_CONFIG, prio_tc); | ||
259 | 271 | ||
260 | switch (hw->mac.type) { | 272 | switch (hw->mac.type) { |
261 | case ixgbe_mac_82598EB: | 273 | case ixgbe_mac_82598EB: |
@@ -274,7 +286,7 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, | |||
274 | } | 286 | } |
275 | 287 | ||
276 | /* Helper routines to abstract HW specifics from DCB netlink ops */ | 288 | /* Helper routines to abstract HW specifics from DCB netlink ops */ |
277 | s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en) | 289 | s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc) |
278 | { | 290 | { |
279 | int ret = -EINVAL; | 291 | int ret = -EINVAL; |
280 | 292 | ||
@@ -284,7 +296,7 @@ s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en) | |||
284 | break; | 296 | break; |
285 | case ixgbe_mac_82599EB: | 297 | case ixgbe_mac_82599EB: |
286 | case ixgbe_mac_X540: | 298 | case ixgbe_mac_X540: |
287 | ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en); | 299 | ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc); |
288 | break; | 300 | break; |
289 | default: | 301 | default: |
290 | break; | 302 | break; |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h index df095a9bbe2b..e162775064da 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h | |||
@@ -145,6 +145,7 @@ void ixgbe_dcb_unpack_refill(struct ixgbe_dcb_config *, int, u16 *); | |||
145 | void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *, u16 *); | 145 | void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *, u16 *); |
146 | void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *, int, u8 *); | 146 | void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *, int, u8 *); |
147 | void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *, int, u8 *); | 147 | void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *, int, u8 *); |
148 | void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *, int, u8 *); | ||
148 | 149 | ||
149 | /* DCB credits calculation */ | 150 | /* DCB credits calculation */ |
150 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *, | 151 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *, |
@@ -154,7 +155,7 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *, | |||
154 | s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max); | 155 | s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max); |
155 | s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, u16 *refill, u16 *max, | 156 | s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, u16 *refill, u16 *max, |
156 | u8 *bwg_id, u8 *prio_type, u8 *tc_prio); | 157 | u8 *bwg_id, u8 *prio_type, u8 *tc_prio); |
157 | s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en); | 158 | s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *tc_prio); |
158 | s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *); | 159 | s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *); |
159 | 160 | ||
160 | /* DCB definitions for credit calculation */ | 161 | /* DCB definitions for credit calculation */ |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c index 02f6724bf48e..45fe71030455 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c | |||
@@ -59,9 +59,9 @@ s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, | |||
59 | reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS; | 59 | reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS; |
60 | IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); | 60 | IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); |
61 | 61 | ||
62 | /* Map all traffic classes to their UP, 1 to 1 */ | 62 | /* Map all traffic classes to their UP */ |
63 | reg = 0; | 63 | reg = 0; |
64 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) | 64 | for (i = 0; i < MAX_USER_PRIORITY; i++) |
65 | reg |= (prio_tc[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT)); | 65 | reg |= (prio_tc[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT)); |
66 | IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); | 66 | IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); |
67 | 67 | ||
@@ -169,9 +169,9 @@ s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw, | |||
169 | IXGBE_RTTPCS_ARBDIS; | 169 | IXGBE_RTTPCS_ARBDIS; |
170 | IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); | 170 | IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); |
171 | 171 | ||
172 | /* Map all traffic classes to their UP, 1 to 1 */ | 172 | /* Map all traffic classes to their UP */ |
173 | reg = 0; | 173 | reg = 0; |
174 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) | 174 | for (i = 0; i < MAX_USER_PRIORITY; i++) |
175 | reg |= (prio_tc[i] << (i * IXGBE_RTTUP2TC_UP_SHIFT)); | 175 | reg |= (prio_tc[i] << (i * IXGBE_RTTUP2TC_UP_SHIFT)); |
176 | IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg); | 176 | IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg); |
177 | 177 | ||
@@ -205,16 +205,36 @@ s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw, | |||
205 | * ixgbe_dcb_config_pfc_82599 - Configure priority flow control | 205 | * ixgbe_dcb_config_pfc_82599 - Configure priority flow control |
206 | * @hw: pointer to hardware structure | 206 | * @hw: pointer to hardware structure |
207 | * @pfc_en: enabled pfc bitmask | 207 | * @pfc_en: enabled pfc bitmask |
208 | * @prio_tc: priority to tc assignments indexed by priority | ||
208 | * | 209 | * |
209 | * Configure Priority Flow Control (PFC) for each traffic class. | 210 | * Configure Priority Flow Control (PFC) for each traffic class. |
210 | */ | 211 | */ |
211 | s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en) | 212 | s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc) |
212 | { | 213 | { |
213 | u32 i, reg; | 214 | u32 i, j, reg; |
215 | u8 max_tc = 0; | ||
216 | |||
217 | for (i = 0; i < MAX_USER_PRIORITY; i++) | ||
218 | if (prio_tc[i] > max_tc) | ||
219 | max_tc = prio_tc[i]; | ||
214 | 220 | ||
215 | /* Configure PFC Tx thresholds per TC */ | 221 | /* Configure PFC Tx thresholds per TC */ |
216 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | 222 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
217 | int enabled = pfc_en & (1 << i); | 223 | int enabled = 0; |
224 | |||
225 | if (i > max_tc) { | ||
226 | reg = 0; | ||
227 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), reg); | ||
228 | IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg); | ||
229 | continue; | ||
230 | } | ||
231 | |||
232 | for (j = 0; j < MAX_USER_PRIORITY; j++) { | ||
233 | if ((prio_tc[j] == i) && (pfc_en & (1 << j))) { | ||
234 | enabled = 1; | ||
235 | break; | ||
236 | } | ||
237 | } | ||
218 | 238 | ||
219 | reg = hw->fc.low_water << 10; | 239 | reg = hw->fc.low_water << 10; |
220 | 240 | ||
@@ -251,7 +271,7 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en) | |||
251 | reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF; | 271 | reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF; |
252 | 272 | ||
253 | if (hw->mac.type == ixgbe_mac_X540) { | 273 | if (hw->mac.type == ixgbe_mac_X540) { |
254 | reg &= ~IXGBE_MFLCN_RPFCE_MASK; | 274 | reg &= ~(IXGBE_MFLCN_RPFCE_MASK | 0x10); |
255 | reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT; | 275 | reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT; |
256 | } | 276 | } |
257 | 277 | ||
@@ -338,7 +358,7 @@ s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *hw, u8 pfc_en, u16 *refill, | |||
338 | bwg_id, prio_type); | 358 | bwg_id, prio_type); |
339 | ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, | 359 | ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, |
340 | bwg_id, prio_type, prio_tc); | 360 | bwg_id, prio_type, prio_tc); |
341 | ixgbe_dcb_config_pfc_82599(hw, pfc_en); | 361 | ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc); |
342 | ixgbe_dcb_config_tc_stats_82599(hw); | 362 | ixgbe_dcb_config_tc_stats_82599(hw); |
343 | 363 | ||
344 | return 0; | 364 | return 0; |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h index 08d1749862a3..a59d5dc59d04 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h | |||
@@ -93,7 +93,7 @@ | |||
93 | /* DCB hardware-specific driver APIs */ | 93 | /* DCB hardware-specific driver APIs */ |
94 | 94 | ||
95 | /* DCB PFC functions */ | 95 | /* DCB PFC functions */ |
96 | s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en); | 96 | s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc); |
97 | 97 | ||
98 | /* DCB hw initialization */ | 98 | /* DCB hw initialization */ |
99 | s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, | 99 | s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c index 1d38955ca19d..be66bb679d5a 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | |||
@@ -123,7 +123,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) | |||
123 | return err; | 123 | return err; |
124 | 124 | ||
125 | if (state > 0) | 125 | if (state > 0) |
126 | err = ixgbe_setup_tc(netdev, MAX_TRAFFIC_CLASS); | 126 | err = ixgbe_setup_tc(netdev, adapter->dcb_cfg.num_tcs.pg_tcs); |
127 | else | 127 | else |
128 | err = ixgbe_setup_tc(netdev, 0); | 128 | err = ixgbe_setup_tc(netdev, 0); |
129 | 129 | ||
@@ -158,6 +158,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |||
158 | { | 158 | { |
159 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 159 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
160 | 160 | ||
161 | /* Abort a bad configuration */ | ||
162 | if (ffs(up_map) > adapter->dcb_cfg.num_tcs.pg_tcs) | ||
163 | return; | ||
164 | |||
161 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | 165 | if (prio != DCB_ATTR_VALUE_UNDEFINED) |
162 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; | 166 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; |
163 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | 167 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) |
@@ -178,6 +182,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |||
178 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != | 182 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != |
179 | adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) | 183 | adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) |
180 | adapter->dcb_set_bitmap |= BIT_PG_TX; | 184 | adapter->dcb_set_bitmap |= BIT_PG_TX; |
185 | |||
186 | if (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != | ||
187 | adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap) | ||
188 | adapter->dcb_set_bitmap |= BIT_PFC; | ||
181 | } | 189 | } |
182 | 190 | ||
183 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | 191 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, |
@@ -198,6 +206,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |||
198 | { | 206 | { |
199 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 207 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
200 | 208 | ||
209 | /* Abort bad configurations */ | ||
210 | if (ffs(up_map) > adapter->dcb_cfg.num_tcs.pg_tcs) | ||
211 | return; | ||
212 | |||
201 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | 213 | if (prio != DCB_ATTR_VALUE_UNDEFINED) |
202 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; | 214 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; |
203 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | 215 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) |
@@ -218,6 +230,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |||
218 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != | 230 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != |
219 | adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) | 231 | adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) |
220 | adapter->dcb_set_bitmap |= BIT_PG_RX; | 232 | adapter->dcb_set_bitmap |= BIT_PG_RX; |
233 | |||
234 | if (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != | ||
235 | adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap) | ||
236 | adapter->dcb_set_bitmap |= BIT_PFC; | ||
221 | } | 237 | } |
222 | 238 | ||
223 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | 239 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, |
@@ -296,7 +312,7 @@ static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, | |||
296 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | 312 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) |
297 | { | 313 | { |
298 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 314 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
299 | int ret; | 315 | int ret, i; |
300 | #ifdef IXGBE_FCOE | 316 | #ifdef IXGBE_FCOE |
301 | struct dcb_app app = { | 317 | struct dcb_app app = { |
302 | .selector = DCB_APP_IDTYPE_ETHTYPE, | 318 | .selector = DCB_APP_IDTYPE_ETHTYPE, |
@@ -370,18 +386,11 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | |||
370 | } | 386 | } |
371 | #endif | 387 | #endif |
372 | 388 | ||
373 | if (adapter->dcb_set_bitmap & BIT_PFC) { | ||
374 | u8 pfc_en; | ||
375 | ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en); | ||
376 | ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en); | ||
377 | ret = DCB_HW_CHG; | ||
378 | } | ||
379 | |||
380 | if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) { | 389 | if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) { |
381 | u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS]; | 390 | u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS]; |
382 | u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS]; | 391 | u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS]; |
383 | /* Priority to TC mapping in CEE case default to 1:1 */ | 392 | /* Priority to TC mapping in CEE case default to 1:1 */ |
384 | u8 prio_tc[MAX_TRAFFIC_CLASS] = {0, 1, 2, 3, 4, 5, 6, 7}; | 393 | u8 prio_tc[MAX_USER_PRIORITY]; |
385 | int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | 394 | int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
386 | 395 | ||
387 | #ifdef IXGBE_FCOE | 396 | #ifdef IXGBE_FCOE |
@@ -401,9 +410,25 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | |||
401 | DCB_TX_CONFIG, bwg_id); | 410 | DCB_TX_CONFIG, bwg_id); |
402 | ixgbe_dcb_unpack_prio(&adapter->dcb_cfg, | 411 | ixgbe_dcb_unpack_prio(&adapter->dcb_cfg, |
403 | DCB_TX_CONFIG, prio_type); | 412 | DCB_TX_CONFIG, prio_type); |
413 | ixgbe_dcb_unpack_map(&adapter->dcb_cfg, | ||
414 | DCB_TX_CONFIG, prio_tc); | ||
404 | 415 | ||
405 | ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max, | 416 | ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max, |
406 | bwg_id, prio_type, prio_tc); | 417 | bwg_id, prio_type, prio_tc); |
418 | |||
419 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) | ||
420 | netdev_set_prio_tc_map(netdev, i, prio_tc[i]); | ||
421 | } | ||
422 | |||
423 | if (adapter->dcb_set_bitmap & BIT_PFC) { | ||
424 | u8 pfc_en; | ||
425 | u8 prio_tc[MAX_USER_PRIORITY]; | ||
426 | |||
427 | ixgbe_dcb_unpack_map(&adapter->dcb_cfg, | ||
428 | DCB_TX_CONFIG, prio_tc); | ||
429 | ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en); | ||
430 | ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en, prio_tc); | ||
431 | ret = DCB_HW_CHG; | ||
407 | } | 432 | } |
408 | 433 | ||
409 | if (adapter->dcb_cfg.pfc_mode_enable) | 434 | if (adapter->dcb_cfg.pfc_mode_enable) |
@@ -460,10 +485,10 @@ static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) | |||
460 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 485 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
461 | switch (tcid) { | 486 | switch (tcid) { |
462 | case DCB_NUMTCS_ATTR_PG: | 487 | case DCB_NUMTCS_ATTR_PG: |
463 | *num = MAX_TRAFFIC_CLASS; | 488 | *num = adapter->dcb_cfg.num_tcs.pg_tcs; |
464 | break; | 489 | break; |
465 | case DCB_NUMTCS_ATTR_PFC: | 490 | case DCB_NUMTCS_ATTR_PFC: |
466 | *num = MAX_TRAFFIC_CLASS; | 491 | *num = adapter->dcb_cfg.num_tcs.pfc_tcs; |
467 | break; | 492 | break; |
468 | default: | 493 | default: |
469 | rval = -EINVAL; | 494 | rval = -EINVAL; |
@@ -532,7 +557,7 @@ static int ixgbe_dcbnl_ieee_getets(struct net_device *dev, | |||
532 | if (!my_ets) | 557 | if (!my_ets) |
533 | return -EINVAL; | 558 | return -EINVAL; |
534 | 559 | ||
535 | ets->ets_cap = MAX_TRAFFIC_CLASS; | 560 | ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs; |
536 | ets->cbs = my_ets->cbs; | 561 | ets->cbs = my_ets->cbs; |
537 | memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw)); | 562 | memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw)); |
538 | memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw)); | 563 | memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw)); |
@@ -569,6 +594,9 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev, | |||
569 | if (max_tc) | 594 | if (max_tc) |
570 | max_tc++; | 595 | max_tc++; |
571 | 596 | ||
597 | if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs) | ||
598 | return -EINVAL; | ||
599 | |||
572 | if (max_tc != netdev_get_num_tc(dev)) | 600 | if (max_tc != netdev_get_num_tc(dev)) |
573 | ixgbe_setup_tc(dev, max_tc); | 601 | ixgbe_setup_tc(dev, max_tc); |
574 | 602 | ||
@@ -589,7 +617,7 @@ static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev, | |||
589 | if (!my_pfc) | 617 | if (!my_pfc) |
590 | return -EINVAL; | 618 | return -EINVAL; |
591 | 619 | ||
592 | pfc->pfc_cap = MAX_TRAFFIC_CLASS; | 620 | pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs; |
593 | pfc->pfc_en = my_pfc->pfc_en; | 621 | pfc->pfc_en = my_pfc->pfc_en; |
594 | pfc->mbc = my_pfc->mbc; | 622 | pfc->mbc = my_pfc->mbc; |
595 | pfc->delay = my_pfc->delay; | 623 | pfc->delay = my_pfc->delay; |
@@ -606,6 +634,7 @@ static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev, | |||
606 | struct ieee_pfc *pfc) | 634 | struct ieee_pfc *pfc) |
607 | { | 635 | { |
608 | struct ixgbe_adapter *adapter = netdev_priv(dev); | 636 | struct ixgbe_adapter *adapter = netdev_priv(dev); |
637 | u8 *prio_tc; | ||
609 | 638 | ||
610 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) | 639 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) |
611 | return -EINVAL; | 640 | return -EINVAL; |
@@ -617,8 +646,9 @@ static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev, | |||
617 | return -ENOMEM; | 646 | return -ENOMEM; |
618 | } | 647 | } |
619 | 648 | ||
649 | prio_tc = adapter->ixgbe_ieee_ets->prio_tc; | ||
620 | memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc)); | 650 | memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc)); |
621 | return ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en); | 651 | return ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en, prio_tc); |
622 | } | 652 | } |
623 | 653 | ||
624 | #ifdef IXGBE_FCOE | 654 | #ifdef IXGBE_FCOE |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 757e98e42c2c..2b8ff9557c4c 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | |||
@@ -3363,8 +3363,10 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) | |||
3363 | 3363 | ||
3364 | if (adapter->ixgbe_ieee_pfc) { | 3364 | if (adapter->ixgbe_ieee_pfc) { |
3365 | struct ieee_pfc *pfc = adapter->ixgbe_ieee_pfc; | 3365 | struct ieee_pfc *pfc = adapter->ixgbe_ieee_pfc; |
3366 | u8 *prio_tc = adapter->ixgbe_ieee_ets->prio_tc; | ||
3366 | 3367 | ||
3367 | ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en); | 3368 | ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en, |
3369 | prio_tc); | ||
3368 | } | 3370 | } |
3369 | } | 3371 | } |
3370 | 3372 | ||
@@ -4241,7 +4243,6 @@ static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) | |||
4241 | q = min((int)num_online_cpus(), per_tc_q); | 4243 | q = min((int)num_online_cpus(), per_tc_q); |
4242 | 4244 | ||
4243 | for (i = 0; i < tcs; i++) { | 4245 | for (i = 0; i < tcs; i++) { |
4244 | netdev_set_prio_tc_map(dev, i, i); | ||
4245 | netdev_set_tc_queue(dev, i, q, offset); | 4246 | netdev_set_tc_queue(dev, i, q, offset); |
4246 | offset += q; | 4247 | offset += q; |
4247 | } | 4248 | } |
@@ -4994,8 +4995,10 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) | |||
4994 | tc = &adapter->dcb_cfg.tc_config[j]; | 4995 | tc = &adapter->dcb_cfg.tc_config[j]; |
4995 | tc->path[DCB_TX_CONFIG].bwg_id = 0; | 4996 | tc->path[DCB_TX_CONFIG].bwg_id = 0; |
4996 | tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1); | 4997 | tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1); |
4998 | tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 1 << j; | ||
4997 | tc->path[DCB_RX_CONFIG].bwg_id = 0; | 4999 | tc->path[DCB_RX_CONFIG].bwg_id = 0; |
4998 | tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1); | 5000 | tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1); |
5001 | tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 1 << j; | ||
4999 | tc->dcb_pfc = pfc_disabled; | 5002 | tc->dcb_pfc = pfc_disabled; |
5000 | } | 5003 | } |
5001 | adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100; | 5004 | adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100; |
@@ -6704,12 +6707,13 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, | |||
6704 | tx_flags |= IXGBE_TX_FLAGS_SW_VLAN; | 6707 | tx_flags |= IXGBE_TX_FLAGS_SW_VLAN; |
6705 | } | 6708 | } |
6706 | 6709 | ||
6710 | /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */ | ||
6707 | if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && | 6711 | if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && |
6708 | ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) || | 6712 | ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) || |
6709 | (skb->priority != TC_PRIO_CONTROL))) { | 6713 | (skb->priority != TC_PRIO_CONTROL))) { |
6710 | tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK; | 6714 | tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK; |
6711 | tx_flags |= tx_ring->dcb_tc << | 6715 | tx_flags |= (skb->priority & 0x7) << |
6712 | IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; | 6716 | IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; |
6713 | if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) { | 6717 | if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) { |
6714 | struct vlan_ethhdr *vhdr; | 6718 | struct vlan_ethhdr *vhdr; |
6715 | if (skb_header_cloned(skb) && | 6719 | if (skb_header_cloned(skb) && |