diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2012-04-12 20:08:31 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2012-04-14 05:05:00 -0400 |
commit | 04499ec4ee945dfad9f0afbdd8d6f8ba12dac6d6 (patch) | |
tree | 15d4cd43517c8afb20b777607830ca1093341b95 /drivers/net/ethernet | |
parent | 6ad651456e3c8f3ea77056bc05c85e46ab8ead5a (diff) |
e1000e: cleanup boolean logic
Replace occurrences of 'if (<bool expr> == <1|0>)' with
'if ([!]<bool expr>)'
Replace occurrences of '<bool var> = (<non-bool expr>) ? true : false'
with '<bool var> = <non-bool expr>'.
Replace occurrence of '<bool var> = <non-bool expr>' with
'<bool var> = !!<non-bool expr>'
While the latter replacement is not really necessary, it is done here for
consistency and clarity. No functional changes.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/80003es2lan.c | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/82571.c | 9 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.c | 26 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/mac.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/manage.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/phy.c | 23 |
6 files changed, 31 insertions, 35 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c index bac9dda31b6c..fbc84d415762 100644 --- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c +++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c | |||
@@ -228,9 +228,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw) | |||
228 | /* FWSM register */ | 228 | /* FWSM register */ |
229 | mac->has_fwsm = true; | 229 | mac->has_fwsm = true; |
230 | /* ARC supported; valid only if manageability features are enabled. */ | 230 | /* ARC supported; valid only if manageability features are enabled. */ |
231 | mac->arc_subsystem_valid = | 231 | mac->arc_subsystem_valid = !!(er32(FWSM) & E1000_FWSM_MODE_MASK); |
232 | (er32(FWSM) & E1000_FWSM_MODE_MASK) | ||
233 | ? true : false; | ||
234 | /* Adaptive IFS not supported */ | 232 | /* Adaptive IFS not supported */ |
235 | mac->adaptive_ifs = false; | 233 | mac->adaptive_ifs = false; |
236 | 234 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c index b3fdc6977f2e..609c18cb300a 100644 --- a/drivers/net/ethernet/intel/e1000e/82571.c +++ b/drivers/net/ethernet/intel/e1000e/82571.c | |||
@@ -295,9 +295,8 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) | |||
295 | * ARC supported; valid only if manageability features are | 295 | * ARC supported; valid only if manageability features are |
296 | * enabled. | 296 | * enabled. |
297 | */ | 297 | */ |
298 | mac->arc_subsystem_valid = | 298 | mac->arc_subsystem_valid = !!(er32(FWSM) & |
299 | (er32(FWSM) & E1000_FWSM_MODE_MASK) | 299 | E1000_FWSM_MODE_MASK); |
300 | ? true : false; | ||
301 | break; | 300 | break; |
302 | case e1000_82574: | 301 | case e1000_82574: |
303 | case e1000_82583: | 302 | case e1000_82583: |
@@ -798,7 +797,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw) | |||
798 | /* Check for pending operations. */ | 797 | /* Check for pending operations. */ |
799 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { | 798 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { |
800 | usleep_range(1000, 2000); | 799 | usleep_range(1000, 2000); |
801 | if ((er32(EECD) & E1000_EECD_FLUPD) == 0) | 800 | if (!(er32(EECD) & E1000_EECD_FLUPD)) |
802 | break; | 801 | break; |
803 | } | 802 | } |
804 | 803 | ||
@@ -822,7 +821,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw) | |||
822 | 821 | ||
823 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { | 822 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { |
824 | usleep_range(1000, 2000); | 823 | usleep_range(1000, 2000); |
825 | if ((er32(EECD) & E1000_EECD_FLUPD) == 0) | 824 | if (!(er32(EECD) & E1000_EECD_FLUPD)) |
826 | break; | 825 | break; |
827 | } | 826 | } |
828 | 827 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 64c76443a7aa..0f158a95d94f 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -2212,7 +2212,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) | |||
2212 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2212 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2213 | 2213 | ||
2214 | /* Check if the flash descriptor is valid */ | 2214 | /* Check if the flash descriptor is valid */ |
2215 | if (hsfsts.hsf_status.fldesvalid == 0) { | 2215 | if (!hsfsts.hsf_status.fldesvalid) { |
2216 | e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n"); | 2216 | e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n"); |
2217 | return -E1000_ERR_NVM; | 2217 | return -E1000_ERR_NVM; |
2218 | } | 2218 | } |
@@ -2232,7 +2232,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) | |||
2232 | * completed. | 2232 | * completed. |
2233 | */ | 2233 | */ |
2234 | 2234 | ||
2235 | if (hsfsts.hsf_status.flcinprog == 0) { | 2235 | if (!hsfsts.hsf_status.flcinprog) { |
2236 | /* | 2236 | /* |
2237 | * There is no cycle running at present, | 2237 | * There is no cycle running at present, |
2238 | * so we can start a cycle. | 2238 | * so we can start a cycle. |
@@ -2250,7 +2250,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) | |||
2250 | */ | 2250 | */ |
2251 | for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) { | 2251 | for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) { |
2252 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2252 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2253 | if (hsfsts.hsf_status.flcinprog == 0) { | 2253 | if (!hsfsts.hsf_status.flcinprog) { |
2254 | ret_val = 0; | 2254 | ret_val = 0; |
2255 | break; | 2255 | break; |
2256 | } | 2256 | } |
@@ -2292,12 +2292,12 @@ static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout) | |||
2292 | /* wait till FDONE bit is set to 1 */ | 2292 | /* wait till FDONE bit is set to 1 */ |
2293 | do { | 2293 | do { |
2294 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2294 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2295 | if (hsfsts.hsf_status.flcdone == 1) | 2295 | if (hsfsts.hsf_status.flcdone) |
2296 | break; | 2296 | break; |
2297 | udelay(1); | 2297 | udelay(1); |
2298 | } while (i++ < timeout); | 2298 | } while (i++ < timeout); |
2299 | 2299 | ||
2300 | if (hsfsts.hsf_status.flcdone == 1 && hsfsts.hsf_status.flcerr == 0) | 2300 | if (hsfsts.hsf_status.flcdone && !hsfsts.hsf_status.flcerr) |
2301 | return 0; | 2301 | return 0; |
2302 | 2302 | ||
2303 | return -E1000_ERR_NVM; | 2303 | return -E1000_ERR_NVM; |
@@ -2408,10 +2408,10 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, | |||
2408 | * ICH_FLASH_CYCLE_REPEAT_COUNT times. | 2408 | * ICH_FLASH_CYCLE_REPEAT_COUNT times. |
2409 | */ | 2409 | */ |
2410 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2410 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2411 | if (hsfsts.hsf_status.flcerr == 1) { | 2411 | if (hsfsts.hsf_status.flcerr) { |
2412 | /* Repeat for some time before giving up. */ | 2412 | /* Repeat for some time before giving up. */ |
2413 | continue; | 2413 | continue; |
2414 | } else if (hsfsts.hsf_status.flcdone == 0) { | 2414 | } else if (!hsfsts.hsf_status.flcdone) { |
2415 | e_dbg("Timeout error - flash cycle did not complete.\n"); | 2415 | e_dbg("Timeout error - flash cycle did not complete.\n"); |
2416 | break; | 2416 | break; |
2417 | } | 2417 | } |
@@ -2641,7 +2641,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
2641 | if (ret_val) | 2641 | if (ret_val) |
2642 | return ret_val; | 2642 | return ret_val; |
2643 | 2643 | ||
2644 | if ((data & 0x40) == 0) { | 2644 | if (!(data & 0x40)) { |
2645 | data |= 0x40; | 2645 | data |= 0x40; |
2646 | ret_val = e1000_write_nvm(hw, 0x19, 1, &data); | 2646 | ret_val = e1000_write_nvm(hw, 0x19, 1, &data); |
2647 | if (ret_val) | 2647 | if (ret_val) |
@@ -2759,10 +2759,10 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, | |||
2759 | * try...ICH_FLASH_CYCLE_REPEAT_COUNT times. | 2759 | * try...ICH_FLASH_CYCLE_REPEAT_COUNT times. |
2760 | */ | 2760 | */ |
2761 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2761 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2762 | if (hsfsts.hsf_status.flcerr == 1) | 2762 | if (hsfsts.hsf_status.flcerr) |
2763 | /* Repeat for some time before giving up. */ | 2763 | /* Repeat for some time before giving up. */ |
2764 | continue; | 2764 | continue; |
2765 | if (hsfsts.hsf_status.flcdone == 0) { | 2765 | if (!hsfsts.hsf_status.flcdone) { |
2766 | e_dbg("Timeout error - flash cycle did not complete.\n"); | 2766 | e_dbg("Timeout error - flash cycle did not complete.\n"); |
2767 | break; | 2767 | break; |
2768 | } | 2768 | } |
@@ -2914,10 +2914,10 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank) | |||
2914 | * a few more times else Done | 2914 | * a few more times else Done |
2915 | */ | 2915 | */ |
2916 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2916 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2917 | if (hsfsts.hsf_status.flcerr == 1) | 2917 | if (hsfsts.hsf_status.flcerr) |
2918 | /* repeat for some time before giving up */ | 2918 | /* repeat for some time before giving up */ |
2919 | continue; | 2919 | continue; |
2920 | else if (hsfsts.hsf_status.flcdone == 0) | 2920 | else if (!hsfsts.hsf_status.flcdone) |
2921 | return ret_val; | 2921 | return ret_val; |
2922 | } while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT); | 2922 | } while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT); |
2923 | } | 2923 | } |
@@ -3916,7 +3916,7 @@ static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw) | |||
3916 | 3916 | ||
3917 | /* If EEPROM is not marked present, init the IGP 3 PHY manually */ | 3917 | /* If EEPROM is not marked present, init the IGP 3 PHY manually */ |
3918 | if (hw->mac.type <= e1000_ich9lan) { | 3918 | if (hw->mac.type <= e1000_ich9lan) { |
3919 | if (((er32(EECD) & E1000_EECD_PRES) == 0) && | 3919 | if (!(er32(EECD) & E1000_EECD_PRES) && |
3920 | (hw->phy.type == e1000_phy_igp_3)) { | 3920 | (hw->phy.type == e1000_phy_igp_3)) { |
3921 | e1000e_phy_init_script_igp3(hw); | 3921 | e1000e_phy_init_script_igp3(hw); |
3922 | } | 3922 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c index decad98c1059..d8327499305f 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.c +++ b/drivers/net/ethernet/intel/e1000e/mac.c | |||
@@ -681,7 +681,7 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) | |||
681 | return ret_val; | 681 | return ret_val; |
682 | } | 682 | } |
683 | 683 | ||
684 | if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0) | 684 | if (!(nvm_data & NVM_WORD0F_PAUSE_MASK)) |
685 | hw->fc.requested_mode = e1000_fc_none; | 685 | hw->fc.requested_mode = e1000_fc_none; |
686 | else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR) | 686 | else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR) |
687 | hw->fc.requested_mode = e1000_fc_tx_pause; | 687 | hw->fc.requested_mode = e1000_fc_tx_pause; |
diff --git a/drivers/net/ethernet/intel/e1000e/manage.c b/drivers/net/ethernet/intel/e1000e/manage.c index 473f8e711510..bacc950fc684 100644 --- a/drivers/net/ethernet/intel/e1000e/manage.c +++ b/drivers/net/ethernet/intel/e1000e/manage.c | |||
@@ -85,7 +85,7 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw) | |||
85 | 85 | ||
86 | /* Check that the host interface is enabled. */ | 86 | /* Check that the host interface is enabled. */ |
87 | hicr = er32(HICR); | 87 | hicr = er32(HICR); |
88 | if ((hicr & E1000_HICR_EN) == 0) { | 88 | if (!(hicr & E1000_HICR_EN)) { |
89 | e_dbg("E1000_HOST_EN bit disabled.\n"); | 89 | e_dbg("E1000_HOST_EN bit disabled.\n"); |
90 | return -E1000_ERR_HOST_INTERFACE_COMMAND; | 90 | return -E1000_ERR_HOST_INTERFACE_COMMAND; |
91 | } | 91 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c index 35b45578c604..bd5ef64b3003 100644 --- a/drivers/net/ethernet/intel/e1000e/phy.c +++ b/drivers/net/ethernet/intel/e1000e/phy.c | |||
@@ -718,7 +718,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw) | |||
718 | * 1 - Enabled | 718 | * 1 - Enabled |
719 | */ | 719 | */ |
720 | phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; | 720 | phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; |
721 | if (phy->disable_polarity_correction == 1) | 721 | if (phy->disable_polarity_correction) |
722 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; | 722 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; |
723 | 723 | ||
724 | /* Enable downshift on BM (disabled by default) */ | 724 | /* Enable downshift on BM (disabled by default) */ |
@@ -1090,7 +1090,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1090 | * If autoneg_advertised is zero, we assume it was not defaulted | 1090 | * If autoneg_advertised is zero, we assume it was not defaulted |
1091 | * by the calling code so we set to advertise full capability. | 1091 | * by the calling code so we set to advertise full capability. |
1092 | */ | 1092 | */ |
1093 | if (phy->autoneg_advertised == 0) | 1093 | if (!phy->autoneg_advertised) |
1094 | phy->autoneg_advertised = phy->autoneg_mask; | 1094 | phy->autoneg_advertised = phy->autoneg_mask; |
1095 | 1095 | ||
1096 | e_dbg("Reconfiguring auto-neg advertisement params\n"); | 1096 | e_dbg("Reconfiguring auto-neg advertisement params\n"); |
@@ -1596,7 +1596,7 @@ s32 e1000e_check_downshift(struct e1000_hw *hw) | |||
1596 | ret_val = e1e_rphy(hw, offset, &phy_data); | 1596 | ret_val = e1e_rphy(hw, offset, &phy_data); |
1597 | 1597 | ||
1598 | if (!ret_val) | 1598 | if (!ret_val) |
1599 | phy->speed_downgraded = (phy_data & mask); | 1599 | phy->speed_downgraded = !!(phy_data & mask); |
1600 | 1600 | ||
1601 | return ret_val; | 1601 | return ret_val; |
1602 | } | 1602 | } |
@@ -1925,8 +1925,8 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw) | |||
1925 | if (ret_val) | 1925 | if (ret_val) |
1926 | return ret_val; | 1926 | return ret_val; |
1927 | 1927 | ||
1928 | phy->polarity_correction = (phy_data & | 1928 | phy->polarity_correction = !!(phy_data & |
1929 | M88E1000_PSCR_POLARITY_REVERSAL); | 1929 | M88E1000_PSCR_POLARITY_REVERSAL); |
1930 | 1930 | ||
1931 | ret_val = e1000_check_polarity_m88(hw); | 1931 | ret_val = e1000_check_polarity_m88(hw); |
1932 | if (ret_val) | 1932 | if (ret_val) |
@@ -1936,7 +1936,7 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw) | |||
1936 | if (ret_val) | 1936 | if (ret_val) |
1937 | return ret_val; | 1937 | return ret_val; |
1938 | 1938 | ||
1939 | phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX); | 1939 | phy->is_mdix = !!(phy_data & M88E1000_PSSR_MDIX); |
1940 | 1940 | ||
1941 | if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { | 1941 | if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { |
1942 | ret_val = e1000_get_cable_length(hw); | 1942 | ret_val = e1000_get_cable_length(hw); |
@@ -1999,7 +1999,7 @@ s32 e1000e_get_phy_info_igp(struct e1000_hw *hw) | |||
1999 | if (ret_val) | 1999 | if (ret_val) |
2000 | return ret_val; | 2000 | return ret_val; |
2001 | 2001 | ||
2002 | phy->is_mdix = (data & IGP01E1000_PSSR_MDIX); | 2002 | phy->is_mdix = !!(data & IGP01E1000_PSSR_MDIX); |
2003 | 2003 | ||
2004 | if ((data & IGP01E1000_PSSR_SPEED_MASK) == | 2004 | if ((data & IGP01E1000_PSSR_SPEED_MASK) == |
2005 | IGP01E1000_PSSR_SPEED_1000MBPS) { | 2005 | IGP01E1000_PSSR_SPEED_1000MBPS) { |
@@ -2052,8 +2052,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw) | |||
2052 | ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data); | 2052 | ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data); |
2053 | if (ret_val) | 2053 | if (ret_val) |
2054 | return ret_val; | 2054 | return ret_val; |
2055 | phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE) | 2055 | phy->polarity_correction = !(data & IFE_PSC_AUTO_POLARITY_DISABLE); |
2056 | ? false : true; | ||
2057 | 2056 | ||
2058 | if (phy->polarity_correction) { | 2057 | if (phy->polarity_correction) { |
2059 | ret_val = e1000_check_polarity_ife(hw); | 2058 | ret_val = e1000_check_polarity_ife(hw); |
@@ -2070,7 +2069,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw) | |||
2070 | if (ret_val) | 2069 | if (ret_val) |
2071 | return ret_val; | 2070 | return ret_val; |
2072 | 2071 | ||
2073 | phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? true : false; | 2072 | phy->is_mdix = !!(data & IFE_PMC_MDIX_STATUS); |
2074 | 2073 | ||
2075 | /* The following parameters are undefined for 10/100 operation. */ | 2074 | /* The following parameters are undefined for 10/100 operation. */ |
2076 | phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; | 2075 | phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; |
@@ -2979,7 +2978,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, | |||
2979 | if ((hw->phy.type == e1000_phy_82578) && | 2978 | if ((hw->phy.type == e1000_phy_82578) && |
2980 | (hw->phy.revision >= 1) && | 2979 | (hw->phy.revision >= 1) && |
2981 | (hw->phy.addr == 2) && | 2980 | (hw->phy.addr == 2) && |
2982 | ((MAX_PHY_REG_ADDRESS & reg) == 0) && (data & (1 << 11))) { | 2981 | !(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) { |
2983 | u16 data2 = 0x7EFF; | 2982 | u16 data2 = 0x7EFF; |
2984 | ret_val = e1000_access_phy_debug_regs_hv(hw, | 2983 | ret_val = e1000_access_phy_debug_regs_hv(hw, |
2985 | (1 << 6) | 0x3, | 2984 | (1 << 6) | 0x3, |
@@ -3265,7 +3264,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw) | |||
3265 | if (ret_val) | 3264 | if (ret_val) |
3266 | return ret_val; | 3265 | return ret_val; |
3267 | 3266 | ||
3268 | phy->is_mdix = (data & I82577_PHY_STATUS2_MDIX) ? true : false; | 3267 | phy->is_mdix = !!(data & I82577_PHY_STATUS2_MDIX); |
3269 | 3268 | ||
3270 | if ((data & I82577_PHY_STATUS2_SPEED_MASK) == | 3269 | if ((data & I82577_PHY_STATUS2_SPEED_MASK) == |
3271 | I82577_PHY_STATUS2_SPEED_1000MBPS) { | 3270 | I82577_PHY_STATUS2_SPEED_1000MBPS) { |