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authorOlof Johansson <olof@lixom.net>2013-02-09 19:41:37 -0500
committerOlof Johansson <olof@lixom.net>2013-02-09 19:41:37 -0500
commit94c16ea6ea75f8f5de92d10a647155ccf0d05436 (patch)
tree012d247bf686e1c49ef3ad0048b94de4970c066b /drivers/net/ethernet
parentcf55f672c325f234d96911571a775b2e7d9cf284 (diff)
parent88b62b915b0b7e25870eb0604ed9a92ba4bfc9f7 (diff)
Merge tag 'v3.8-rc6' into next/cleanup
Linux 3.8-rc6
Diffstat (limited to 'drivers/net/ethernet')
-rw-r--r--drivers/net/ethernet/3com/3c574_cs.c2
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c62
-rw-r--r--drivers/net/ethernet/calxeda/xgmac.c4
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c17
-rw-r--r--drivers/net/ethernet/intel/ixgbe/Makefile3
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c5
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c4
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_tx.c13
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c11
-rw-r--r--drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c2
-rw-r--r--drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c2
-rw-r--r--drivers/net/ethernet/realtek/r8169.c21
12 files changed, 82 insertions, 64 deletions
diff --git a/drivers/net/ethernet/3com/3c574_cs.c b/drivers/net/ethernet/3com/3c574_cs.c
index 66df93638085..ffd8de28a76a 100644
--- a/drivers/net/ethernet/3com/3c574_cs.c
+++ b/drivers/net/ethernet/3com/3c574_cs.c
@@ -432,7 +432,7 @@ static int tc574_config(struct pcmcia_device *link)
432 netdev_info(dev, "%s at io %#3lx, irq %d, hw_addr %pM\n", 432 netdev_info(dev, "%s at io %#3lx, irq %d, hw_addr %pM\n",
433 cardname, dev->base_addr, dev->irq, dev->dev_addr); 433 cardname, dev->base_addr, dev->irq, dev->dev_addr);
434 netdev_info(dev, " %dK FIFO split %s Rx:Tx, %sMII interface.\n", 434 netdev_info(dev, " %dK FIFO split %s Rx:Tx, %sMII interface.\n",
435 8 << config & Ram_size, 435 8 << (config & Ram_size),
436 ram_split[(config & Ram_split) >> Ram_split_shift], 436 ram_split[(config & Ram_split) >> Ram_split_shift],
437 config & Autoselect ? "autoselect " : ""); 437 config & Autoselect ? "autoselect " : "");
438 438
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 78ea90c40e19..bdb086934cd9 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -1283,14 +1283,26 @@ static int tg3_phy_auxctl_write(struct tg3 *tp, int reg, u32 set)
1283 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); 1283 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg);
1284} 1284}
1285 1285
1286#define TG3_PHY_AUXCTL_SMDSP_ENABLE(tp) \ 1286static int tg3_phy_toggle_auxctl_smdsp(struct tg3 *tp, bool enable)
1287 tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL, \ 1287{
1288 MII_TG3_AUXCTL_ACTL_SMDSP_ENA | \ 1288 u32 val;
1289 MII_TG3_AUXCTL_ACTL_TX_6DB) 1289 int err;
1290 1290
1291#define TG3_PHY_AUXCTL_SMDSP_DISABLE(tp) \ 1291 err = tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, &val);
1292 tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL, \ 1292
1293 MII_TG3_AUXCTL_ACTL_TX_6DB); 1293 if (err)
1294 return err;
1295 if (enable)
1296
1297 val |= MII_TG3_AUXCTL_ACTL_SMDSP_ENA;
1298 else
1299 val &= ~MII_TG3_AUXCTL_ACTL_SMDSP_ENA;
1300
1301 err = tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL,
1302 val | MII_TG3_AUXCTL_ACTL_TX_6DB);
1303
1304 return err;
1305}
1294 1306
1295static int tg3_bmcr_reset(struct tg3 *tp) 1307static int tg3_bmcr_reset(struct tg3 *tp)
1296{ 1308{
@@ -2223,7 +2235,7 @@ static void tg3_phy_apply_otp(struct tg3 *tp)
2223 2235
2224 otp = tp->phy_otp; 2236 otp = tp->phy_otp;
2225 2237
2226 if (TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) 2238 if (tg3_phy_toggle_auxctl_smdsp(tp, true))
2227 return; 2239 return;
2228 2240
2229 phy = ((otp & TG3_OTP_AGCTGT_MASK) >> TG3_OTP_AGCTGT_SHIFT); 2241 phy = ((otp & TG3_OTP_AGCTGT_MASK) >> TG3_OTP_AGCTGT_SHIFT);
@@ -2248,7 +2260,7 @@ static void tg3_phy_apply_otp(struct tg3 *tp)
2248 ((otp & TG3_OTP_RCOFF_MASK) >> TG3_OTP_RCOFF_SHIFT); 2260 ((otp & TG3_OTP_RCOFF_MASK) >> TG3_OTP_RCOFF_SHIFT);
2249 tg3_phydsp_write(tp, MII_TG3_DSP_EXP97, phy); 2261 tg3_phydsp_write(tp, MII_TG3_DSP_EXP97, phy);
2250 2262
2251 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2263 tg3_phy_toggle_auxctl_smdsp(tp, false);
2252} 2264}
2253 2265
2254static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up) 2266static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up)
@@ -2284,9 +2296,9 @@ static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up)
2284 2296
2285 if (!tp->setlpicnt) { 2297 if (!tp->setlpicnt) {
2286 if (current_link_up == 1 && 2298 if (current_link_up == 1 &&
2287 !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) { 2299 !tg3_phy_toggle_auxctl_smdsp(tp, true)) {
2288 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000); 2300 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000);
2289 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2301 tg3_phy_toggle_auxctl_smdsp(tp, false);
2290 } 2302 }
2291 2303
2292 val = tr32(TG3_CPMU_EEE_MODE); 2304 val = tr32(TG3_CPMU_EEE_MODE);
@@ -2302,11 +2314,11 @@ static void tg3_phy_eee_enable(struct tg3 *tp)
2302 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 2314 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
2303 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || 2315 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
2304 tg3_flag(tp, 57765_CLASS)) && 2316 tg3_flag(tp, 57765_CLASS)) &&
2305 !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) { 2317 !tg3_phy_toggle_auxctl_smdsp(tp, true)) {
2306 val = MII_TG3_DSP_TAP26_ALNOKO | 2318 val = MII_TG3_DSP_TAP26_ALNOKO |
2307 MII_TG3_DSP_TAP26_RMRXSTO; 2319 MII_TG3_DSP_TAP26_RMRXSTO;
2308 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val); 2320 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
2309 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2321 tg3_phy_toggle_auxctl_smdsp(tp, false);
2310 } 2322 }
2311 2323
2312 val = tr32(TG3_CPMU_EEE_MODE); 2324 val = tr32(TG3_CPMU_EEE_MODE);
@@ -2450,7 +2462,7 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
2450 tg3_writephy(tp, MII_CTRL1000, 2462 tg3_writephy(tp, MII_CTRL1000,
2451 CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER); 2463 CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER);
2452 2464
2453 err = TG3_PHY_AUXCTL_SMDSP_ENABLE(tp); 2465 err = tg3_phy_toggle_auxctl_smdsp(tp, true);
2454 if (err) 2466 if (err)
2455 return err; 2467 return err;
2456 2468
@@ -2471,7 +2483,7 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
2471 tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200); 2483 tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
2472 tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0000); 2484 tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0000);
2473 2485
2474 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2486 tg3_phy_toggle_auxctl_smdsp(tp, false);
2475 2487
2476 tg3_writephy(tp, MII_CTRL1000, phy9_orig); 2488 tg3_writephy(tp, MII_CTRL1000, phy9_orig);
2477 2489
@@ -2572,10 +2584,10 @@ static int tg3_phy_reset(struct tg3 *tp)
2572 2584
2573out: 2585out:
2574 if ((tp->phy_flags & TG3_PHYFLG_ADC_BUG) && 2586 if ((tp->phy_flags & TG3_PHYFLG_ADC_BUG) &&
2575 !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) { 2587 !tg3_phy_toggle_auxctl_smdsp(tp, true)) {
2576 tg3_phydsp_write(tp, 0x201f, 0x2aaa); 2588 tg3_phydsp_write(tp, 0x201f, 0x2aaa);
2577 tg3_phydsp_write(tp, 0x000a, 0x0323); 2589 tg3_phydsp_write(tp, 0x000a, 0x0323);
2578 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2590 tg3_phy_toggle_auxctl_smdsp(tp, false);
2579 } 2591 }
2580 2592
2581 if (tp->phy_flags & TG3_PHYFLG_5704_A0_BUG) { 2593 if (tp->phy_flags & TG3_PHYFLG_5704_A0_BUG) {
@@ -2584,14 +2596,14 @@ out:
2584 } 2596 }
2585 2597
2586 if (tp->phy_flags & TG3_PHYFLG_BER_BUG) { 2598 if (tp->phy_flags & TG3_PHYFLG_BER_BUG) {
2587 if (!TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) { 2599 if (!tg3_phy_toggle_auxctl_smdsp(tp, true)) {
2588 tg3_phydsp_write(tp, 0x000a, 0x310b); 2600 tg3_phydsp_write(tp, 0x000a, 0x310b);
2589 tg3_phydsp_write(tp, 0x201f, 0x9506); 2601 tg3_phydsp_write(tp, 0x201f, 0x9506);
2590 tg3_phydsp_write(tp, 0x401f, 0x14e2); 2602 tg3_phydsp_write(tp, 0x401f, 0x14e2);
2591 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2603 tg3_phy_toggle_auxctl_smdsp(tp, false);
2592 } 2604 }
2593 } else if (tp->phy_flags & TG3_PHYFLG_JITTER_BUG) { 2605 } else if (tp->phy_flags & TG3_PHYFLG_JITTER_BUG) {
2594 if (!TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) { 2606 if (!tg3_phy_toggle_auxctl_smdsp(tp, true)) {
2595 tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a); 2607 tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
2596 if (tp->phy_flags & TG3_PHYFLG_ADJUST_TRIM) { 2608 if (tp->phy_flags & TG3_PHYFLG_ADJUST_TRIM) {
2597 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b); 2609 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b);
@@ -2600,7 +2612,7 @@ out:
2600 } else 2612 } else
2601 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b); 2613 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b);
2602 2614
2603 TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 2615 tg3_phy_toggle_auxctl_smdsp(tp, false);
2604 } 2616 }
2605 } 2617 }
2606 2618
@@ -4009,7 +4021,7 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl)
4009 tw32(TG3_CPMU_EEE_MODE, 4021 tw32(TG3_CPMU_EEE_MODE,
4010 tr32(TG3_CPMU_EEE_MODE) & ~TG3_CPMU_EEEMD_LPI_ENABLE); 4022 tr32(TG3_CPMU_EEE_MODE) & ~TG3_CPMU_EEEMD_LPI_ENABLE);
4011 4023
4012 err = TG3_PHY_AUXCTL_SMDSP_ENABLE(tp); 4024 err = tg3_phy_toggle_auxctl_smdsp(tp, true);
4013 if (!err) { 4025 if (!err) {
4014 u32 err2; 4026 u32 err2;
4015 4027
@@ -4042,7 +4054,7 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl)
4042 MII_TG3_DSP_CH34TP2_HIBW01); 4054 MII_TG3_DSP_CH34TP2_HIBW01);
4043 } 4055 }
4044 4056
4045 err2 = TG3_PHY_AUXCTL_SMDSP_DISABLE(tp); 4057 err2 = tg3_phy_toggle_auxctl_smdsp(tp, false);
4046 if (!err) 4058 if (!err)
4047 err = err2; 4059 err = err2;
4048 } 4060 }
@@ -6950,6 +6962,9 @@ static void tg3_poll_controller(struct net_device *dev)
6950 int i; 6962 int i;
6951 struct tg3 *tp = netdev_priv(dev); 6963 struct tg3 *tp = netdev_priv(dev);
6952 6964
6965 if (tg3_irq_sync(tp))
6966 return;
6967
6953 for (i = 0; i < tp->irq_cnt; i++) 6968 for (i = 0; i < tp->irq_cnt; i++)
6954 tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]); 6969 tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]);
6955} 6970}
@@ -16367,6 +16382,7 @@ static int tg3_init_one(struct pci_dev *pdev,
16367 tp->pm_cap = pm_cap; 16382 tp->pm_cap = pm_cap;
16368 tp->rx_mode = TG3_DEF_RX_MODE; 16383 tp->rx_mode = TG3_DEF_RX_MODE;
16369 tp->tx_mode = TG3_DEF_TX_MODE; 16384 tp->tx_mode = TG3_DEF_TX_MODE;
16385 tp->irq_sync = 1;
16370 16386
16371 if (tg3_debug > 0) 16387 if (tg3_debug > 0)
16372 tp->msg_enable = tg3_debug; 16388 tp->msg_enable = tg3_debug;
diff --git a/drivers/net/ethernet/calxeda/xgmac.c b/drivers/net/ethernet/calxeda/xgmac.c
index b407043ce9b0..f7f02900f650 100644
--- a/drivers/net/ethernet/calxeda/xgmac.c
+++ b/drivers/net/ethernet/calxeda/xgmac.c
@@ -548,6 +548,10 @@ static int desc_get_rx_status(struct xgmac_priv *priv, struct xgmac_dma_desc *p)
548 return -1; 548 return -1;
549 } 549 }
550 550
551 /* All frames should fit into a single buffer */
552 if (!(status & RXDESC_FIRST_SEG) || !(status & RXDESC_LAST_SEG))
553 return -1;
554
551 /* Check if packet has checksum already */ 555 /* Check if packet has checksum already */
552 if ((status & RXDESC_FRAME_TYPE) && (status & RXDESC_EXT_STATUS) && 556 if ((status & RXDESC_FRAME_TYPE) && (status & RXDESC_EXT_STATUS) &&
553 !(ext_status & RXDESC_IP_PAYLOAD_MASK)) 557 !(ext_status & RXDESC_IP_PAYLOAD_MASK))
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index f0718e1a8369..c306df7d4568 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -1994,9 +1994,20 @@ static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1994{ 1994{
1995 const struct port_info *pi = netdev_priv(dev); 1995 const struct port_info *pi = netdev_priv(dev);
1996 struct adapter *adap = pi->adapter; 1996 struct adapter *adap = pi->adapter;
1997 1997 struct sge_rspq *q;
1998 return set_rxq_intr_params(adap, &adap->sge.ethrxq[pi->first_qset].rspq, 1998 int i;
1999 c->rx_coalesce_usecs, c->rx_max_coalesced_frames); 1999 int r = 0;
2000
2001 for (i = pi->first_qset; i < pi->first_qset + pi->nqsets; i++) {
2002 q = &adap->sge.ethrxq[i].rspq;
2003 r = set_rxq_intr_params(adap, q, c->rx_coalesce_usecs,
2004 c->rx_max_coalesced_frames);
2005 if (r) {
2006 dev_err(&dev->dev, "failed to set coalesce %d\n", r);
2007 break;
2008 }
2009 }
2010 return r;
2000} 2011}
2001 2012
2002static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 2013static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
diff --git a/drivers/net/ethernet/intel/ixgbe/Makefile b/drivers/net/ethernet/intel/ixgbe/Makefile
index f3a632bf8d96..687c83d1bdab 100644
--- a/drivers/net/ethernet/intel/ixgbe/Makefile
+++ b/drivers/net/ethernet/intel/ixgbe/Makefile
@@ -32,7 +32,7 @@
32 32
33obj-$(CONFIG_IXGBE) += ixgbe.o 33obj-$(CONFIG_IXGBE) += ixgbe.o
34 34
35ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o ixgbe_debugfs.o\ 35ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
36 ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \ 36 ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \
37 ixgbe_mbx.o ixgbe_x540.o ixgbe_lib.o ixgbe_ptp.o 37 ixgbe_mbx.o ixgbe_x540.o ixgbe_lib.o ixgbe_ptp.o
38 38
@@ -40,4 +40,5 @@ ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
40 ixgbe_dcb_82599.o ixgbe_dcb_nl.o 40 ixgbe_dcb_82599.o ixgbe_dcb_nl.o
41 41
42ixgbe-$(CONFIG_IXGBE_HWMON) += ixgbe_sysfs.o 42ixgbe-$(CONFIG_IXGBE_HWMON) += ixgbe_sysfs.o
43ixgbe-$(CONFIG_DEBUG_FS) += ixgbe_debugfs.o
43ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o 44ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
index 50aa546b8c7a..3504686d3af5 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
@@ -24,9 +24,6 @@
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 25
26*******************************************************************************/ 26*******************************************************************************/
27
28#ifdef CONFIG_DEBUG_FS
29
30#include <linux/debugfs.h> 27#include <linux/debugfs.h>
31#include <linux/module.h> 28#include <linux/module.h>
32 29
@@ -277,5 +274,3 @@ void ixgbe_dbg_exit(void)
277{ 274{
278 debugfs_remove_recursive(ixgbe_dbg_root); 275 debugfs_remove_recursive(ixgbe_dbg_root);
279} 276}
280
281#endif /* CONFIG_DEBUG_FS */
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
index 1a751c9d09c4..bb9256a1b0a9 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
@@ -660,11 +660,11 @@ int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,
660 break; 660 break;
661 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 661 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
662 tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1; 662 tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;
663 tsync_rx_mtrl = IXGBE_RXMTRL_V1_SYNC_MSG; 663 tsync_rx_mtrl |= IXGBE_RXMTRL_V1_SYNC_MSG;
664 break; 664 break;
665 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 665 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
666 tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1; 666 tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;
667 tsync_rx_mtrl = IXGBE_RXMTRL_V1_DELAY_REQ_MSG; 667 tsync_rx_mtrl |= IXGBE_RXMTRL_V1_DELAY_REQ_MSG;
668 break; 668 break;
669 case HWTSTAMP_FILTER_PTP_V2_EVENT: 669 case HWTSTAMP_FILTER_PTP_V2_EVENT:
670 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 670 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
index 2b799f4f1c37..6771b69f40d5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
@@ -630,10 +630,15 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
630 ring->tx_csum++; 630 ring->tx_csum++;
631 } 631 }
632 632
633 /* Copy dst mac address to wqe */ 633 if (mlx4_is_mfunc(mdev->dev) || priv->validate_loopback) {
634 ethh = (struct ethhdr *)skb->data; 634 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
635 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest); 635 * so that VFs and PF can communicate with each other
636 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2)); 636 */
637 ethh = (struct ethhdr *)skb->data;
638 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
639 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
640 }
641
637 /* Handle LSO (TSO) packets */ 642 /* Handle LSO (TSO) packets */
638 if (lso_header_size) { 643 if (lso_header_size) {
639 /* Mark opcode as LSO */ 644 /* Mark opcode as LSO */
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index e1bafffbc3b1..a6542d75374c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -1790,15 +1790,8 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1790 int i; 1790 int i;
1791 1791
1792 if (msi_x) { 1792 if (msi_x) {
1793 /* In multifunction mode each function gets 2 msi-X vectors 1793 nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs,
1794 * one for data path completions anf the other for asynch events 1794 nreq);
1795 * or command completions */
1796 if (mlx4_is_mfunc(dev)) {
1797 nreq = 2;
1798 } else {
1799 nreq = min_t(int, dev->caps.num_eqs -
1800 dev->caps.reserved_eqs, nreq);
1801 }
1802 1795
1803 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); 1796 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1804 if (!entries) 1797 if (!entries)
diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c
index bc165f4d0f65..695667d471a1 100644
--- a/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c
+++ b/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c
@@ -144,7 +144,7 @@ void netxen_release_tx_buffers(struct netxen_adapter *adapter)
144 buffrag->length, PCI_DMA_TODEVICE); 144 buffrag->length, PCI_DMA_TODEVICE);
145 buffrag->dma = 0ULL; 145 buffrag->dma = 0ULL;
146 } 146 }
147 for (j = 0; j < cmd_buf->frag_count; j++) { 147 for (j = 1; j < cmd_buf->frag_count; j++) {
148 buffrag++; 148 buffrag++;
149 if (buffrag->dma) { 149 if (buffrag->dma) {
150 pci_unmap_page(adapter->pdev, buffrag->dma, 150 pci_unmap_page(adapter->pdev, buffrag->dma,
diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
index 6098fd4adfeb..69e321a65077 100644
--- a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
+++ b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
@@ -1963,10 +1963,12 @@ unwind:
1963 while (--i >= 0) { 1963 while (--i >= 0) {
1964 nf = &pbuf->frag_array[i+1]; 1964 nf = &pbuf->frag_array[i+1];
1965 pci_unmap_page(pdev, nf->dma, nf->length, PCI_DMA_TODEVICE); 1965 pci_unmap_page(pdev, nf->dma, nf->length, PCI_DMA_TODEVICE);
1966 nf->dma = 0ULL;
1966 } 1967 }
1967 1968
1968 nf = &pbuf->frag_array[0]; 1969 nf = &pbuf->frag_array[0];
1969 pci_unmap_single(pdev, nf->dma, skb_headlen(skb), PCI_DMA_TODEVICE); 1970 pci_unmap_single(pdev, nf->dma, skb_headlen(skb), PCI_DMA_TODEVICE);
1971 nf->dma = 0ULL;
1970 1972
1971out_err: 1973out_err:
1972 return -ENOMEM; 1974 return -ENOMEM;
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index ed96f309bca8..11702324a071 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -1826,8 +1826,6 @@ static void rtl8169_rx_vlan_tag(struct RxDesc *desc, struct sk_buff *skb)
1826 1826
1827 if (opts2 & RxVlanTag) 1827 if (opts2 & RxVlanTag)
1828 __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff)); 1828 __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
1829
1830 desc->opts2 = 0;
1831} 1829}
1832 1830
1833static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) 1831static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
@@ -6064,8 +6062,6 @@ static int rtl_rx(struct net_device *dev, struct rtl8169_private *tp, u32 budget
6064 !(status & (RxRWT | RxFOVF)) && 6062 !(status & (RxRWT | RxFOVF)) &&
6065 (dev->features & NETIF_F_RXALL)) 6063 (dev->features & NETIF_F_RXALL))
6066 goto process_pkt; 6064 goto process_pkt;
6067
6068 rtl8169_mark_to_asic(desc, rx_buf_sz);
6069 } else { 6065 } else {
6070 struct sk_buff *skb; 6066 struct sk_buff *skb;
6071 dma_addr_t addr; 6067 dma_addr_t addr;
@@ -6086,16 +6082,14 @@ process_pkt:
6086 if (unlikely(rtl8169_fragmented_frame(status))) { 6082 if (unlikely(rtl8169_fragmented_frame(status))) {
6087 dev->stats.rx_dropped++; 6083 dev->stats.rx_dropped++;
6088 dev->stats.rx_length_errors++; 6084 dev->stats.rx_length_errors++;
6089 rtl8169_mark_to_asic(desc, rx_buf_sz); 6085 goto release_descriptor;
6090 continue;
6091 } 6086 }
6092 6087
6093 skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry], 6088 skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry],
6094 tp, pkt_size, addr); 6089 tp, pkt_size, addr);
6095 rtl8169_mark_to_asic(desc, rx_buf_sz);
6096 if (!skb) { 6090 if (!skb) {
6097 dev->stats.rx_dropped++; 6091 dev->stats.rx_dropped++;
6098 continue; 6092 goto release_descriptor;
6099 } 6093 }
6100 6094
6101 rtl8169_rx_csum(skb, status); 6095 rtl8169_rx_csum(skb, status);
@@ -6111,13 +6105,10 @@ process_pkt:
6111 tp->rx_stats.bytes += pkt_size; 6105 tp->rx_stats.bytes += pkt_size;
6112 u64_stats_update_end(&tp->rx_stats.syncp); 6106 u64_stats_update_end(&tp->rx_stats.syncp);
6113 } 6107 }
6114 6108release_descriptor:
6115 /* Work around for AMD plateform. */ 6109 desc->opts2 = 0;
6116 if ((desc->opts2 & cpu_to_le32(0xfffe000)) && 6110 wmb();
6117 (tp->mac_version == RTL_GIGA_MAC_VER_05)) { 6111 rtl8169_mark_to_asic(desc, rx_buf_sz);
6118 desc->opts2 = 0;
6119 cur_rx++;
6120 }
6121 } 6112 }
6122 6113
6123 count = cur_rx - tp->cur_rx; 6114 count = cur_rx - tp->cur_rx;