stmmac: support extend descriptors

This patch is to support the extend descriptors available
in the chips newer than the 3.50.

In case of the extend descriptors cannot be supported,
at runtime, the driver will continue to work using the old style.

In detail, this support extends the main descriptor structure
adding new descriptors: 4, 5, 6, 7. The desc4 gives us extra
information about the received ethernet payload when it is
carrying PTP packets or TCP/UDP/ICMP over IP packets.
The descriptors 6 and 7 are used for saving HW L/H timestamps (PTP).

V2: this new version removes the Koption added in the first implementation
because all the checks now to verify if the extended descriptors are
actually supported happen at probe time.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 48 insertions, 3 deletions

diff --git a/drivers/net/ethernet/stmicro/stmmac/descs.h b/drivers/net/ethernet/stmicro/stmmac/descs.h
index 223adf95fd03..2eca0c033038 100644
--- a/drivers/net/ethernet/stmicro/stmmac/descs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/descs.h
@@ -24,6 +24,7 @@
 #ifndef __DESCS_H__
 #define __DESCS_H__
 
+/* Basic descriptor structure for normal and alternate descriptors */
 struct dma_desc {
         /* Receive descriptor */
         union {
@@ -60,7 +61,7 @@ struct dma_desc {
                 } rx;
                 struct {
                         /* RDES0 */
-                        u32 payload_csum_error:1;
+                        u32 rx_mac_addr:1;
                         u32 crc_error:1;
                         u32 dribbling:1;
                         u32 error_gmii:1;
@@ -162,13 +163,57 @@ struct dma_desc {
         unsigned int des3;
 };
 
+/* Extended descriptor structure (supported by new SYNP GMAC generations) */
+struct dma_extended_desc {
+        struct dma_desc basic;
+        union {
+                struct {
+                        u32 ip_payload_type:3;
+                        u32 ip_hdr_err:1;
+                        u32 ip_payload_err:1;
+                        u32 ip_csum_bypassed:1;
+                        u32 ipv4_pkt_rcvd:1;
+                        u32 ipv6_pkt_rcvd:1;
+                        u32 msg_type:4;
+                        u32 ptp_frame_type:1;
+                        u32 ptp_ver:1;
+                        u32 timestamp_dropped:1;
+                        u32 reserved:1;
+                        u32 av_pkt_rcvd:1;
+                        u32 av_tagged_pkt_rcvd:1;
+                        u32 vlan_tag_priority_val:3;
+                        u32 reserved3:3;
+                        u32 l3_filter_match:1;
+                        u32 l4_filter_match:1;
+                        u32 l3_l4_filter_no_match:2;
+                        u32 reserved4:4;
+                } erx;
+                struct {
+                        u32 reserved;
+                } etx;
+        } des4;
+        unsigned int des5; /* Reserved */
+        unsigned int des6; /* Tx/Rx Timestamp Low */
+        unsigned int des7; /* Tx/Rx Timestamp High */
+};
+
 /* Transmit checksum insertion control */
 enum tdes_csum_insertion {
         cic_disabled = 0,       /* Checksum Insertion Control */
         cic_only_ip = 1,        /* Only IP header */
-        cic_no_pseudoheader = 2,        /* IP header but pseudoheader
-                                         * is not calculated */
+        /* IP header but pseudoheader is not calculated */
+        cic_no_pseudoheader = 2,
         cic_full = 3,           /* IP header and pseudoheader */
 };
 
+/* Extended RDES4 definitions */
+#define RDES_EXT_NO_PTP                 0
+#define RDES_EXT_SYNC                   0x1
+#define RDES_EXT_FOLLOW_UP              0x2
+#define RDES_EXT_DELAY_REQ              0x3
+#define RDES_EXT_DELAY_RESP             0x4
+#define RDES_EXT_PDELAY_REQ             0x5
+#define RDES_EXT_PDELAY_RESP            0x6
+#define RDES_EXT_PDELAY_FOLLOW_UP       0x7
+
 #endif /* __DESCS_H__ */