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authorHayes Wang <hayeswang@realtek.com>2012-07-02 05:23:21 -0400
committerFrancois Romieu <romieu@fr.zoreil.com>2012-07-09 17:38:22 -0400
commit5598bfe5191d09cdd622aeac39badc42508b227f (patch)
tree6ab2d210d3d9ccda35b77b4e2624b0bb50b1a684 /drivers/net/ethernet/realtek
parent5c9df5fed198ad8b967f33a1e11862f2a1d08bf7 (diff)
r8169: add RTL8106E support.
Signed-off-by: Hayes Wang <hayeswang@realtek.com> Acked-by: Francois Romieu <romieu@fr.zoreil.com>
Diffstat (limited to 'drivers/net/ethernet/realtek')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c56
1 files changed, 56 insertions, 0 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index d7a04e091101..7afc59336fd7 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -46,6 +46,7 @@
46#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw" 46#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
47#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw" 47#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
48#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw" 48#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
49#define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
49 50
50#ifdef RTL8169_DEBUG 51#ifdef RTL8169_DEBUG
51#define assert(expr) \ 52#define assert(expr) \
@@ -141,6 +142,7 @@ enum mac_version {
141 RTL_GIGA_MAC_VER_36, 142 RTL_GIGA_MAC_VER_36,
142 RTL_GIGA_MAC_VER_37, 143 RTL_GIGA_MAC_VER_37,
143 RTL_GIGA_MAC_VER_38, 144 RTL_GIGA_MAC_VER_38,
145 RTL_GIGA_MAC_VER_39,
144 RTL_GIGA_MAC_NONE = 0xff, 146 RTL_GIGA_MAC_NONE = 0xff,
145}; 147};
146 148
@@ -259,6 +261,9 @@ static const struct {
259 [RTL_GIGA_MAC_VER_38] = 261 [RTL_GIGA_MAC_VER_38] =
260 _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1, 262 _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1,
261 JUMBO_9K, false), 263 JUMBO_9K, false),
264 [RTL_GIGA_MAC_VER_39] =
265 _R("RTL8106e", RTL_TD_1, FIRMWARE_8106E_1,
266 JUMBO_1K, true),
262}; 267};
263#undef _R 268#undef _R
264 269
@@ -431,7 +436,9 @@ enum rtl8168_registers {
431 RDSAR1 = 0xd0, /* 8168c only. Undocumented on 8168dp */ 436 RDSAR1 = 0xd0, /* 8168c only. Undocumented on 8168dp */
432 MISC = 0xf0, /* 8168e only. */ 437 MISC = 0xf0, /* 8168e only. */
433#define TXPLA_RST (1 << 29) 438#define TXPLA_RST (1 << 29)
439#define DISABLE_LAN_EN (1 << 23) /* Enable GPIO pin */
434#define PWM_EN (1 << 22) 440#define PWM_EN (1 << 22)
441#define EARLY_TALLY_EN (1 << 16)
435}; 442};
436 443
437enum rtl_register_content { 444enum rtl_register_content {
@@ -794,6 +801,7 @@ MODULE_FIRMWARE(FIRMWARE_8168F_1);
794MODULE_FIRMWARE(FIRMWARE_8168F_2); 801MODULE_FIRMWARE(FIRMWARE_8168F_2);
795MODULE_FIRMWARE(FIRMWARE_8402_1); 802MODULE_FIRMWARE(FIRMWARE_8402_1);
796MODULE_FIRMWARE(FIRMWARE_8411_1); 803MODULE_FIRMWARE(FIRMWARE_8411_1);
804MODULE_FIRMWARE(FIRMWARE_8106E_1);
797 805
798static void rtl_lock_work(struct rtl8169_private *tp) 806static void rtl_lock_work(struct rtl8169_private *tp)
799{ 807{
@@ -1933,6 +1941,8 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1933 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, 1941 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 },
1934 1942
1935 /* 8101 family. */ 1943 /* 8101 family. */
1944 { 0x7cf00000, 0x44900000, RTL_GIGA_MAC_VER_39 },
1945 { 0x7c800000, 0x44800000, RTL_GIGA_MAC_VER_39 },
1936 { 0x7c800000, 0x44000000, RTL_GIGA_MAC_VER_37 }, 1946 { 0x7c800000, 0x44000000, RTL_GIGA_MAC_VER_37 },
1937 { 0x7cf00000, 0x40b00000, RTL_GIGA_MAC_VER_30 }, 1947 { 0x7cf00000, 0x40b00000, RTL_GIGA_MAC_VER_30 },
1938 { 0x7cf00000, 0x40a00000, RTL_GIGA_MAC_VER_30 }, 1948 { 0x7cf00000, 0x40a00000, RTL_GIGA_MAC_VER_30 },
@@ -3273,6 +3283,30 @@ static void rtl8402_hw_phy_config(struct rtl8169_private *tp)
3273 rtl_writephy(tp, 0x1f, 0x0000); 3283 rtl_writephy(tp, 0x1f, 0x0000);
3274} 3284}
3275 3285
3286static void rtl8106e_hw_phy_config(struct rtl8169_private *tp)
3287{
3288 void __iomem *ioaddr = tp->mmio_addr;
3289
3290 static const struct phy_reg phy_reg_init[] = {
3291 { 0x1f, 0x0004 },
3292 { 0x10, 0xc07f },
3293 { 0x19, 0x7030 },
3294 { 0x1f, 0x0000 }
3295 };
3296
3297 /* Disable ALDPS before ram code */
3298 rtl_writephy(tp, 0x1f, 0x0000);
3299 rtl_writephy(tp, 0x18, 0x0310);
3300 msleep(100);
3301
3302 rtl_apply_firmware(tp);
3303
3304 rtl_eri_write(ioaddr, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
3305 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
3306
3307 rtl_eri_write(ioaddr, 0x1d0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
3308}
3309
3276static void rtl_hw_phy_config(struct net_device *dev) 3310static void rtl_hw_phy_config(struct net_device *dev)
3277{ 3311{
3278 struct rtl8169_private *tp = netdev_priv(dev); 3312 struct rtl8169_private *tp = netdev_priv(dev);
@@ -3369,6 +3403,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
3369 rtl8411_hw_phy_config(tp); 3403 rtl8411_hw_phy_config(tp);
3370 break; 3404 break;
3371 3405
3406 case RTL_GIGA_MAC_VER_39:
3407 rtl8106e_hw_phy_config(tp);
3408 break;
3409
3372 default: 3410 default:
3373 break; 3411 break;
3374 } 3412 }
@@ -3608,6 +3646,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
3608 case RTL_GIGA_MAC_VER_34: 3646 case RTL_GIGA_MAC_VER_34:
3609 case RTL_GIGA_MAC_VER_37: 3647 case RTL_GIGA_MAC_VER_37:
3610 case RTL_GIGA_MAC_VER_38: 3648 case RTL_GIGA_MAC_VER_38:
3649 case RTL_GIGA_MAC_VER_39:
3611 RTL_W32(RxConfig, RTL_R32(RxConfig) | 3650 RTL_W32(RxConfig, RTL_R32(RxConfig) |
3612 AcceptBroadcast | AcceptMulticast | AcceptMyPhys); 3651 AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
3613 break; 3652 break;
@@ -3830,6 +3869,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
3830 case RTL_GIGA_MAC_VER_29: 3869 case RTL_GIGA_MAC_VER_29:
3831 case RTL_GIGA_MAC_VER_30: 3870 case RTL_GIGA_MAC_VER_30:
3832 case RTL_GIGA_MAC_VER_37: 3871 case RTL_GIGA_MAC_VER_37:
3872 case RTL_GIGA_MAC_VER_39:
3833 ops->down = r810x_pll_power_down; 3873 ops->down = r810x_pll_power_down;
3834 ops->up = r810x_pll_power_up; 3874 ops->up = r810x_pll_power_up;
3835 break; 3875 break;
@@ -5123,6 +5163,18 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
5123 ERIAR_EXGMAC); 5163 ERIAR_EXGMAC);
5124} 5164}
5125 5165
5166static void rtl_hw_start_8106(struct rtl8169_private *tp)
5167{
5168 void __iomem *ioaddr = tp->mmio_addr;
5169
5170 /* Force LAN exit from ASPM if Rx/Tx are not idle */
5171 RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);
5172
5173 RTL_W32(MISC, (RTL_R32(MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN);
5174 RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
5175 RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
5176}
5177
5126static void rtl_hw_start_8101(struct net_device *dev) 5178static void rtl_hw_start_8101(struct net_device *dev)
5127{ 5179{
5128 struct rtl8169_private *tp = netdev_priv(dev); 5180 struct rtl8169_private *tp = netdev_priv(dev);
@@ -5167,6 +5219,10 @@ static void rtl_hw_start_8101(struct net_device *dev)
5167 case RTL_GIGA_MAC_VER_37: 5219 case RTL_GIGA_MAC_VER_37:
5168 rtl_hw_start_8402(tp); 5220 rtl_hw_start_8402(tp);
5169 break; 5221 break;
5222
5223 case RTL_GIGA_MAC_VER_39:
5224 rtl_hw_start_8106(tp);
5225 break;
5170 } 5226 }
5171 5227
5172 RTL_W8(Cfg9346, Cfg9346_Lock); 5228 RTL_W8(Cfg9346, Cfg9346_Lock);