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authorFrancois Romieu <romieu@fr.zoreil.com>2012-03-08 04:09:40 -0500
committerFrancois Romieu <romieu@fr.zoreil.com>2012-03-10 16:39:25 -0500
commit31fa8b1855cb1f1fd99e2f2f9b8f2c8f113e9f2e (patch)
tree2ed5f7e92bd7a8269309de67c95c221e2ff5c1d4 /drivers/net/ethernet/realtek/r8169.c
parentdc1c00ce70da5d3bb3fc97707e04f598ff72e7ba (diff)
r8169: move rtl_cfg_info closer to its caller.
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
Diffstat (limited to 'drivers/net/ethernet/realtek/r8169.c')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c118
1 files changed, 57 insertions, 61 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 12329c5e1ede..390e69a548d3 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -255,10 +255,6 @@ enum cfg_version {
255 RTL_CFG_2 255 RTL_CFG_2
256}; 256};
257 257
258static void rtl_hw_start_8169(struct net_device *);
259static void rtl_hw_start_8168(struct net_device *);
260static void rtl_hw_start_8101(struct net_device *);
261
262static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = { 258static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = {
263 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 }, 259 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 },
264 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 }, 260 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 },
@@ -3438,63 +3434,6 @@ static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data
3438 return -EOPNOTSUPP; 3434 return -EOPNOTSUPP;
3439} 3435}
3440 3436
3441static const struct rtl_cfg_info {
3442 void (*hw_start)(struct net_device *);
3443 unsigned int region;
3444 unsigned int align;
3445 u16 event_slow;
3446 unsigned features;
3447 u8 default_ver;
3448} rtl_cfg_infos [] = {
3449 [RTL_CFG_0] = {
3450 .hw_start = rtl_hw_start_8169,
3451 .region = 1,
3452 .align = 0,
3453 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver,
3454 .features = RTL_FEATURE_GMII,
3455 .default_ver = RTL_GIGA_MAC_VER_01,
3456 },
3457 [RTL_CFG_1] = {
3458 .hw_start = rtl_hw_start_8168,
3459 .region = 2,
3460 .align = 8,
3461 .event_slow = SYSErr | LinkChg | RxOverflow,
3462 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI,
3463 .default_ver = RTL_GIGA_MAC_VER_11,
3464 },
3465 [RTL_CFG_2] = {
3466 .hw_start = rtl_hw_start_8101,
3467 .region = 2,
3468 .align = 8,
3469 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver |
3470 PCSTimeout,
3471 .features = RTL_FEATURE_MSI,
3472 .default_ver = RTL_GIGA_MAC_VER_13,
3473 }
3474};
3475
3476/* Cfg9346_Unlock assumed. */
3477static unsigned rtl_try_msi(struct rtl8169_private *tp,
3478 const struct rtl_cfg_info *cfg)
3479{
3480 void __iomem *ioaddr = tp->mmio_addr;
3481 unsigned msi = 0;
3482 u8 cfg2;
3483
3484 cfg2 = RTL_R8(Config2) & ~MSIEnable;
3485 if (cfg->features & RTL_FEATURE_MSI) {
3486 if (pci_enable_msi(tp->pci_dev)) {
3487 netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
3488 } else {
3489 cfg2 |= MSIEnable;
3490 msi = RTL_FEATURE_MSI;
3491 }
3492 }
3493 if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
3494 RTL_W8(Config2, cfg2);
3495 return msi;
3496}
3497
3498static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp) 3437static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
3499{ 3438{
3500 if (tp->features & RTL_FEATURE_MSI) { 3439 if (tp->features & RTL_FEATURE_MSI) {
@@ -6053,6 +5992,63 @@ static const struct net_device_ops rtl_netdev_ops = {
6053 5992
6054}; 5993};
6055 5994
5995static const struct rtl_cfg_info {
5996 void (*hw_start)(struct net_device *);
5997 unsigned int region;
5998 unsigned int align;
5999 u16 event_slow;
6000 unsigned features;
6001 u8 default_ver;
6002} rtl_cfg_infos [] = {
6003 [RTL_CFG_0] = {
6004 .hw_start = rtl_hw_start_8169,
6005 .region = 1,
6006 .align = 0,
6007 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver,
6008 .features = RTL_FEATURE_GMII,
6009 .default_ver = RTL_GIGA_MAC_VER_01,
6010 },
6011 [RTL_CFG_1] = {
6012 .hw_start = rtl_hw_start_8168,
6013 .region = 2,
6014 .align = 8,
6015 .event_slow = SYSErr | LinkChg | RxOverflow,
6016 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI,
6017 .default_ver = RTL_GIGA_MAC_VER_11,
6018 },
6019 [RTL_CFG_2] = {
6020 .hw_start = rtl_hw_start_8101,
6021 .region = 2,
6022 .align = 8,
6023 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver |
6024 PCSTimeout,
6025 .features = RTL_FEATURE_MSI,
6026 .default_ver = RTL_GIGA_MAC_VER_13,
6027 }
6028};
6029
6030/* Cfg9346_Unlock assumed. */
6031static unsigned rtl_try_msi(struct rtl8169_private *tp,
6032 const struct rtl_cfg_info *cfg)
6033{
6034 void __iomem *ioaddr = tp->mmio_addr;
6035 unsigned msi = 0;
6036 u8 cfg2;
6037
6038 cfg2 = RTL_R8(Config2) & ~MSIEnable;
6039 if (cfg->features & RTL_FEATURE_MSI) {
6040 if (pci_enable_msi(tp->pci_dev)) {
6041 netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
6042 } else {
6043 cfg2 |= MSIEnable;
6044 msi = RTL_FEATURE_MSI;
6045 }
6046 }
6047 if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
6048 RTL_W8(Config2, cfg2);
6049 return msi;
6050}
6051
6056static int __devinit 6052static int __devinit
6057rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 6053rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6058{ 6054{