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authorhayeswang <hayeswang@realtek.com>2013-04-01 18:23:37 -0400
committerDavid S. Miller <davem@davemloft.net>2013-04-07 16:44:13 -0400
commitfe7524c09793c87dfde55ac3f98f4b95d9d48638 (patch)
tree716ca26df33329fcd95c088234a64478c6eaba09 /drivers/net/ethernet/realtek/r8169.c
parent41f44d1389c0bfd19d7ff92aafc80d42308eac70 (diff)
r8169: Update PHY settings of RTL8111G
Add the new settings and correct the wrong settings. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/realtek/r8169.c')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c24
1 files changed, 22 insertions, 2 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 2c40309e40ad..b8b59a97d233 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3376,14 +3376,23 @@ static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
3376 rtl_writephy(tp, 0x1f, 0x0c41); 3376 rtl_writephy(tp, 0x1f, 0x0c41);
3377 rtl_w1w0_phy(tp, 0x15, 0x0002, 0x0000); 3377 rtl_w1w0_phy(tp, 0x15, 0x0002, 0x0000);
3378 } else { 3378 } else {
3379 rtl_writephy(tp, 0x1f, 0x0bcc); 3379 rtl_writephy(tp, 0x1f, 0x0c41);
3380 rtl_w1w0_phy(tp, 0x12, 0x0000, 0x0002); 3380 rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0002);
3381 } 3381 }
3382 3382
3383 /* Enable PHY auto speed down */ 3383 /* Enable PHY auto speed down */
3384 rtl_writephy(tp, 0x1f, 0x0a44); 3384 rtl_writephy(tp, 0x1f, 0x0a44);
3385 rtl_w1w0_phy(tp, 0x11, 0x000c, 0x0000); 3385 rtl_w1w0_phy(tp, 0x11, 0x000c, 0x0000);
3386 3386
3387 rtl_writephy(tp, 0x1f, 0x0bcc);
3388 rtl_w1w0_phy(tp, 0x14, 0x0100, 0x0000);
3389 rtl_writephy(tp, 0x1f, 0x0a44);
3390 rtl_w1w0_phy(tp, 0x11, 0x00c0, 0x0000);
3391 rtl_writephy(tp, 0x1f, 0x0a43);
3392 rtl_writephy(tp, 0x13, 0x8084);
3393 rtl_w1w0_phy(tp, 0x14, 0x0000, 0x6000);
3394 rtl_w1w0_phy(tp, 0x10, 0x1003, 0x0000);
3395
3387 /* EEE auto-fallback function */ 3396 /* EEE auto-fallback function */
3388 rtl_writephy(tp, 0x1f, 0x0a4b); 3397 rtl_writephy(tp, 0x1f, 0x0a4b);
3389 rtl_w1w0_phy(tp, 0x11, 0x0004, 0x0000); 3398 rtl_w1w0_phy(tp, 0x11, 0x0004, 0x0000);
@@ -3396,6 +3405,17 @@ static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
3396 rtl_writephy(tp, 0x1f, 0x0c42); 3405 rtl_writephy(tp, 0x1f, 0x0c42);
3397 rtl_w1w0_phy(tp, 0x11, 0x4000, 0x2000); 3406 rtl_w1w0_phy(tp, 0x11, 0x4000, 0x2000);
3398 3407
3408 /* Improve SWR Efficiency */
3409 rtl_writephy(tp, 0x1f, 0x0bcd);
3410 rtl_writephy(tp, 0x14, 0x5065);
3411 rtl_writephy(tp, 0x14, 0xd065);
3412 rtl_writephy(tp, 0x1f, 0x0bc8);
3413 rtl_writephy(tp, 0x11, 0x5655);
3414 rtl_writephy(tp, 0x1f, 0x0bcd);
3415 rtl_writephy(tp, 0x14, 0x1065);
3416 rtl_writephy(tp, 0x14, 0x9065);
3417 rtl_writephy(tp, 0x14, 0x1065);
3418
3399 rtl_writephy(tp, 0x1f, 0x0000); 3419 rtl_writephy(tp, 0x1f, 0x0000);
3400} 3420}
3401 3421