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authorHayes Wang <hayeswang@realtek.com>2012-03-30 02:48:06 -0400
committerFrancois Romieu <romieu@fr.zoreil.com>2012-04-17 05:22:41 -0400
commitb3d7b2f2f07ff0ab87442f2d499f2860ef59bfaa (patch)
tree11cf03fbb357631fe165e35c782d97f898085d2e /drivers/net/ethernet/realtek/r8169.c
parent5f886e08901adaaaa1c79d1f964035aee6a29370 (diff)
r8169: support the new RTL8411 chip.
Compared with previous chipsets, it needs no special action trough the jumbo{enable/disable} helpers to operate with jumbo frames. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Acked-by: Francois Romieu <romieu@fr.zoreil.com>
Diffstat (limited to 'drivers/net/ethernet/realtek/r8169.c')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c140
1 files changed, 138 insertions, 2 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 28a08616569f..00628d84342f 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -45,6 +45,7 @@
45#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw" 45#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
46#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw" 46#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
47#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw" 47#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
48#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
48 49
49#ifdef RTL8169_DEBUG 50#ifdef RTL8169_DEBUG
50#define assert(expr) \ 51#define assert(expr) \
@@ -135,6 +136,7 @@ enum mac_version {
135 RTL_GIGA_MAC_VER_35, 136 RTL_GIGA_MAC_VER_35,
136 RTL_GIGA_MAC_VER_36, 137 RTL_GIGA_MAC_VER_36,
137 RTL_GIGA_MAC_VER_37, 138 RTL_GIGA_MAC_VER_37,
139 RTL_GIGA_MAC_VER_38,
138 RTL_GIGA_MAC_NONE = 0xff, 140 RTL_GIGA_MAC_NONE = 0xff,
139}; 141};
140 142
@@ -250,6 +252,9 @@ static const struct {
250 [RTL_GIGA_MAC_VER_37] = 252 [RTL_GIGA_MAC_VER_37] =
251 _R("RTL8402", RTL_TD_1, FIRMWARE_8402_1, 253 _R("RTL8402", RTL_TD_1, FIRMWARE_8402_1,
252 JUMBO_1K, true), 254 JUMBO_1K, true),
255 [RTL_GIGA_MAC_VER_38] =
256 _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1,
257 JUMBO_9K, false),
253}; 258};
254#undef _R 259#undef _R
255 260
@@ -784,6 +789,7 @@ MODULE_FIRMWARE(FIRMWARE_8105E_1);
784MODULE_FIRMWARE(FIRMWARE_8168F_1); 789MODULE_FIRMWARE(FIRMWARE_8168F_1);
785MODULE_FIRMWARE(FIRMWARE_8168F_2); 790MODULE_FIRMWARE(FIRMWARE_8168F_2);
786MODULE_FIRMWARE(FIRMWARE_8402_1); 791MODULE_FIRMWARE(FIRMWARE_8402_1);
792MODULE_FIRMWARE(FIRMWARE_8411_1);
787 793
788static void rtl_lock_work(struct rtl8169_private *tp) 794static void rtl_lock_work(struct rtl8169_private *tp)
789{ 795{
@@ -1263,7 +1269,8 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
1263 if (!netif_running(dev)) 1269 if (!netif_running(dev))
1264 return; 1270 return;
1265 1271
1266 if (tp->mac_version == RTL_GIGA_MAC_VER_34) { 1272 if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
1273 tp->mac_version == RTL_GIGA_MAC_VER_38) {
1267 if (RTL_R8(PHYstatus) & _1000bpsF) { 1274 if (RTL_R8(PHYstatus) & _1000bpsF) {
1268 rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111, 1275 rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,
1269 0x00000011, ERIAR_EXGMAC); 1276 0x00000011, ERIAR_EXGMAC);
@@ -1884,6 +1891,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1884 int mac_version; 1891 int mac_version;
1885 } mac_info[] = { 1892 } mac_info[] = {
1886 /* 8168F family. */ 1893 /* 8168F family. */
1894 { 0x7c800000, 0x48800000, RTL_GIGA_MAC_VER_38 },
1887 { 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 }, 1895 { 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 },
1888 { 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 }, 1896 { 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 },
1889 1897
@@ -3101,6 +3109,104 @@ static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
3101 rtl8168f_hw_phy_config(tp); 3109 rtl8168f_hw_phy_config(tp);
3102} 3110}
3103 3111
3112static void rtl8411_hw_phy_config(struct rtl8169_private *tp)
3113{
3114 void __iomem *ioaddr = tp->mmio_addr;
3115 static const struct phy_reg phy_reg_init[] = {
3116 /* Channel estimation fine tune */
3117 { 0x1f, 0x0003 },
3118 { 0x09, 0xa20f },
3119 { 0x1f, 0x0000 },
3120
3121 /* Modify green table for giga & fnet */
3122 { 0x1f, 0x0005 },
3123 { 0x05, 0x8b55 },
3124 { 0x06, 0x0000 },
3125 { 0x05, 0x8b5e },
3126 { 0x06, 0x0000 },
3127 { 0x05, 0x8b67 },
3128 { 0x06, 0x0000 },
3129 { 0x05, 0x8b70 },
3130 { 0x06, 0x0000 },
3131 { 0x1f, 0x0000 },
3132 { 0x1f, 0x0007 },
3133 { 0x1e, 0x0078 },
3134 { 0x17, 0x0000 },
3135 { 0x19, 0x00aa },
3136 { 0x1f, 0x0000 },
3137
3138 /* Modify green table for 10M */
3139 { 0x1f, 0x0005 },
3140 { 0x05, 0x8b79 },
3141 { 0x06, 0xaa00 },
3142 { 0x1f, 0x0000 },
3143
3144 /* Disable hiimpedance detection (RTCT) */
3145 { 0x1f, 0x0003 },
3146 { 0x01, 0x328a },
3147 { 0x1f, 0x0000 }
3148 };
3149
3150
3151 rtl_apply_firmware(tp);
3152
3153 rtl8168f_hw_phy_config(tp);
3154
3155 /* Improve 2-pair detection performance */
3156 rtl_writephy(tp, 0x1f, 0x0005);
3157 rtl_writephy(tp, 0x05, 0x8b85);
3158 rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
3159 rtl_writephy(tp, 0x1f, 0x0000);
3160
3161 rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
3162
3163 /* Modify green table for giga */
3164 rtl_writephy(tp, 0x1f, 0x0005);
3165 rtl_writephy(tp, 0x05, 0x8b54);
3166 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
3167 rtl_writephy(tp, 0x05, 0x8b5d);
3168 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
3169 rtl_writephy(tp, 0x05, 0x8a7c);
3170 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
3171 rtl_writephy(tp, 0x05, 0x8a7f);
3172 rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);
3173 rtl_writephy(tp, 0x05, 0x8a82);
3174 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
3175 rtl_writephy(tp, 0x05, 0x8a85);
3176 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
3177 rtl_writephy(tp, 0x05, 0x8a88);
3178 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
3179 rtl_writephy(tp, 0x1f, 0x0000);
3180
3181 /* uc same-seed solution */
3182 rtl_writephy(tp, 0x1f, 0x0005);
3183 rtl_writephy(tp, 0x05, 0x8b85);
3184 rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);
3185 rtl_writephy(tp, 0x1f, 0x0000);
3186
3187 /* eee setting */
3188 rtl_w1w0_eri(ioaddr, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);
3189 rtl_writephy(tp, 0x1f, 0x0005);
3190 rtl_writephy(tp, 0x05, 0x8b85);
3191 rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
3192 rtl_writephy(tp, 0x1f, 0x0004);
3193 rtl_writephy(tp, 0x1f, 0x0007);
3194 rtl_writephy(tp, 0x1e, 0x0020);
3195 rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
3196 rtl_writephy(tp, 0x1f, 0x0000);
3197 rtl_writephy(tp, 0x0d, 0x0007);
3198 rtl_writephy(tp, 0x0e, 0x003c);
3199 rtl_writephy(tp, 0x0d, 0x4007);
3200 rtl_writephy(tp, 0x0e, 0x0000);
3201 rtl_writephy(tp, 0x0d, 0x0000);
3202
3203 /* Green feature */
3204 rtl_writephy(tp, 0x1f, 0x0003);
3205 rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
3206 rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
3207 rtl_writephy(tp, 0x1f, 0x0000);
3208}
3209
3104static void rtl8102e_hw_phy_config(struct rtl8169_private *tp) 3210static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
3105{ 3211{
3106 static const struct phy_reg phy_reg_init[] = { 3212 static const struct phy_reg phy_reg_init[] = {
@@ -3255,6 +3361,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
3255 rtl8402_hw_phy_config(tp); 3361 rtl8402_hw_phy_config(tp);
3256 break; 3362 break;
3257 3363
3364 case RTL_GIGA_MAC_VER_38:
3365 rtl8411_hw_phy_config(tp);
3366 break;
3367
3258 default: 3368 default:
3259 break; 3369 break;
3260 } 3370 }
@@ -3493,6 +3603,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
3493 case RTL_GIGA_MAC_VER_33: 3603 case RTL_GIGA_MAC_VER_33:
3494 case RTL_GIGA_MAC_VER_34: 3604 case RTL_GIGA_MAC_VER_34:
3495 case RTL_GIGA_MAC_VER_37: 3605 case RTL_GIGA_MAC_VER_37:
3606 case RTL_GIGA_MAC_VER_38:
3496 RTL_W32(RxConfig, RTL_R32(RxConfig) | 3607 RTL_W32(RxConfig, RTL_R32(RxConfig) |
3497 AcceptBroadcast | AcceptMulticast | AcceptMyPhys); 3608 AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
3498 break; 3609 break;
@@ -3739,6 +3850,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
3739 case RTL_GIGA_MAC_VER_34: 3850 case RTL_GIGA_MAC_VER_34:
3740 case RTL_GIGA_MAC_VER_35: 3851 case RTL_GIGA_MAC_VER_35:
3741 case RTL_GIGA_MAC_VER_36: 3852 case RTL_GIGA_MAC_VER_36:
3853 case RTL_GIGA_MAC_VER_38:
3742 ops->down = r8168_pll_power_down; 3854 ops->down = r8168_pll_power_down;
3743 ops->up = r8168_pll_power_up; 3855 ops->up = r8168_pll_power_up;
3744 break; 3856 break;
@@ -4025,7 +4137,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
4025 } else if (tp->mac_version == RTL_GIGA_MAC_VER_34 || 4137 } else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
4026 tp->mac_version == RTL_GIGA_MAC_VER_35 || 4138 tp->mac_version == RTL_GIGA_MAC_VER_35 ||
4027 tp->mac_version == RTL_GIGA_MAC_VER_36 || 4139 tp->mac_version == RTL_GIGA_MAC_VER_36 ||
4028 tp->mac_version == RTL_GIGA_MAC_VER_37) { 4140 tp->mac_version == RTL_GIGA_MAC_VER_37 ||
4141 tp->mac_version == RTL_GIGA_MAC_VER_38) {
4029 RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq); 4142 RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
4030 while (!(RTL_R32(TxConfig) & TXCFG_EMPTY)) 4143 while (!(RTL_R32(TxConfig) & TXCFG_EMPTY))
4031 udelay(100); 4144 udelay(100);
@@ -4356,6 +4469,7 @@ static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
4356 break; 4469 break;
4357 4470
4358 case RTL_GIGA_MAC_VER_37: 4471 case RTL_GIGA_MAC_VER_37:
4472 case RTL_GIGA_MAC_VER_38:
4359 ops->write = r8402_csi_write; 4473 ops->write = r8402_csi_write;
4360 ops->read = r8402_csi_read; 4474 ops->read = r8402_csi_read;
4361 break; 4475 break;
@@ -4744,6 +4858,24 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
4744 RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07); 4858 RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
4745} 4859}
4746 4860
4861static void rtl_hw_start_8411(struct rtl8169_private *tp)
4862{
4863 void __iomem *ioaddr = tp->mmio_addr;
4864 static const struct ephy_info e_info_8168f_1[] = {
4865 { 0x06, 0x00c0, 0x0020 },
4866 { 0x0f, 0xffff, 0x5200 },
4867 { 0x1e, 0x0000, 0x4000 },
4868 { 0x19, 0x0000, 0x0224 }
4869 };
4870
4871 rtl_hw_start_8168f(tp);
4872
4873 rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
4874
4875 rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000,
4876 ERIAR_EXGMAC);
4877}
4878
4747static void rtl_hw_start_8168(struct net_device *dev) 4879static void rtl_hw_start_8168(struct net_device *dev)
4748{ 4880{
4749 struct rtl8169_private *tp = netdev_priv(dev); 4881 struct rtl8169_private *tp = netdev_priv(dev);
@@ -4841,6 +4973,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
4841 rtl_hw_start_8168f_1(tp); 4973 rtl_hw_start_8168f_1(tp);
4842 break; 4974 break;
4843 4975
4976 case RTL_GIGA_MAC_VER_38:
4977 rtl_hw_start_8411(tp);
4978 break;
4979
4844 default: 4980 default:
4845 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", 4981 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
4846 dev->name, tp->mac_version); 4982 dev->name, tp->mac_version);